/freebsd/sys/contrib/device-tree/Bindings/usb/ |
H A D | octeon-usb.txt | 7 - compatible: must be "cavium,octeon-5750-usbn" 9 - reg: specifies the physical base address of the USBN block and 12 - #address-cells: specifies the number of cells needed to encode an 15 - #size-cells: specifies the number of cells used to represent the size 18 - ranges: specifies the translation between child address space and parent 21 - clock-frequency: speed of the USB reference clock. Allowed values are 24 - cavium,refclk-type: type of the USB reference clock. Allowed values are 27 - refclk-frequency: deprecated, use "clock-frequency". 29 - refclk-type: deprecated, use "cavium,refclk-type". 33 The main node must have one child node which describes the built-in [all …]
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H A D | smsc,usb3503.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: SMSC USB3503 High-Speed Hub Controller 10 - Dongjin Kim <tobetter@gmail.com> 15 - smsc,usb3503 16 - smsc,usb3503a 17 - smsc,usb3803 22 connect-gpios: 27 intn-gpios: [all …]
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H A D | usb3503.txt | 1 SMSC USB3503 High-Speed Hub Controller 4 - compatible: Should be "smsc,usb3503" or "smsc,usb3503a". 7 - reg: Specifies the i2c slave address, it is required and should be 0x08 9 - connect-gpios: Should specify GPIO for connect. 10 - disabled-ports: Should specify the ports unused. 14 - intn-gpios: Should specify GPIO for interrupt. 15 - reset-gpios: Should specify GPIO for reset. 16 - initial-mode: Should specify initial mode. 18 - refclk: Clock used for driving REFCLK signal (optional, if not provided 22 clock-names in order to assign it [all …]
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H A D | dwc3-cavium.txt | 4 - compatible: Should contain "cavium,octeon-7130-usb-uctl" 13 compatible = "cavium,octeon-7130-usb-uctl"; 16 #address-cells = <0x00000002>; 17 #size-cells = <0x00000002>; 18 refclk-frequency = <0x05f5e100>; 19 refclk-type-ss = "dlmc_ref_clk0"; 20 refclk-type-hs = "dlmc_ref_clk0"; 23 compatible = "cavium,octeon-7130-xhci", "snps,dwc3"; 25 interrupt-parent = <0x00000010>;
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H A D | ti,am62-usb.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/usb/ti,am62-usb.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: TI's AM62 wrapper module for the Synopsys USBSS-DRD controller 10 - Aswath Govindraju <a-govindraju@ti.com> 14 const: ti,am62-usb 19 - description: USB CFG register space 20 - description: USB PHY2 register space 24 power-domains: [all …]
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/freebsd/sys/contrib/device-tree/Bindings/mips/cavium/ |
H A D | uctl.txt | 4 - compatible: "cavium,octeon-6335-uctl" 8 - reg: The base address of the UCTL register bank. 10 - #address-cells: Must be <2>. 12 - #size-cells: Must be <2>. 14 - ranges: Empty to signify direct mapping of the children. 16 - refclk-frequency: A single cell containing the reference clock 17 frequency in Hz. 19 - refclk-type: A string describing the reference clock connection 24 compatible = "cavium,octeon-6335-uctl"; 27 #address-cells = <2>; [all …]
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/freebsd/sys/contrib/device-tree/src/arm/ti/keystone/ |
H A D | keystone-k2hk-evm.dts | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2013-2017 Texas Instruments Incorporated - https://www.ti.com/ 7 /dts-v1/; 10 #include "keystone-k2hk.dtsi" 13 compatible = "ti,k2hk-evm", "ti,k2hk", "ti,keystone"; 16 reserved-memory { 17 #address-cells = <2>; 18 #size-cells = <2>; 21 dsp_common_memory: dsp-common-memory@81f800000 { 22 compatible = "shared-dma-pool"; [all …]
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H A D | keystone-k2e-evm.dts | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2013-2017 Texas Instruments Incorporated - https://www.ti.com/ 7 /dts-v1/; 10 #include "keystone-k2e.dtsi" 13 compatible = "ti,k2e-evm", "ti,k2e", "ti,keystone"; 16 reserved-memory { 17 #address-cells = <2>; 18 #size-cells = <2>; 21 dsp_common_memory: dsp-common-memory@81f800000 { 22 compatible = "shared-dma-pool"; [all …]
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/freebsd/sys/contrib/device-tree/Bindings/clock/ |
H A D | nuvoton,npcm750-clk.txt | 17 dt-bindings/clock/nuvoton,npcm7xx-clock.h 22 - compatible: "nuvoton,npcm750-clk" : for clock controller of Nuvoton 25 - reg: physical base address of the clock controller and length of 28 - #clock-cells: should be 1. 32 clk: clock-controller@f0801000 { 33 compatible = "nuvoton,npcm750-clk"; 34 #clock-cells = <1>; 36 clock-names = "refclk", "sysbypck", "mcbypck"; 43 clk_refclk: clk-refclk { 44 compatible = "fixed-clock"; [all …]
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/freebsd/sys/contrib/device-tree/src/mips/cavium-octeon/ |
H A D | ubnt_e100.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 15 phy5: ethernet-phy@5 { 17 compatible = "ethernet-phy-ieee802.3-c22"; 19 phy6: ethernet-phy@6 { 21 compatible = "ethernet-phy-ieee802.3-c22"; 23 phy7: ethernet-phy@7 { 25 compatible = "ethernet-phy-ieee802.3-c22"; 32 phy-handle = <&phy7>; 33 rx-delay = <0>; 34 tx-delay = <0x10>; [all …]
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H A D | dlink_dsr-500n-1000n.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Device tree source for D-Link DSR-500N/1000N (common parts). 13 phy8: ethernet-phy@8 { 15 compatible = "ethernet-phy-ieee802.3-c22"; 22 fixed-link { 24 full-duplex; 28 fixed-link { 30 full-duplex; 34 phy-handle = <&phy8>; 47 refclk-frequency = <12000000>; [all …]
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H A D | octeon_3xxx.dts | 1 // SPDX-License-Identifier: GPL-2.0 6 * use. Because of this, it contains a super-set of the available 15 phy0: ethernet-phy@0 { 17 marvell,reg-init = 21 <3 0x11 0 0x442a>, /* Reg 3,17 <- 0442a */ 22 /* irq, blink-activity, blink-link */ 23 <3 0x10 0 0x0242>; /* Reg 3,16 <- 0x0242 */ 27 phy1: ethernet-phy@1 { 29 marvell,reg-init = 33 <3 0x11 0 0x442a>, /* Reg 3,17 <- 0442a */ [all …]
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/freebsd/sys/contrib/device-tree/Bindings/media/i2c/ |
H A D | tc358743.txt | 1 * Toshiba TC358743 HDMI-RX to MIPI CSI2-TX Bridge 3 The Toshiba TC358743 HDMI-RX to MIPI CSI2-TX (H2C) is a bridge that converts 4 a HDMI stream to MIPI CSI-2 TX. It is programmable through I2C. 8 - compatible: value should be "toshiba,tc358743" 9 - clocks, clock-names: should contain a phandle link to the reference clock 10 source, the clock input is named "refclk". 14 - reset-gpios: gpio phandle GPIO connected to the reset pin 15 - interrupts: GPIO connected to the interrupt pin 16 - data-lanes: should be <1 2 3 4> for four-lane operation, 17 or <1 2> for two-lane operation [all …]
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H A D | toshiba,tc358746.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schema [all...] |
/freebsd/sys/contrib/device-tree/src/mips/brcm/ |
H A D | bcm6362.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 #include "dt-bindings/clock/bcm6362-clock.h" 4 #include "dt-bindings/reset/bcm6362-reset.h" 5 #include "dt-bindings/soc/bcm6362-pm.h" 8 #address-cells = <1>; 9 #size-cells = <1>; 13 #address-cells = <1>; 14 #size-cells = <0>; 16 mips-hpt-frequency = <200000000>; 32 periph_osc: periph-osc { [all …]
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H A D | bcm6328.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 #include "dt-bindings/clock/bcm6328-clock.h" 4 #include "dt-bindings/reset/bcm6328-reset.h" 5 #include "dt-bindings/soc/bcm6328-pm.h" 8 #address-cells = <1>; 9 #size-cells = <1>; 13 #address-cells = <1>; 14 #size-cells = <0>; 16 mips-hpt-frequency = <160000000>; 32 periph_osc: periph-osc { [all …]
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H A D | bcm63268.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 #include "dt-bindings/clock/bcm63268-clock.h" 4 #include "dt-bindings/reset/bcm63268-reset.h" 5 #include "dt-bindings/soc/bcm63268-pm.h" 8 #address-cells = <1>; 9 #size-cells = <1>; 13 #address-cells = <1>; 14 #size-cells = <0>; 16 mips-hpt-frequency = <200000000>; 32 periph_osc: periph-osc { [all …]
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H A D | bcm3368.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 #include "dt-bindings/clock/bcm3368-clock.h" 6 #address-cells = <1>; 7 #size-cells = <1>; 11 #address-cells = <1>; 12 #size-cells = <0>; 14 mips-hpt-frequency = <150000000>; 30 periph_clk: periph-clk { 31 compatible = "fixed-clock"; 32 #clock-cells = <0>; [all …]
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H A D | bcm6358.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 #include "dt-bindings/clock/bcm6358-clock.h" 4 #include "dt-bindings/reset/bcm6358-reset.h" 7 #address-cells = <1>; 8 #size-cells = <1>; 12 #address-cells = <1>; 13 #size-cells = <0>; 15 mips-hpt-frequency = <150000000>; 31 periph_osc: periph-osc { 32 compatible = "fixed-clock"; [all …]
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H A D | bcm6368.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 #include "dt-bindings/clock/bcm6368-clock.h" 4 #include "dt-bindings/reset/bcm6368-reset.h" 7 #address-cells = <1>; 8 #size-cells = <1>; 12 #address-cells = <1>; 13 #size-cells = <0>; 15 mips-hpt-frequency = <200000000>; 31 periph_osc: periph-osc { 32 compatible = "fixed-clock"; [all …]
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/freebsd/sys/riscv/sifive/ |
H A D | sifive_prci.c | 1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 85 #define PRCI_LOCK(sc) mtx_lock(&(sc)->mtx) 86 #define PRCI_UNLOCK(sc) mtx_unlock(&(sc)->mtx) 87 #define PRCI_ASSERT_LOCKED(sc) mtx_assert(&(sc)->mtx, MA_OWNED); 88 #define PRCI_ASSERT_UNLOCKED(sc) mtx_assert(&(sc)->mtx, MA_NOTOWNED); 101 bus_space_read_4((_sc)->bst, (_sc)->bsh, (_reg)) 103 bus_space_write_4((_sc)->bst, (_sc)->bsh, (_reg), (_val)) 268 { "sifive,fu540-c000-prci", (uintptr_t)&fu540_prci_config }, 269 { "sifive,fu740-c000-prci", (uintptr_t)&fu740_prci_config }, [all …]
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/freebsd/sys/contrib/device-tree/Bindings/serial/ |
H A D | brcm,bcm6345-uart.txt | 5 - compatible: "brcm,bcm6345-uart" 7 - reg: The base address of the UART register bank. 9 - interrupts: A single interrupt specifier. 11 - clocks: Clock driving the hardware; used to figure out the baud rate 17 - clock-names: Should be "refclk". 22 compatible = "brcm,bcm6345-uart"; 24 interrupt-parent = <&periph_intc>; 27 clock-names = "refclk"; 32 compatible = "fixed-clock"; 33 #clock-cells = <0>; [all …]
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/freebsd/sys/contrib/device-tree/src/arm64/freescale/ |
H A D | imx8mm-venice-gw71xx.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/gpio/gpio.h> 7 #include <dt-bindings/leds/common.h> 8 #include <dt-bindings/phy/phy-imx8-pcie.h> 16 led-controller { 17 compatible = "gpio-leds"; 18 pinctrl-names = "default"; 19 pinctrl-0 = <&pinctrl_gpio_leds>; 21 led-0 { 25 default-state = "on"; [all …]
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/freebsd/sys/contrib/device-tree/Bindings/arm/ |
H A D | sp810.txt | 2 ----------------------- 6 - compatible: standard compatible string for a Primecell peripheral, 11 - reg: standard registers property, physical address and size 14 - clock-names: from the common clock bindings, for more details see 15 Documentation/devicetree/bindings/clock/clock-bindings.txt; 16 should be: "refclk", "timclk", "apb_pclk" 18 - clocks: from the common clock bindings, phandle and clock 19 specifier pairs for the entries of clock-names property 21 - #clock-cells: from the common clock bindings; 24 - clock-output-names: from the common clock bindings; [all …]
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/freebsd/sys/contrib/device-tree/src/arm/nxp/imx/ |
H A D | imx6q-bosch-acc.dts | 1 // SPDX-License-Identifier: GPL-2.0 3 * Support for the i.MX6-based Bosch ACC board. 8 * Copyright (C) 2019-2021 Bosch Thermotechnik GmbH, Matthias Winker <matthias.winker@bosch.com> 12 /dts-v1/; 14 #include <dt-bindings/gpio/gpio.h> 15 #include <dt-bindings/leds/common.h> 20 compatible = "bosch,imx6q-acc", "fsl,imx6q"; 37 backlight_lvds: backlight-lvds { 38 compatible = "pwm-backlight"; 40 brightness-levels = <0 61 499 1706 4079 8022 13938 22237 33328 47623 65535>; [all …]
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