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/linux/drivers/clk/mxs/
H A Dclk-imx28.c114 * so set frac0 to get a 288 MHz ref_io0 and ref_io1. in clk_misc_init()
124 static const char *const sel_io1[] __initconst = { "ref_io1", "ref_xtal", };
133 ref_xtal, pll0, pll1, pll2, ref_cpu, ref_emi, ref_io0, ref_io1, enumerator
173 clks[ref_io1] = mxs_clk_ref("ref_io1", "pll0", FRAC0, 2); in mx28_clocks_init()
/linux/Documentation/devicetree/bindings/clock/
H A Dimx28-clock.yaml26 ref_io1 7