/linux/drivers/power/reset/ |
H A D | syscon-reboot-mode.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 11 #include <linux/reboot.h> 14 #include <linux/reboot-mode.h> 18 struct reboot_mode_driver reboot; member 19 u32 offset; member 23 static int syscon_reboot_mode_write(struct reboot_mode_driver *reboot, in syscon_reboot_mode_write() argument 29 syscon_rbm = container_of(reboot, struct syscon_reboot_mode, reboot); in syscon_reboot_mode_write() 31 ret = regmap_update_bits(syscon_rbm->map, syscon_rbm->offset, in syscon_reboot_mode_write() 32 syscon_rbm->mask, magic); in syscon_reboot_mode_write() 34 dev_err(reboot->dev, "update reboot mode bits failed\n"); in syscon_reboot_mode_write() [all …]
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H A D | syscon-reboot.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * Generic Syscon Reboot Driver 14 #include <linux/reboot.h> 19 u32 offset; member 32 /* Issue the reboot */ in syscon_restart_handle() 33 regmap_update_bits(ctx->map, ctx->offset, ctx->mask, ctx->value); in syscon_restart_handle() 44 struct device *dev = &pdev->dev; in syscon_reboot_probe() 49 ctx = devm_kzalloc(&pdev->dev, sizeof(*ctx), GFP_KERNEL); in syscon_reboot_probe() 51 return -ENOMEM; in syscon_reboot_probe() 53 ctx->map = syscon_regmap_lookup_by_phandle(dev->of_node, "regmap"); in syscon_reboot_probe() [all …]
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H A D | hisi-reboot.c | 1 // SPDX-License-Identifier: GPL-2.0-only 17 #include <linux/reboot.h> 19 #include <asm/proc-fns.h> 42 struct device_node *np = pdev->dev.of_node; in hisi_reboot_probe() 48 return -ENODEV; in hisi_reboot_probe() 51 if (of_property_read_u32(np, "reboot-offset", &reboot_offset) < 0) { in hisi_reboot_probe() 52 pr_err("failed to find reboot-offset property\n"); in hisi_reboot_probe() 54 return -EINVAL; in hisi_reboot_probe() 59 dev_err(&pdev->dev, "cannot register restart handler (err=%d)\n", in hisi_reboot_probe() 76 .name = "hisi-reboot",
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H A D | keystone-reset.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * TI keystone reboot driver 14 #include <linux/reboot.h> 43 * rsctrl_enable_rspll_write - enable access to RSCTRL, RSCFG 72 {.compatible = "ti,keystone-reset", }, 85 struct device *dev = &pdev->dev; in rsctrl_probe() 86 struct device_node *np = dev->of_node; in rsctrl_probe() 89 return -ENODEV; in rsctrl_probe() 92 pllctrl_regs = syscon_regmap_lookup_by_phandle(np, "ti,syscon-pll"); in rsctrl_probe() 96 devctrl_regs = syscon_regmap_lookup_by_phandle(np, "ti,syscon-dev"); in rsctrl_probe() [all …]
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/linux/Documentation/devicetree/bindings/power/reset/ |
H A D | syscon-reboot-mode.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only 3 --- 4 $id: http://devicetree.org/schemas/power/reset/syscon-reboot-mode.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Generic SYSCON reboot mode driver 10 - Sebastian Reichel <sre@kernel.org> 13 This driver gets reboot mode magic value from reboot-mode driver 17 parental dt-node plus the offset. So the SYSCON reboot-mode node 18 should be represented as a sub-node of a "syscon", "simple-mfd" node. 22 const: syscon-reboot-mode [all …]
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H A D | syscon-reboot.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/power/reset/syscon-reboot.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Sebastian Reichel <sre@kernel.org> 15 defined by the SYSCON register map base plus the offset with the value and 16 mask defined in the reboot node. Default will be little endian mode, 32 bit 18 parental dt-node. So the SYSCON reboot node should be represented as a 19 sub-node of a "syscon", "simple-mfd" node. Though the regmap property 24 const: syscon-reboot [all …]
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/linux/arch/arm/mach-zynq/ |
H A D | slcr.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 5 * Copyright (c) 2011-2013 Xilinx Inc. 9 #include <linux/reboot.h> 19 #define SLCR_REBOOT_STATUS_OFFSET 0x258 /* PS Reboot Status */ 33 * zynq_slcr_write - Write to a register in SLCR block 36 * @offset: Register offset in SLCR block 40 static int zynq_slcr_write(u32 val, u32 offset) in zynq_slcr_write() argument 42 return regmap_write(zynq_slcr_regmap, offset, val); in zynq_slcr_write() 46 * zynq_slcr_read - Read a register in SLCR block 49 * @offset: Register offset in SLCR block [all …]
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/linux/Documentation/devicetree/bindings/arm/hisilicon/controller/ |
H A D | sysctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Wei Xu <xuwei5@hisilicon.com> 14 used to assist the slave core startup, reboot the system, etc. 19 offset. In addition, the HiP01 system controller has some specific control 23 Hisilicon system controller --> hisilicon,sysctrl 24 HiP01 system controller --> hisilicon,hip01-sysctrl 25 Hi6220 system controller --> hisilicon,hi6220-sysctrl 26 Hi3519 system controller --> hisilicon,hi3519-sysctrl [all …]
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/linux/Documentation/devicetree/bindings/arm/bcm/ |
H A D | brcm,bcm63138.txt | 1 Broadcom BCM63138 DSL System-on-a-Chip device tree bindings 2 ----------------------------------------------------------- 4 Boards compatible with the BCM63138 DSL System-on-a-Chip should have the 13 defined in reset/brcm,bcm63138-pmb.txt for this secondary CPU, and an 14 'enable-method' property. 17 - compatible: should be "brcm,bcm63138-bootlut" 18 - reg: register base address and length for the Boot Lookup table 21 - enable-method: should be "brcm,bcm63138" 24 - enable-method: should be "brcm,bcm63138" 25 - resets: phandle to the relevant PMB controller, one integer indicating the internal [all …]
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H A D | brcm,brcmstb.txt | 2 ----------------------------------------------- 3 Boards with Broadcom Brahma15 ARM-based BCMxxxx (generally BCM7xxx variants) 7 - compatible: "brcm,bcm<chip_id>", "brcm,brcmstb" 11 #address-cells = <2>; 12 #size-cells = <2>; 16 Further, syscon nodes that map platform-specific registers used for general 19 - compatible: "brcm,bcm<chip_id>-sun-top-ctrl", "syscon" 20 - compatible: "brcm,bcm<chip_id>-cpu-biu-ctrl", 21 "brcm,brcmstb-cpu-biu-ctrl", 23 - compatible: "brcm,bcm<chip_id>-hif-continuation", "syscon" [all …]
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/linux/arch/x86/platform/ce4100/ |
H A D | ce4100.c | 1 // SPDX-License-Identifier: GPL-2.0-only 10 #include <linux/reboot.h> 20 #include <asm/emergency-restart.h> 25 * intention to reset, reboot or power off the system. This 8051 device has 36 static unsigned int mem_serial_in(struct uart_port *p, int offset) in mem_serial_in() argument 38 offset = offset << p->regshift; in mem_serial_in() 39 return readl(p->membase + offset); in mem_serial_in() 49 * errata number 9 in Errata - B step. 52 static unsigned int ce4100_mem_serial_in(struct uart_port *p, int offset) in ce4100_mem_serial_in() argument 56 if (offset == UART_IIR) { in ce4100_mem_serial_in() [all …]
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/linux/arch/arm/boot/dts/samsung/ |
H A D | exynos-syscon-restart.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Samsung's Exynos SoC syscon reboot/poweroff nodes common definition. 7 poweroff: syscon-poweroff { 8 compatible = "syscon-poweroff"; 10 offset = <0x330c>; /* PS_HOLD_CONTROL */ 14 reboot: syscon-reboot { label 15 compatible = "syscon-reboot"; 17 offset = <0x0400>; /* SWRESET */
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/linux/Documentation/devicetree/bindings/soc/loongson/ |
H A D | loongson,ls2k-pmc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/soc/loongson/loongson,ls2k-pmc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Loongson-2 Power Manager controller 10 - Yinbo Zhu <zhuyinbo@loongson.cn> 15 - items: 16 - const: loongson,ls2k0500-pmc 17 - const: syscon 18 - items: [all …]
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/linux/Documentation/devicetree/bindings/soc/fsl/ |
H A D | fsl,ls1028a-reset.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas//soc/fsl/fsl,ls1028a-reset.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Frank Li 18 pattern: "^syscon@[0-9a-f]+$" 22 - enum: 23 - fsl,ls1028a-reset 24 - const: syscon 25 - const: simple-mfd [all …]
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/linux/Documentation/devicetree/bindings/mfd/ |
H A D | ti,nspire-misc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 # Copyright (C) 2022-2023 Texas Instruments Incorporated - https://www.ti.com/ 4 --- 5 $id: http://devicetree.org/schemas/mfd/ti,nspire-misc.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Andrew Davis <afd@ti.com> 22 - enum: 23 - ti,nspire-misc 24 - const: syscon 25 - const: simple-mfd [all …]
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/linux/drivers/acpi/ |
H A D | reboot.c | 1 // SPDX-License-Identifier: GPL-2.0 7 #include <acpi/reboot.h> 21 devfn = PCI_DEVFN((rr->address >> 32) & 0xffff, in acpi_pci_reboot() 22 (rr->address >> 16) & 0xffff); in acpi_pci_reboot() 26 (rr->address & 0xffff), reset_value); in acpi_pci_reboot() 52 * checking the bit width and bit offset, but Windows ignores in acpi_reboot() 61 switch (rr->space_id) { in acpi_reboot() 76 * subsequent reboot mechanism. in acpi_reboot() 79 * to reboot on the affected platforms. in acpi_reboot()
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/linux/arch/mips/boot/dts/brcm/ |
H A D | bcm3368.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 #include "dt-bindings/clock/bcm3368-clock.h" 6 #address-cells = <1>; 7 #size-cells = <1>; 11 #address-cells = <1>; 12 #size-cells = <0>; 14 mips-hpt-frequency = <150000000>; 30 periph_clk: periph-clk { 31 compatible = "fixed-clock"; 32 #clock-cells = <0>; [all …]
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/linux/arch/mips/boot/dts/mti/ |
H A D | sead3.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 8 #include <dt-bindings/interrupt-controller/mips-gic.h> 11 #address-cells = <1>; 12 #size-cells = <1>; 13 compatible = "mti,sead-3"; 14 model = "MIPS SEAD-3"; 17 stdout-path = "serial1:115200"; 36 cpu_intc: interrupt-controller { 37 compatible = "mti,cpu-interrupt-controller"; [all …]
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H A D | malta.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 4 #include <dt-bindings/interrupt-controller/irq.h> 5 #include <dt-bindings/interrupt-controller/mips-gic.h> 12 #address-cells = <1>; 13 #size-cells = <1>; 16 cpu_intc: interrupt-controller { 17 compatible = "mti,cpu-interrupt-controller"; 19 interrupt-controller; 20 #interrupt-cells = <1>; [all …]
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/linux/drivers/net/ethernet/sfc/siena/ |
H A D | mcdi.c | 1 // SPDX-License-Identifier: GPL-2.0-only 4 * Copyright 2008-2013 Solarflare Communications Inc. 18 * Management-Controller-to-Driver Interface 25 /* A reboot/assertion causes the MCDI status word to be set after the 26 * command word is set or a REBOOT event is sent. If we notice a reboot 59 "Enable MCDI logging on newly-probed functions"); 66 int rc = -ENOMEM; in efx_siena_mcdi_init() 68 efx->mcdi = kzalloc(sizeof(*efx->mcdi), GFP_KERNEL); in efx_siena_mcdi_init() 69 if (!efx->mcdi) in efx_siena_mcdi_init() 73 mcdi->efx = efx; in efx_siena_mcdi_init() [all …]
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/linux/drivers/net/ethernet/sfc/ |
H A D | mcdi.c | 1 // SPDX-License-Identifier: GPL-2.0-only 4 * Copyright 2008-2013 Solarflare Communications Inc. 17 * Management-Controller-to-Driver Interface 24 /* A reboot/assertion causes the MCDI status word to be set after the 25 * command word is set or a REBOOT event is sent. If we notice a reboot 57 "Enable MCDI logging on newly-probed functions"); 64 int rc = -ENOMEM; in efx_mcdi_init() 66 efx->mcdi = kzalloc(sizeof(*efx->mcdi), GFP_KERNEL); in efx_mcdi_init() 67 if (!efx->mcdi) in efx_mcdi_init() 71 mcdi->efx = efx; in efx_mcdi_init() [all …]
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/linux/arch/sh/kernel/ |
H A D | crash_dump.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * crash_dump.c - Memory preserving reboot related code. 15 size_t csize, unsigned long offset) in copy_oldmem_page() argument 23 csize = copy_to_iter(vaddr + offset, csize, iter); in copy_oldmem_page()
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/linux/arch/x86/kernel/ |
H A D | crash_dump_64.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * Memory preserving reboot related code. 16 size_t csize, unsigned long offset, in __copy_oldmem_page() argument 30 return -ENOMEM; in __copy_oldmem_page() 32 csize = copy_to_iter(vaddr + offset, csize, iter); in __copy_oldmem_page() 39 unsigned long offset) in copy_oldmem_page() argument 41 return __copy_oldmem_page(iter, pfn, csize, offset, false); in copy_oldmem_page() 45 * copy_oldmem_page_encrypted - same as copy_oldmem_page() above but ioremap the 46 * memory with the encryption mask set to accommodate kdump on SME-enabled 50 size_t csize, unsigned long offset) in copy_oldmem_page_encrypted() argument [all …]
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/linux/arch/mips/loongson64/ |
H A D | reset.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 14 #include <linux/reboot.h> 19 #include <asm/reboot.h> 63 /* argv at offset 0, argv[] at offset KEXEC_ARGV_SIZE/2 */ in loongson_kexec_prepare() 64 if (image->type == KEXEC_TYPE_DEFAULT) in loongson_kexec_prepare() 71 for (i = 0; i < image->nr_segments; i++) { in loongson_kexec_prepare() 72 if (!strncmp(bootloader, (char *)image->segment[i].buf, in loongson_kexec_prepare() 80 memcpy(str, image->segment[i].buf, KEXEC_ARGV_SIZE/2); in loongson_kexec_prepare() 86 offt = (int)(ptr - str + 1); in loongson_kexec_prepare() 96 if (image->type == KEXEC_TYPE_DEFAULT) in loongson_kexec_prepare() [all …]
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/linux/Documentation/devicetree/bindings/mips/lantiq/ |
H A D | rcu.txt | 5 where each sub-device has its own set of registers. 14 ------------------------------------------------------------------------------- 16 - compatible : The first and second values must be: 17 "lantiq,xrx200-rcu", "simple-mfd", "syscon" 18 - reg : The address and length of the system control registers 21 ------------------------------------------------------------------------------- 24 compatible = "lantiq,xrx200-rcu", "simple-mfd", "syscon"; 27 big-endian; 29 reset0: reset-controller@10 { 30 compatible = "lantiq,xrx200-reset"; [all …]
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