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/freebsd/sys/contrib/device-tree/src/arm/renesas/
H A Dr8a7792.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car V2H (R8A77920) SoC
8 #include <dt-bindings/clock/r8a7792-cpg-mssr.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/power/r8a7792-sysc.h>
15 #address-cells = <2>;
16 #size-cells = <2>;
37 /* External CAN clock */
38 can_clk: can {
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H A Dr8a7794.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car E2 (R8A77940) SoC
9 #include <dt-bindings/clock/r8a7794-cpg-mssr.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/power/r8a7794-sysc.h>
16 #address-cells = <2>;
17 #size-cells = <2>;
39 compatible = "fixed-clock";
40 #clock-cells = <0>;
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H A Dr8a7743.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2016-2017 Cogent Embedded Inc.
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/clock/r8a7743-cpg-mssr.h>
11 #include <dt-bindings/power/r8a7743-sysc.h>
15 #address-cells = <2>;
16 #size-cells = <2>;
24 compatible = "fixed-clock";
25 #clock-cells = <0>;
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H A Dr8a7744.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/clock/r8a7744-cpg-mssr.h>
11 #include <dt-bindings/power/r8a7744-sysc.h>
15 #address-cells = <2>;
16 #size-cells = <2>;
24 compatible = "fixed-clock";
25 #clock-cells = <0>;
26 clock-frequency = <0>;
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H A Dr8a7791.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car M2-W (R8A77910) SoC
5 * Copyright (C) 2013-2015 Renesas Electronics Corporation
6 * Copyright (C) 2013-2014 Renesas Solutions Corp.
10 #include <dt-bindings/clock/r8a7791-cpg-mssr.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/power/r8a7791-sysc.h>
17 #address-cells = <2>;
18 #size-cells = <2>;
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H A Dr8a7745.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2016-2017 Cogent Embedded Inc.
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/clock/r8a7745-cpg-mssr.h>
11 #include <dt-bindings/power/r8a7745-sysc.h>
15 #address-cells = <2>;
16 #size-cells = <2>;
41 compatible = "fixed-clock";
42 #clock-cells = <0>;
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H A Dr8a7793.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car M2-N (R8A77930) SoC
5 * Copyright (C) 2014-2015 Renesas Electronics Corporation
8 #include <dt-bindings/clock/r8a7793-cpg-mssr.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/power/r8a7793-sysc.h>
15 #address-cells = <2>;
16 #size-cells = <2>;
37 compatible = "fixed-clock";
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H A Dr8a7790.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car H2 (R8A77900) SoC
6 * Copyright (C) 2013-2014 Renesas Solutions Corp.
10 #include <dt-bindings/clock/r8a7790-cpg-mssr.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/power/r8a7790-sysc.h>
17 #address-cells = <2>;
18 #size-cells = <2>;
46 compatible = "fixed-clock";
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H A Dr8a7742.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/clock/r8a7742-cpg-mssr.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/power/r8a7742-sysc.h>
15 #address-cells = <2>;
16 #size-cells = <2>;
24 compatible = "fixed-clock";
25 #clock-cells = <0>;
26 clock-frequency = <0>;
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H A Dr8a77470.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/clock/r8a77470-cpg-mssr.h>
11 #include <dt-bindings/power/r8a77470-sysc.h>
14 #address-cells = <2>;
15 #size-cells = <2>;
26 #address-cells = <1>;
27 #size-cells = <0>;
31 compatible = "arm,cortex-a7";
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/freebsd/sys/contrib/device-tree/Bindings/timer/
H A Drenesas,cmt.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Geert Uytterhoeven <geert+renesas@glider.be>
11 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
14 The CMT is a multi-channel 16/32/48-bit timer/counter with configurable clock
18 are independent. A particular CMT instance can implement only a subset of the
26 - items:
27 - enum:
28 - renesas,r8a7740-cmt0 # 32-bit CMT0 on R-Mobile A1
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/freebsd/sys/contrib/device-tree/Bindings/net/can/
H A Drenesas,rcar-can.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/can/renesas,rcar-can.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas R-Car CAN Controller
10 - Sergei Shtylyov <sergei.shtylyov@gmail.com>
15 - items:
16 - enum:
17 - renesas,can-r8a7778 # R-Car M1-A
18 - renesas,can-r8a7779 # R-Car H1
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H A Drcar_can.txt1 Renesas R-Car CAN controller Device Tree Bindings
2 -------------------------------------------------
5 - compatible: "renesas,can-r8a7742" if CAN controller is a part of R8A7742 SoC.
6 "renesas,can-r8a7743" if CAN controller is a part of R8A7743 SoC.
7 "renesas,can-r8a7744" if CAN controller is a part of R8A7744 SoC.
8 "renesas,can-r8a7745" if CAN controller is a part of R8A7745 SoC.
9 "renesas,can-r8a77470" if CAN controller is a part of R8A77470 SoC.
10 "renesas,can-r8a774a1" if CAN controller is a part of R8A774A1 SoC.
11 "renesas,can-r8a774b1" if CAN controller is a part of R8A774B1 SoC.
12 "renesas,can-r8a774c0" if CAN controller is a part of R8A774C0 SoC.
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/freebsd/sys/contrib/device-tree/Bindings/media/
H A Drenesas,jpu.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Mikhail Ulyanov <mikhail.ulyanov@cogentembedded.com>
15 JPU can encode image data and decode JPEG data quickly.
20 - enum:
21 - renesas,jpu-r8a7790 # R-Car H2
22 - renesas,jpu-r8a7791 # R-Car M2-W
23 - renesas,jpu-r8a7792 # R-Car V2H
24 - renesas,jpu-r8a7793 # R-Car M2-N
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H A Drenesas,jpu.txt5 can encode image data and decode JPEG data quickly.
8 - compatible: "renesas,jpu-<soctype>", "renesas,rcar-gen2-jpu" as fallback.
10 - "renesas,jpu-r8a7790" for R-Car H2
11 - "renesas,jpu-r8a7791" for R-Car M2-W
12 - "renesas,jpu-r8a7792" for R-Car V2H
13 - "renesas,jpu-r8a7793" for R-Car M2-N
15 - reg: Base address and length of the registers block for the JPU.
16 - interrupts: JPU interrupt specifier.
17 - clocks: A phandle + clock-specifier pair for the JPU functional clock.
19 Example: R8A7790 (R-Car H2) JPU node
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/freebsd/sys/contrib/device-tree/Bindings/sound/
H A Drenesas,rsnd.txt1 Renesas R-Car sound
7 Renesas R-Car and RZ/G sound is constructed from below modules
8 (for Gen2 or later)
11 - SRC : Sampling Rate Converter
12 - CMD
13 - CTU : Channel Transfer Unit
14 - MIX : Mixer
15 - DVC : Digital Volume and Mute Function
25 Multi channel is supported by Multi-SSI, or TDM-SS
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