Searched +full:r9a09g057 +full:- +full:usb2phy +full:- +full:reset (Results 1 – 3 of 3) sorted by relevance
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---4 $id: http://devicetree.org/schemas/reset/renesas,rzv2h-usb2phy-reset.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: Renesas RZ/V2H(P) USB2PHY Port reset Control10 - Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>13 The RZ/V2H(P) USB2PHY Control mainly controls Port reset and power down of the19 - items:20 - const: renesas,r9a09g056-usb2phy-reset # RZ/V2N21 - const: renesas,r9a09g057-usb2phy-reset[all …]
1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)8 #include <dt-bindings/clock/renesas,r9a09g056-cpg.h>9 #include <dt-bindings/interrupt-controller/arm-gic.h>10 #include <dt-bindings/pinctrl/rzg2l-pinctrl.h>12 /* RZV2N_Px = Offset address of PFC_P_mn - 0x20 */31 #address-cells = <2>;32 #size-cells = <2>;34 audio_extal_clk: audio-clk {35 compatible = "fixed-clock";36 #clock-cells = <0>;[all …]
1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)8 #include <dt-bindings/clock/renesas,r9a09g057-cpg.h>9 #include <dt-bindings/interrupt-controller/arm-gic.h>12 compatible = "renesas,r9a09g057";13 #address-cells = <2>;14 #size-cells = <2>;16 audio_extal_clk: audio-clk {17 compatible = "fixed-clock";18 #clock-cells = <0>;20 clock-frequency = <0>;[all …]