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Searched +full:r9a09g047 +full:- +full:xspi (Results 1 – 6 of 6) sorted by relevance

/freebsd/sys/contrib/device-tree/Bindings/memory-controllers/
H A Drenesas,rzg3e-xspi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/renesas,rzg3e-xspi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas Expanded Serial Peripheral Interface (xSPI)
10 - Biju Das <biju.das.jz@bp.renesas.com>
13 Renesas xSPI allows a SPI flash connected to the SoC to be accessed via
14 the memory-mapping or the manual command mode.
16 The flash chip itself should be represented by a subnode of the XSPI node.
19 - "jedec,spi-nor";
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/freebsd/sys/contrib/device-tree/Bindings/soc/renesas/
H A Drenesas,r9a09g057-sys.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/renesas/renesas,r9a09g057-sys.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Geert Uytterhoeven <geert+renesas@glider.be>
15 - Trust zone control
16 - Extend access by specific masters to address beyond 4GB space
17 - GBETH configuration
18 - Control of settings and states of SRAM/PCIe/CM33/CA55/CR8/xSPI/ADC/TSU
19 - LSI version
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/freebsd/sys/contrib/device-tree/src/arm64/renesas/
H A Dr9a09g047.dtsi1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
8 #include <dt-bindings/clock/renesas,r9a09g047-cpg.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 compatible = "renesas,r9a09g047";
13 #address-cells = <2>;
14 #size-cells = <2>;
16 audio_extal_clk: audio-clk {
17 compatible = "fixed-clock";
18 #clock-cells = <0>;
20 clock-frequency = <0>;
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H A Drzg3e-smarc-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
13 * 0 - SD0 is connected to eMMC (default)
14 * 1 - SD0 is connected to uSD0 card
17 * 0 - Select Misc. Signals routing
18 * 1 - Select LCD
21 * 0 - Select CAN routing
22 * 1 - Select PDM
26 compatible = "renesas,rzg3e-smarcm", "renesas,r9a09g047e57", "renesas,r9a09g047";
42 reg_1p8v: regulator-1p8v {
43 compatible = "regulator-fixed";
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H A Dr9a09g056.dtsi1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
8 #include <dt-bindings/clock/renesas,r9a09g056-cpg.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/pinctrl/rzg2l-pinctrl.h>
12 /* RZV2N_Px = Offset address of PFC_P_mn - 0x20 */
31 #address-cells = <2>;
32 #size-cells = <2>;
34 audio_extal_clk: audio-clk {
35 compatible = "fixed-clock";
36 #clock-cells = <0>;
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H A Dr9a09g057.dtsi1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
8 #include <dt-bindings/clock/renesas,r9a09g057-cpg.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #address-cells = <2>;
14 #size-cells = <2>;
16 audio_extal_clk: audio-clk {
17 compatible = "fixed-clock";
18 #clock-cells = <0>;
20 clock-frequency = <0>;
30 cluster0_opp: opp-table-0 {
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