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Searched +full:r9a07g044 +full:- +full:gpt (Results 1 – 5 of 5) sorted by relevance

/linux/Documentation/devicetree/bindings/pinctrl/
H A Drenesas,rzg2l-poeg.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/renesas,rzg2l-poeg.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas RZ/G2L Port Output Enable for GPT (POEG)
10 - Biju Das <biju.das.jz@bp.renesas.com>
13 The output pins(GTIOCxA and GTIOCxB) of the general PWM timer (GPT) can be
14 disabled by using the port output enabling function for the GPT (POEG).
17 * Output-disable request from the GPT.
21 are controlled by the GPT module.
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/linux/Documentation/devicetree/bindings/pwm/
H A Drenesas,rzg2l-gpt.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pwm/renesas,rzg2l-gpt.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas RZ/G2L General PWM Timer (GPT)
10 - Biju Das <biju.das.jz@bp.renesas.com>
13 RZ/G2L General PWM Timer (GPT) composed of 8 channels with 32-bit timer
16 * Up-counting or down-counting (saw waves) or up/down-counting
36 short-circuits between output pins.
42 pwm0 - GPT32E0.GTIOC0A channel
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/linux/arch/arm64/boot/dts/renesas/
H A Dr9a07g044.dtsi1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/clock/r9a07g044-cpg.h>
12 compatible = "renesas,r9a07g044";
13 #address-cells = <2>;
14 #size-cells = <2>;
16 audio_clk1: audio1-clk {
17 compatible = "fixed-clock";
18 #clock-cells = <0>;
20 clock-frequency = <0>;
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H A Dr9a07g044l2-smarc.dts1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
8 /dts-v1/;
31 * To enable the GPT pins GTIOC4A(PMOD0_PIN7) and GTIOC4B(PMOD0_PIN10) on the
38 #include "rzg2l-smarc-som.dtsi"
39 #include "rzg2l-smarc-pinfunction.dtsi"
40 #include "rz-smarc-common.dtsi"
41 #include "rzg2l-smarc.dtsi"
45 compatible = "renesas,smarc-evk", "renesas,r9a07g044l2", "renesas,r9a07g044";
H A Dr9a07g054.dtsi1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/clock/r9a07g054-cpg.h>
13 #address-cells = <2>;
14 #size-cells = <2>;
16 audio_clk1: audio1-clk {
17 compatible = "fixed-clock";
18 #clock-cells = <0>;
20 clock-frequency = <0>;
23 audio_clk2: audio2-clk {
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