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/freebsd/sys/contrib/device-tree/src/arm/renesas/
H A Dr7s72100.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the r7s72100 SoC
5 * Copyright (C) 2013-14 Renesas Solutions Corp.
6 * Copyright (C) 2014 Wolfram Sang, Sang Engineering <wsa@sang-engineering.com>
9 #include <dt-bindings/clock/r7s72100-clock.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
14 compatible = "renesas,r7s72100";
15 #address-cells = <1>;
16 #size-cells = <1>;
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H A Dr7s72100-genmai.dts1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2013-14 Renesas Solutions Corp.
6 * Copyright (C) 2014 Wolfram Sang, Sang Engineering <wsa@sang-engineering.com>
9 /dts-v1/;
10 #include "r7s72100.dtsi"
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/pinctrl/r7s7210
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H A Dr7s72100-gr-peach.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the GR-Peach board
9 /dts-v1/;
10 #include "r7s72100.dtsi"
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/pinctrl/r7s72100
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H A Dr7s72100-rskrza1.dts1 // SPDX-License-Identifier: GPL-2.0
8 /dts-v1/;
9 #include "r7s72100.dtsi"
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/input/input.h>
12 #include <dt-bindings/pinctrl/r7s72100
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H A Dgr-peach-audiocamerashield.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the GR-Peach audiocamera shield expansion board
8 #include "r7s72100.dtsi"
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/pinctrl/r7s72100-pinctrl.h>
13 /* On-board camera clock. */
15 compatible = "fixed-clock";
16 #clock-cells = <0>;
17 clock-frequency = <27000000>;
21 &pinctrl {
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/freebsd/sys/contrib/device-tree/Bindings/pinctrl/
H A Drenesas,rza1-ports.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/renesa
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H A Drenesas,rza1-pinctrl.txt5 Pin multiplexing and GPIO configuration is performed on a per-pin basis
6 writing configuration values to per-port register sets.
12 -------------------
15 - compatible: should be:
16 - "renesas,r7s72100-ports": for RZ/A1H
17 - "renesas,r7s72101-ports", "renesas,r7s72100-ports": for RZ/A1M
18 - "renesas,r7s72102-ports": for RZ/A1L
20 - reg
25 Pin controller node for RZ/A1H SoC (r7s72100)
27 pinctrl: pin-controller@fcfe3000 {
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/freebsd/sys/contrib/device-tree/Bindings/i2c/
H A Drenesas,riic.txt4 - compatible :
5 "renesas,riic-r7s72100" if the device is a part of a R7S72100 SoC.
6 "renesas,riic-r7s9210" if the device is a part of a R7S9210 SoC.
7 "renesas,riic-rz" for a generic RZ/A compatible device.
8 - reg : address start and address range size of device
9 - interrupts : 8 interrupts (TEI, RI, TI, SPI, STI, NAKI, ALI, TMOI)
10 - clock-frequency : frequency of bus clock in Hz
11 - #address-cells : should be <1>
12 - #size-cells : should be <0>
14 Pinctrl properties might be needed, too. See there.
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/freebsd/sys/contrib/device-tree/Bindings/mmc/
H A Drenesas,sdhi.txt4 - compatible: should contain one or more of the following:
5 "renesas,sdhi-sh73a0" - SDHI IP on SH73A0 SoC
6 "renesas,sdhi-r7s72100" - SDHI IP on R7S72100 SoC
7 "renesas,sdhi-r7s9210" - SDHI IP on R7S9210 SoC
8 "renesas,sdhi-r8a73a4" - SDHI IP on R8A73A4 SoC
9 "renesas,sdhi-r8a7740" - SDHI IP on R8A7740 SoC
10 "renesas,sdhi-r8a7742" - SDHI IP on R8A7742 SoC
11 "renesas,sdhi-r8a7743" - SDHI IP on R8A7743 SoC
12 "renesas,sdhi-r8a7744" - SDHI IP on R8A7744 SoC
13 "renesas,sdhi-r8a7745" - SDHI IP on R8A7745 SoC
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H A Drenesas,sdhi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Wolfram Sang <wsa+renesas@sang-engineering.com>
15 - enum:
16 - renesas,sdhi-mmc-r8a77470 # RZ/G1C
17 - renesas,sdhi-r7s72100 # RZ/A1H
18 - renesas,sdhi-r7s9210 # SH-Mobile AG5
19 - renesas,sdhi-r8a73a4 # R-Mobile APE6
20 - renesas,sdhi-r8a7740 # R-Mobile A1
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