Searched +full:quirk +full:- +full:frame +full:- +full:length +full:- +full:adjustment (Results 1 – 14 of 14) sorted by relevance
| /linux/Documentation/devicetree/bindings/usb/ |
| H A D | snps,dwc3-common.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/usb/snps,dwc3-common.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Felipe Balbi <balbi@kernel.org> 14 vendor-specific implementation or as a standalone component. 17 - $ref: usb-drd.yaml# 18 - if: 24 - dr_mode 28 $ref: usb-xhci.yaml# [all …]
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| H A D | amlogic,meson-g12a-usb-ctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/usb/amlogic,meson-g12a-usb-ctrl.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Neil Armstrong <neil.armstrong@linaro.org> 15 in host-only mode, and a DWC2 IP Core configured for USB2 peripheral mode 20 One of the USB2 PHYs can be re-routed in peripheral mode to a DWC2 USB IP. 26 host-only mode. 33 - amlogic,meson-gxl-usb-ctrl 34 - amlogic,meson-gxm-usb-ctrl [all …]
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| /linux/arch/arm64/boot/dts/freescale/ |
| H A D | fsl-ls1043a.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Device Tree Include file for NXP Layerscape-1043A family SoC. 5 * Copyright 2014-2015 Freescale Semiconductor, Inc. 11 #include <dt-bindings/clock/fsl,qoriq-clockgen.h> 12 #include <dt-bindings/thermal/thermal.h> 13 #include <dt-bindings/interrupt-controller/arm-gic.h> 14 #include <dt-bindings/gpio/gpio.h> 18 interrupt-parent = <&gic>; 19 #address-cells = <2>; 20 #size-cells = <2>; [all …]
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| H A D | fsl-ls1046a.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Device Tree Include file for NXP Layerscape-1046A family SoC. 11 #include <dt-bindings/clock/fsl,qoriq-clockgen.h> 12 #include <dt-bindings/interrupt-controller/arm-gic.h> 13 #include <dt-bindings/thermal/thermal.h> 14 #include <dt-bindings/gpio/gpio.h> 18 interrupt-parent = <&gic>; 19 #address-cells = <2>; 20 #size-cells = <2>; 37 #address-cells = <1>; [all …]
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| H A D | fsl-ls1088a.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Device Tree Include file for NXP Layerscape-1088A family SoC. 5 * Copyright 2017-2020 NXP 10 #include <dt-bindings/clock/fsl,qoriq-clockgen.h> 11 #include <dt-bindings/interrupt-controller/arm-gic.h> 12 #include <dt-bindings/thermal/thermal.h> 16 interrupt-parent = <&gic>; 17 #address-cells = <2>; 18 #size-cells = <2>; 26 #address-cells = <1>; [all …]
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| H A D | fsl-ls208xa.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Device Tree Include file for Freescale Layerscape-2080A family SoC. 6 * Copyright 2017-2020 NXP 12 #include <dt-bindings/clock/fsl,qoriq-clockgen.h> 13 #include <dt-bindings/thermal/thermal.h> 14 #include <dt-bindings/interrupt-controller/arm-gic.h> 18 interrupt-parent = <&gic>; 19 #address-cells = <2>; 20 #size-cells = <2>; 32 #address-cells = <1>; [all …]
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| H A D | fsl-ls1012a.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Device Tree Include file for NXP Layerscape-1012A family SoC. 6 * Copyright 2019-2020 NXP 10 #include <dt-bindings/clock/fsl,qoriq-clockgen.h> 11 #include <dt-bindings/interrupt-controller/arm-gic.h> 12 #include <dt-bindings/thermal/thermal.h> 16 interrupt-parent = <&gic>; 17 #address-cells = <2>; 18 #size-cells = <2>; 23 rtic-a = &rtic_a; [all …]
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| H A D | fsl-ls1028a.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Device Tree Include file for NXP Layerscape-1028A family SoC. 5 * Copyright 2018-2020 NXP 11 #include <dt-bindings/clock/fsl,qoriq-clockgen.h> 12 #include <dt-bindings/interrupt-controller/arm-gic.h> 13 #include <dt-bindings/thermal/thermal.h> 17 interrupt-parent = <&gic>; 18 #address-cells = <2>; 19 #size-cells = <2>; 22 #address-cells = <1>; [all …]
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| H A D | fsl-lx2160a.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 3 // Device Tree Include file for Layerscape-LX2160A family SoC. 5 // Copyright 2018-2020 NXP 7 #include <dt-bindings/clock/fsl,qoriq-clockgen.h> 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/thermal/thermal.h> 16 interrupt-parent = <&gic>; 17 #address-cells = <2>; 18 #size-cells = <2>; [all …]
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| /linux/drivers/usb/dwc3/ |
| H A D | core.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * core.c - DesignWare USB3 DRD Controller Core file 5 * Copyright (C) 2010-2011 Texas Instruments Incorporated - https://www.ti.com 24 #include <linux/dma-mapping.h> 45 #include "../host/xhci-ext-caps.h" 50 * dwc3_get_dr_mode - Validates and sets dr_mode 56 struct device *dev = dwc->dev; in dwc3_get_dr_mode() 59 if (dwc->dr_mode == USB_DR_MODE_UNKNOWN) in dwc3_get_dr_mode() 60 dwc->dr_mode = USB_DR_MODE_OTG; in dwc3_get_dr_mode() 62 mode = dwc->dr_mode; in dwc3_get_dr_mode() [all …]
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| /linux/Documentation/virt/kvm/ |
| H A D | api.rst | 1 .. SPDX-License-Identifier: GPL-2.0 4 The Definitive KVM (Kernel-based Virtual Machine) API Documentation 24 - System ioctls: These query and set global attributes which affect the 28 - VM ioctls: These query and set attributes that affect an entire virtual 35 - vcpu ioctls: These query and set attributes that control the operation 43 - device ioctls: These query and set attributes that control the operation 92 facility that allows backward-compatible extensions to the API to be 133 ----------------------- 150 ----------------- 189 address used by the VM. The IPA_Bits is encoded in bits[7-0] of the [all …]
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| /linux/arch/arm64/boot/dts/amlogic/ |
| H A D | meson-g12-common.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/phy/phy.h> 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/clock/g12a-clkc.h> 9 #include <dt-bindings/clock/g12a-aoclkc.h> 10 #include <dt-bindings/interrupt-controller/irq.h> 11 #include <dt-bindings/interrupt-controller/arm-gic.h> 12 #include <dt-bindings/interrupt-controller/amlogic,meson-g12a-gpio-intc.h> 13 #include <dt-bindings/reset/amlogic,meson-g12a-reset.h> 14 #include <dt-bindings/thermal/thermal.h> [all …]
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| /linux/drivers/infiniband/hw/hfi1/ |
| H A D | chip.c | 1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause 3 * Copyright(c) 2015 - 2020 Intel Corporation. 32 MODULE_PARM_DESC(num_vls, "Set number of Virtual Lanes to use (1-8)"); 78 #define SEC_SC_HALTED 0x4 /* per-context only */ 79 #define SEC_SPC_FREEZE 0x8 /* per-HFI only */ 87 * 0 - User Fecn Handling 88 * 1 - Vnic 89 * 2 - AIP 90 * 3 - Verbs 101 #define emulator_rev(dd) ((dd)->irev >> 8) [all …]
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| /linux/drivers/gpu/drm/amd/display/amdgpu_dm/ |
| H A D | amdgpu_dm.c | 1 // SPDX-License-Identifier: MIT 99 #include <media/cec-notifier.h> 181 switch (link->dpcd_caps.dongle_type) { in get_subconnector_type() 200 struct dc_link *link = aconnector->dc_link; in update_subconnector_property() 201 struct drm_connector *connector = &aconnector->base; in update_subconnector_property() 204 if (connector->connector_type != DRM_MODE_CONNECTOR_DisplayPort) in update_subconnector_property() 207 if (aconnector->dc_sink) in update_subconnector_property() 210 drm_object_property_set_value(&connector->base, in update_subconnector_property() 211 connector->dev->mode_config.dp_subconnector_property, in update_subconnector_property() 259 * struct amdgpu_device *adev - [in] desired amdgpu device [all …]
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