/linux/Documentation/devicetree/bindings/soc/fsl/ |
H A D | fsl,rcpm.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/soc/fsl/fsl,rcpm.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 The RCPM performs all device-level tasks associated with device run control 14 - Frank Li <Frank.Li@nxp.com> 19 - items: 20 - enum: 21 - fsl,p2041-rcpm 22 - fsl,p3041-rcpm [all …]
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/linux/arch/powerpc/boot/dts/fsl/ |
H A D | b4420si-post.dtsi | 20 * Foundation, either version 2 of that License or (at your option) any 35 /include/ "b4si-post.dtsi" 39 compatible = "fsl,b4420-pcie", "fsl,qoriq-pcie-v2.4"; 43 dcsr-epu@0 { 44 compatible = "fsl,b4420-dcsr-epu", "fsl,dcsr-epu"; 46 dcsr-npc { 47 compatible = "fsl,b4420-dcsr-cnpc", "fsl,dcsr-cnpc"; 49 dcsr-dpaa@9000 { 50 compatible = "fsl,b4420-dcsr-dpaa", "fsl,dcsr-dpaa"; 52 dcsr-ocn@11000 { [all …]
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H A D | p5040si-post.dtsi | 4 * Copyright 2012 - 2015 Freescale Semiconductor Inc. 20 * Foundation, either version 2 of that License or (at your option) any 36 compatible = "fsl,bman-fbpr"; 37 alloc-ranges = <0 0 0x10000 0>; 41 compatible = "fsl,qman-fqd"; 42 alloc-ranges = <0 0 0x10000 0>; 46 compatible = "fsl,qman-pfdr"; 47 alloc-ranges = <0 0 0x10000 0>; 51 compatible = "fsl,p5040-elbc", "fsl,elbc", "simple-bus"; 52 interrupts = <25 2 0 0>; [all …]
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H A D | b4860si-post.dtsi | 4 * Copyright 2012 - 2015 Freescale Semiconductor Inc. 20 * Foundation, either version 2 of that License or (at your option) any 35 /include/ "b4si-post.dtsi" 39 compatible = "fsl,b4860-pcie", "fsl,qoriq-pcie-v2.4"; 44 interrupts = <16 2 1 20>; 45 #address-cells = <2>; 46 #size-cells = <2>; 47 fsl,iommu-parent = <&pamu0>; 51 #address-cells = <2>; 52 #size-cells = <2>; [all …]
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H A D | t1023si-post.dtsi | 20 * Foundation, either version 2 of that License or (at your option) any 35 #include <dt-bindings/thermal/thermal.h> 38 compatible = "fsl,bman-fbpr"; 39 alloc-ranges = <0 0 0x10000 0>; 43 compatible = "fsl,qman-fqd"; 44 alloc-ranges = <0 0 0x10000 0>; 48 compatible = "fsl,qman-pfdr"; 49 alloc-ranges = <0 0 0x10000 0>; 53 #address-cells = <2>; 54 #size-cells = <1>; [all …]
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H A D | p5020si-post.dtsi | 4 * Copyright 2011 - 2015 Freescale Semiconductor Inc. 20 * Foundation, either version 2 of that License or (at your option) any 36 compatible = "fsl,bman-fbpr"; 37 alloc-ranges = <0 0 0x10000 0>; 41 compatible = "fsl,qman-fqd"; 42 alloc-ranges = <0 0 0x10000 0>; 46 compatible = "fsl,qman-pfdr"; 47 alloc-ranges = <0 0 0x10000 0>; 51 compatible = "fsl,p5020-elbc", "fsl,elbc", "simple-bus"; 52 interrupts = <25 2 0 0>; [all …]
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H A D | p3041si-post.dtsi | 4 * Copyright 2011 - 2015 Freescale Semiconductor Inc. 20 * Foundation, either version 2 of that License or (at your option) any 36 compatible = "fsl,bman-fbpr"; 37 alloc-ranges = <0 0 0x10 0>; 41 compatible = "fsl,qman-fqd"; 42 alloc-ranges = <0 0 0x10 0>; 46 compatible = "fsl,qman-pfdr"; 47 alloc-ranges = <0 0 0x10 0>; 51 compatible = "fsl,p3041-elbc", "fsl,elbc", "simple-bus"; 52 interrupts = <25 2 0 0>; [all …]
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H A D | p2041si-post.dtsi | 4 * Copyright 2011 - 2015 Freescale Semiconductor Inc. 20 * Foundation, either version 2 of that License or (at your option) any 36 compatible = "fsl,bman-fbpr"; 37 alloc-ranges = <0 0 0x10 0>; 41 compatible = "fsl,qman-fqd"; 42 alloc-ranges = <0 0 0x10 0>; 46 compatible = "fsl,qman-pfdr"; 47 alloc-ranges = <0 0 0x10 0>; 51 compatible = "fsl,p2041-elbc", "fsl,elbc", "simple-bus"; 52 interrupts = <25 2 0 0>; [all …]
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H A D | b4si-post.dtsi | 4 * Copyright 2012 - 2015 Freescale Semiconductor, Inc. 20 * Foundation, either version 2 of that License or (at your option) any 36 compatible = "fsl,bman-fbpr"; 37 alloc-ranges = <0 0 0x10000 0>; 41 compatible = "fsl,qman-fqd"; 42 alloc-ranges = <0 0 0x10000 0>; 46 compatible = "fsl,qman-pfdr"; 47 alloc-ranges = <0 0 0x10000 0>; 51 #address-cells = <2>; 52 #size-cells = <1>; [all …]
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H A D | p4080si-post.dtsi | 4 * Copyright 2011 - 2015 Freescale Semiconductor Inc. 20 * Foundation, either version 2 of that License or (at your option) any 36 compatible = "fsl,bman-fbpr"; 37 alloc-ranges = <0 0 0x10 0>; 41 compatible = "fsl,qman-fqd"; 42 alloc-ranges = <0 0 0x10 0>; 46 compatible = "fsl,qman-pfdr"; 47 alloc-ranges = <0 0 0x10 0>; 51 compatible = "fsl,p4080-elbc", "fsl,elbc", "simple-bus"; 52 interrupts = <25 2 0 0>; [all …]
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H A D | t2081si-post.dtsi | 4 * Copyright 2013 - 2014 Freescale Semiconductor Inc. 20 * Foundation, either version 2 of that License or (at your option) any 36 compatible = "fsl,bman-fbpr"; 37 alloc-ranges = <0 0 0x10000 0>; 41 compatible = "fsl,qman-fqd"; 42 alloc-ranges = <0 0 0x10000 0>; 46 compatible = "fsl,qman-pfdr"; 47 alloc-ranges = <0 0 0x10000 0>; 51 #address-cells = <2>; 52 #size-cells = <1>; [all …]
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H A D | t1040si-post.dtsi | 4 * Copyright 2013 - 2014 Freescale Semiconductor Inc. 20 * Foundation, either version 2 of that License or (at your option) any 35 #include <dt-bindings/thermal/thermal.h> 38 compatible = "fsl,bman-fbpr"; 39 alloc-ranges = <0 0 0x10000 0>; 43 compatible = "fsl,qman-fqd"; 44 alloc-ranges = <0 0 0x10000 0>; 48 compatible = "fsl,qman-pfdr"; 49 alloc-ranges = <0 0 0x10000 0>; 53 #address-cells = <2>; [all …]
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H A D | t4240si-post.dtsi | 4 * Copyright 2012 - 2015 Freescale Semiconductor Inc. 20 * Foundation, either version 2 of that License or (at your option) any 36 compatible = "fsl,bman-fbpr"; 37 alloc-ranges = <0 0 0x10000 0>; 41 compatible = "fsl,qman-fqd"; 42 alloc-ranges = <0 0 0x10000 0>; 46 compatible = "fsl,qman-pfdr"; 47 alloc-ranges = <0 0 0x10000 0>; 51 #address-cells = <2>; 52 #size-cells = <1>; [all …]
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/linux/drivers/soc/fsl/ |
H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 3 # NXP/Freescale QorIQ series SOC drivers 6 menu "NXP/Freescale QorIQ SoC drivers" 16 enabling, power-onreset(POR) configuration monitoring, alternate 24 tristate "QorIQ DPAA2 DPIO driver" 37 tristate "QorIQ DPAA2 console driver" 41 Console driver for DPAA2 platforms. Exports 2 char devices, 47 bool "Freescale RCPM support" 50 The NXP QorIQ Processors based on ARM Core have RCPM module 51 (Run Control and Power Management), which performs all device-level [all …]
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/linux/arch/arm64/boot/dts/freescale/ |
H A D | fsl-ls1088a.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Device Tree Include file for NXP Layerscape-1088A family SoC. 5 * Copyright 2017-2020 NXP 10 #include <dt-bindings/clock/fsl,qoriq-clockgen.h> 11 #include <dt-bindings/interrupt-controller/arm-gic.h> 12 #include <dt-bindings/thermal/thermal.h> 16 interrupt-parent = <&gic>; 17 #address-cells = <2>; 18 #size-cells = <2>; 26 #address-cells = <1>; [all …]
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H A D | fsl-ls1012a.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Device Tree Include file for NXP Layerscape-1012A family SoC. 6 * Copyright 2019-2020 NXP 10 #include <dt-bindings/clock/fsl,qoriq-clockgen.h> 11 #include <dt-bindings/interrupt-controller/arm-gic.h> 12 #include <dt-bindings/thermal/thermal.h> 16 interrupt-parent = <&gic>; 17 #address-cells = <2>; 18 #size-cells = <2>; 23 rtic-a = &rtic_a; [all …]
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H A D | fsl-ls208xa.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Device Tree Include file for Freescale Layerscape-2080A family SoC. 6 * Copyright 2017-2020 NXP 12 #include <dt-bindings/clock/fsl,qoriq-clockgen.h> 13 #include <dt-bindings/thermal/thermal.h> 14 #include <dt-bindings/interrupt-controller/arm-gic.h> 18 interrupt-parent = <&gic>; 19 #address-cells = <2>; 20 #size-cells = <2>; 32 #address-cells = <1>; [all …]
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H A D | fsl-ls1046a.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Device Tree Include file for NXP Layerscape-1046A family SoC. 11 #include <dt-bindings/clock/fsl,qoriq-clockgen.h> 12 #include <dt-bindings/interrupt-controller/arm-gic.h> 13 #include <dt-bindings/thermal/thermal.h> 14 #include <dt-bindings/gpio/gpio.h> 18 interrupt-parent = <&gic>; 19 #address-cells = <2>; 20 #size-cells = <2>; 37 #address-cells = <1>; [all …]
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H A D | fsl-ls1043a.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Device Tree Include file for NXP Layerscape-1043A family SoC. 5 * Copyright 2014-2015 Freescale Semiconductor, Inc. 11 #include <dt-bindings/clock/fsl,qoriq-clockgen.h> 12 #include <dt-bindings/thermal/thermal.h> 13 #include <dt-bindings/interrupt-controller/arm-gic.h> 14 #include <dt-bindings/gpio/gpio.h> 18 interrupt-parent = <&gic>; 19 #address-cells = <2>; 20 #size-cells = <2>; [all …]
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H A D | fsl-lx2160a.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 3 // Device Tree Include file for Layerscape-LX2160A family SoC. 5 // Copyright 2018-2020 NXP 7 #include <dt-bindings/clock/fsl,qoriq-clockgen.h> 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/thermal/thermal.h> 16 interrupt-parent = <&gic>; 17 #address-cells = <2>; 18 #size-cells = <2>; [all …]
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H A D | fsl-ls1028a.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Device Tree Include file for NXP Layerscape-1028A family SoC. 5 * Copyright 2018-2020 NXP 11 #include <dt-bindings/clock/fsl,qoriq-clockgen.h> 12 #include <dt-bindings/interrupt-controller/arm-gic.h> 13 #include <dt-bindings/thermal/thermal.h> 17 interrupt-parent = <&gic>; 18 #address-cells = <2>; 19 #size-cells = <2>; 22 #address-cells = <1>; [all …]
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/linux/arch/powerpc/sysdev/ |
H A D | fsl_rcpm.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * RCPM(Run Control/Power Management) support 5 * Copyright 2012-2015 Freescale Semiconductor Inc. 32 setbits32(&rcpm_v1_regs->cpmimr, mask); in rcpm_v1_irq_mask() 33 setbits32(&rcpm_v1_regs->cpmcimr, mask); in rcpm_v1_irq_mask() 34 setbits32(&rcpm_v1_regs->cpmmcmr, mask); in rcpm_v1_irq_mask() 35 setbits32(&rcpm_v1_regs->cpmnmimr, mask); in rcpm_v1_irq_mask() 43 setbits32(&rcpm_v2_regs->tpmimr0, mask); in rcpm_v2_irq_mask() 44 setbits32(&rcpm_v2_regs->tpmcimr0, mask); in rcpm_v2_irq_mask() 45 setbits32(&rcpm_v2_regs->tpmmcmr0, mask); in rcpm_v2_irq_mask() [all …]
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/linux/arch/arm/boot/dts/nxp/ls/ |
H A D | ls1021a.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Copyright 2013-2014 Freescale Semiconductor, Inc. 6 #include <dt-bindings/interrupt-controller/arm-gic.h> 7 #include <dt-bindings/thermal/thermal.h> 10 #address-cells = <2>; 11 #size-cells = <2>; 12 interrupt-parent = <&gic>; 30 #address-cells = <1>; 31 #size-cells = <0>; 34 compatible = "arm,cortex-a7"; [all …]
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