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Searched +full:qman +full:- +full:channel +full:- +full:id (Results 1 – 19 of 19) sorted by relevance

/freebsd/sys/dts/powerpc/
H A Dp3041si.dtsi4 * Copyright 2010-2011 Freescale Semiconductor Inc.
35 /dts-v1/;
39 #address-cells = <2>;
40 #size-cells = <2>;
41 interrupt-parent = <&mpic>;
66 qman = &qman;
102 #address-cells = <1>;
103 #size-cells = <0>;
108 bus-frequency = <749999996>;
109 next-level-cache = <&L2_0>;
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H A Dp2041si.dtsi35 /dts-v1/;
39 #address-cells = <2>;
40 #size-cells = <2>;
41 interrupt-parent = <&mpic>;
65 qman = &qman;
101 #address-cells = <1>;
102 #size-cells = <0>;
107 bus-frequency = <749999996>;
108 next-level-cache = <&L2_0>;
109 L2_0: l2-cache {
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H A Dp5020si.dtsi4 * Copyright 2010-2011 Freescale Semiconductor Inc.
35 /dts-v1/;
39 #address-cells = <2>;
40 #size-cells = <2>;
41 interrupt-parent = <&mpic>;
66 qman = &qman;
108 #address-cells = <1>;
109 #size-cells = <0>;
114 bus-frequency = <799999998>;
115 next-level-cache = <&L2_0>;
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/freebsd/sys/contrib/device-tree/Bindings/soc/fsl/
H A Dfsl,qman-portal.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/fsl/fsl,qman-portal.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Frank Li <Frank.Li@nxp.com>
13 Portals are memory mapped interfaces to QMan that allow low-latency, lock-less
15 interfaces with the QMan
20 - const: fsl,qman-portal
21 - items:
22 - enum:
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H A Dqman-portals.txt3 Copyright (C) 2008 - 2014 Freescale Semiconductor Inc.
7 - QMan Portal
8 - Example
10 QMan Portal Node
12 Portals are memory mapped interfaces to QMan that allow low-latency, lock-less
14 interfaces with the QMan
18 - compatible
21 Definition: Must include "fsl,qman-portal-<hardware revision>"
22 May include "fsl,<SoC>-qman-portal" or "fsl,qman-portal"
24 - reg
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/freebsd/sys/dev/dpaa/
H A Dqman.h1 /*-
2 * Copyright (c) 2011-2012 Semihalf.
36 * @group QMan private defines/declarations
45 * Pool channel common to all software portals.
75 t_Handle sc_qh; /* QMAN handle */
76 t_Handle sc_qph[MAXCPU]; /* QMAN portal handles */
77 vm_paddr_t sc_qp_pa; /* QMAN portal PA */
85 * @group QMan bus interface
97 * @group QMan API
106 * @param channel Dedicated channel serviced by this
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H A Dif_dtsec_fdt.c1 /*-
101 if (!ofw_bus_is_compatible(dev, "fsl,fman-dtsec") && in dtsec_fdt_probe()
102 !ofw_bus_is_compatible(dev, "fsl,fman-xgec")) in dtsec_fdt_probe()
125 if (OF_getprop(enet_node, "local-mac-address", in dtsec_fdt_attach()
126 (void *)sc->sc_mac_addr, 6) == -1) { in dtsec_fdt_attach()
128 "Could not load local-mac-addr property from DTS\n"); in dtsec_fdt_attach()
133 if (ofw_bus_is_compatible(dev, "fsl,fman-dtsec") != 0) in dtsec_fdt_attach()
134 sc->sc_eth_dev_type = ETH_DTSEC; in dtsec_fdt_attach()
135 else if (ofw_bus_is_compatible(dev, "fsl,fman-xgec") != 0) in dtsec_fdt_attach()
136 sc->sc_eth_dev_type = ETH_10GSEC; in dtsec_fdt_attach()
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H A Dfman.c1 /*-
2 * Copyright (c) 2011-2012 Semihalf.
98 for (i = 0; i < sc->sc_base.nranges; i++) { in fman_activate_resource()
99 if (rman_is_region_manager(res, &sc->rman) != 0) { in fman_activate_resource()
100 bt = rman_get_bustag(sc->mem_res); in fman_activate_resource()
102 rman_get_bushandle(sc->mem_res), in fman_activate_resource()
103 rman_get_start(res) - in fman_activate_resource()
104 rman_get_start(sc->mem_res), in fman_activate_resource()
141 KASSERT(rle->res != NULL, in fman_release_resource()
143 rle->res = NULL; in fman_release_resource()
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/freebsd/sys/contrib/device-tree/Bindings/net/
H A Dfsl,fman.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/fsl,fman.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Frank Li <Frank.Li@nxp.com>
13 Due to the fact that the FMan is an aggregation of sub-engines (ports, MACs,
19 - fsl,fman
26 cell-index:
31 The cell-index value may be used by the SoC, to identify the
33 there's a description of the cell-index use in each SoC:
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H A Dfsl-fman.txt5 - FMan Node
6 - FMan Port Node
7 - FMan MURAM Node
8 - FMan dTSEC/XGEC/mEMAC Node
9 - FMan IEEE 1588 Node
10 - FMan MDIO Node
11 - Example
18 Due to the fact that the FMan is an aggregation of sub-engines (ports, MACs,
23 - compatible
32 - cell-index
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/freebsd/sys/contrib/ncsw/Peripherals/QM/
H A Dqm.h3 � 1995-2003, 2004, 2005-2011 Freescale Semiconductor, Inc.
138 /* Corenet initiator settings. Stash request queues are 4-deep to match cores'
146 /* QM-Portal defaults */
175 /* QMan Software Portal Configuration Registers */
177 volatile uint32_t lio_cfg; /**< QMan Software Portal LIO Configuration */
178 volatile uint32_t io_cfg; /**< QMan Software Portal 0 IO Configuration */
185 volatile uint32_t qman_dd_cfg; /**< QMan Dynamic Debug (DD) Configuration */
224 volatile uint32_t wq_sc_dd_cfg[5]; /**< WQ S/W Channel Dynamic Debug Config */
226 volatile uint32_t wq_pc_dd_cs_cfg[8]; /**< WQ Pool Channel Dynamic Debug Config */
241 /* QMan Error Capture Registers */
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H A Dfsl_qman.h3 � 1995-2003, 2004, 2005-2011 Freescale Semiconductor, Inc.
50 /* QMan s/w corenet portal, low-level i/face */
53 e_QmPortalPCI = 0, /* PI index, cache-inhibited */
54 e_QmPortalPCE, /* PI index, cache-enabled */
55 e_QmPortalPVB /* valid-bit */
59 e_QmPortalEqcrCCI = 0, /* CI index, cache-inhibited */
60 e_QmPortalEqcrCCE /* CI index, cache-enabled */
64 e_QmPortalDqrrCCI = 0, /* CI index, cache-inhibited */
65 e_QmPortalDqrrCCE, /* CI index, cache-enabled */
70 e_QmPortalMrCCI = 0, /* CI index, cache-inhibited */
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H A Dqm_portal_fqr.c3 � 1995-2003, 2004, 2005-2011 Freescale Semiconductor, Inc.
62 * Context entries are 32-bit. The qman driver uses the pointer to the queue as
63 * its context, and the pointer is 64-byte aligned, per the XX_MallocSmart()
64 * call. Take advantage of this fact to shove a 64-bit kernel pointer into a
65 * 32-bit context integer, and back.
67 * XXX: This depends on the fact that VM_MAX_KERNEL_ADDRESS is less than 38-bit
71 CTASSERT((VM_MAX_KERNEL_ADDRESS - VM_MIN_KERNEL_ADDRESS) < (1ULL << 35));
79 ctx -= VM_MIN_KERNEL_ADDRESS; in aligned_int_from_ptr()
80 KASSERT((ctx & 0x07) == 0, ("Pointer %p is not 8-byte aligned!\n", p)); in aligned_int_from_ptr()
100 ASSERT_COND((p_Fq->state == qman_fq_state_parked) || in qman_volatile_dequeue()
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/freebsd/sys/dev/dpaa2/
H A Ddpaa2_swp_if.m1 #-
2 # SPDX-License-Identifier: BSD-2-Clause
4 # Copyright © 2021-2022 Dmitry Salychev
37 * to communicate with the Queue Manager (QMan) which acts as a central resource
44 * @brief Enqueue multiple frames to a frame queue using one Frame Queue ID.
47 * fqid: Frame Queue ID.
59 * @brief Configure the channel data availability notification (CDAN)
60 * in a particular WQ channel paired with DPIO.
74 * bpid: Buffer pool ID.
89 * bpid: Buffer pool ID.
H A Ddpaa2_swp.c1 /*-
2 * SPDX-License-Identifier: BSD-3-Clause AND BSD-2-Clause
4 * Copyright © 2014-2016 Freescale Semiconductor, Inc.
5 * Copyright © 2016-2019 NXP
35 * drivers/soc/fsl/dpio/qbman-portal.c
42 * Copyright © 2021-2022 Dmitry Salychev
198 mtx_init(&p->lock, "swp_sleep_lock", NULL, MTX_DEF); in dpaa2_swp_init_portal()
200 p->cfg.mem_backed = false; in dpaa2_swp_init_portal()
201 p->cfg.writes_cinh = true; in dpaa2_swp_init_portal()
203 p->desc = desc; in dpaa2_swp_init_portal()
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H A Ddpaa2_swp.h1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright © 2021-2023 Dmitry Salychev
74 /* Registers in the cache-inhibited area of the software portal. */
96 /* Registers in the cache-enabled area of the software portal. */
105 /* Registers in the cache-enabled area of the software portal (memory-backed). */
141 * Read trigger bit is used to trigger QMan to read a command from memory,
143 * to QMan.
157 /* "Write Enable" bitmask for a command to configure SWP WQ Channel.*/
218 mtx_assert(&(__swp)->lock, MA_NOTOWNED); \
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H A Ddpaa2_ni.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright © 2021-2023 Dmitry Salychev
35 * high-functioning network interface. The DPNI supports features that are
112 mtx_assert(&(__sc)->lock, MA_NOTOWNED); \
113 mtx_lock(&(__sc)->lock); \
116 mtx_assert(&(__sc)->lock, MA_OWNED); \
117 mtx_unlock(&(__sc)->lock); \
120 mtx_assert(&(__sc)->lock, MA_OWNED); \
124 (&(sc)->channels[(chan)]->txc_queue.tx_rings[(tc)])
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/freebsd/sys/contrib/ncsw/inc/Peripherals/
H A Dqm_ext.h3 � 1995-2003, 2004, 2005-2011 Freescale Semiconductor, Inc.
64 @Param[in] h_QmFqr A handle to an QM-FQR Module.
68 @Retval e_RX_STORE_RESPONSE_CONTINUE - order the driver to continue Rx
70 @Retval e_RX_STORE_RESPONSE_PAUSE - order the driver to stop Rx operation.
87 @Param[in] h_QmFqr A handle to an QM-FQR Module.
123 uint8_t cgId; /**< congestion group id*/
135 @Param[in] h_QmFqr A handle to an QM-FQR Module.
140 @Retval e_RX_STORE_RESPONSE_CONTINUE - order the driver to continue Rx
142 @Retval e_RX_STORE_RESPONSE_PAUSE - order the driver to stop Rx operation.
182 e_QM_EX_ENQUEUE_CHANNEL, /**< Invalid Enqueue Channel Interrupt */
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/freebsd/sys/contrib/ncsw/inc/flib/
H A Dfsl_fman_port.h2 * Copyright 2008-2013 Freescale Semiconductor Inc.
170 uint32_t fmbm_rfqid; /**< Rx Frame Queue ID*/
171 uint32_t fmbm_refqid; /**< Rx Error Frame Queue ID*/
175 uint32_t reserved0074[0x2]; /**< (0x074-0x07C) */
179 /**< Buffer Manager pool Information-*/
181 /**< Allocate Counter-*/
183 /**< 0x130/0x140 - 0x15F reserved -*/
207 uint32_t fmbm_rdbg; /**< Rx Debug-*/
220 uint32_t fmbm_tcfqid; /**< Tx Confirmation Frame Queue ID. */
221 uint32_t fmbm_tefqid; /**< Tx Frame Error Queue ID */
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