Searched +full:qdma +full:- +full:queue0 (Results 1 – 5 of 5) sorted by relevance
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---4 $id: http://devicetree.org/schemas/dma/fsl-qdma.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: NXP Layerscape SoC qDMA Controller10 - Frank Li <Frank.Li@nxp.com>15 - const: fsl,ls1021a-qdma16 - items:17 - enum:18 - fsl,ls1028a-qdma[all …]
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)3 * Device Tree Include file for NXP Layerscape-1043A family SoC.5 * Copyright 2014-2015 Freescale Semiconductor, Inc.11 #include <dt-bindings/clock/fsl,qoriq-clockgen.h>12 #include <dt-bindings/thermal/thermal.h>13 #include <dt-bindings/interrupt-controller/arm-gic.h>14 #include <dt-bindings/gpio/gpio.h>18 interrupt-parent = <&gic>;19 #address-cells = <2>;20 #size-cells = <2>;[all …]
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)3 * Device Tree Include file for NXP Layerscape-1046A family SoC.11 #include <dt-bindings/clock/fsl,qoriq-clockgen.h>12 #include <dt-bindings/interrupt-controller/arm-gic.h>13 #include <dt-bindings/thermal/thermal.h>14 #include <dt-bindings/gpio/gpio.h>18 interrupt-parent = <&gic>;19 #address-cells = <2>;20 #size-cells = <2>;37 #address-cells = <1>;[all …]
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)3 * Device Tree Include file for NXP Layerscape-1028A family SoC.5 * Copyright 2018-2020 NXP11 #include <dt-bindings/clock/fsl,qoriq-clockgen.h>12 #include <dt-bindings/interrupt-controller/arm-gic.h>13 #include <dt-bindings/thermal/thermal.h>17 interrupt-parent = <&gic>;18 #address-cells = <2>;19 #size-cells = <2>;22 #address-cells = <1>;[all …]
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)3 * Copyright 2013-2014 Freescale Semiconductor, Inc.6 #include <dt-bindings/interrupt-controller/arm-gic.h>7 #include <dt-bindings/thermal/thermal.h>10 #address-cells = <2>;11 #size-cells = <2>;12 interrupt-parent = <&gic>;30 #address-cells = <1>;31 #size-cells = <0>;34 compatible = "arm,cortex-a7";[all …]