Searched +full:qcs404 +full:- +full:cpr (Results 1 – 6 of 6) sorted by relevance
/linux/Documentation/devicetree/bindings/cpufreq/ |
H A D | qcom-cpufreq-nvmem.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/cpufreq/qcom-cpufreq-nvmem.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Ilia Lin <ilia.lin@kernel.org> 13 In certain Qualcomm Technologies, Inc. SoCs such as QCS404, The CPU supply 14 voltage is dynamically configured by Core Power Reduction (CPR) depending on 16 CPR provides a power domain with multiple levels that are selected depending 17 on the CPU OPP in use. The CPUFreq driver sets the CPR power domain level 21 voltage and CPR is not supported/used. [all …]
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/linux/Documentation/devicetree/bindings/power/avs/ |
H A D | qcom,cpr.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/power/avs/qcom,cpr.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm Core Power Reduction (CPR) 10 - Niklas Cassel <nks@flawful.org> 13 CPR (Core Power Reduction) is a technology to reduce core power on a CPU 16 running at a particular frequency, CPR monitors dynamic factors such as 23 - enum: 24 - qcom,qcs404-cpr [all …]
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/linux/drivers/pmdomain/qcom/ |
H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 5 tristate "QCOM Core Power Reduction (CPR) support" 10 Say Y here to enable support for the CPR hardware found on Qualcomm 11 SoCs like QCS404. 14 tables based on feedback from the CPR hardware. If you want to do 18 be called qcom-cpr 24 QCOM RPMh Power domain driver to support power-domains with 36 QCOM RPM Power domain driver to support power-domains with
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H A D | cpr.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * Copyright (c) 2013-2015, The Linux Foundation. All rights reserved. 27 #include <linux/nvmem-consumer.h> 29 /* Register Offsets for RB-CPR and Bit Definitions */ 120 /* CPR eFuse parameters */ 125 #define FUSE_REVISION_UNKNOWN (-1) 254 return !drv->loop_disabled; in cpr_is_allowed() 259 writel_relaxed(value, drv->base + offset); in cpr_write() 264 return readl_relaxed(drv->base + offset); in cpr_read() 272 val = readl_relaxed(drv->base + offset); in cpr_masked_write() [all …]
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/linux/Documentation/devicetree/bindings/remoteproc/ |
H A D | qcom,rpm-proc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/remoteproc/qcom,rpm-proc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Bjorn Andersson <andersson@kernel.org> 11 - Konrad Dybcio <konradybcio@kernel.org> 12 - Stephan Gerhold <stephan@gerhold.net> 17 +--------------------------------------------+ 18 | RPM subsystem (qcom,rpm-proc) | 20 reset | +---------------+ +-----+ +-----+ | [all …]
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/linux/drivers/cpufreq/ |
H A D | qcom-cpufreq-nvmem.c | 1 // SPDX-License-Identifier: GPL-2.0 10 * defines the voltage and frequency value based on the msm-id in SMEM 12 * The qcom-cpufreq-nvmem driver reads the msm-id and efuse value from the SoC 15 * operating-points-v2 table when it is parsed by the OPP framework. 23 #include <linux/nvmem-consumer.h> 33 #include <dt-bindings/arm/qcom,ids.h> 85 drv->versions = 1 << *speedbin; in qcom_cpufreq_simple_get_version() 142 /* 4 bits of PVS are in efuse register bits 31, 8-6. */ in get_krait_bin_format_b() 201 drv->versions = 1 << (unsigned int)(*speedbin); in qcom_cpufreq_kryo_name_version() 205 drv->versions = 1 << ((unsigned int)(*speedbin) + 4); in qcom_cpufreq_kryo_name_version() [all …]
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