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/linux/arch/arm/boot/dts/renesas/
H A Dr8a77470.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/clock/r8a77470-cpg-mssr.h>
11 #include <dt-bindings/power/r8a77470-sysc.h>
14 #address-cells = <2>;
15 #size-cells = <2>;
26 #address-cells = <1>;
27 #size-cells = <0>;
31 compatible = "arm,cortex-a7";
[all …]
H A Dr8a7791.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car M2-W (R8A77910) SoC
5 * Copyright (C) 2013-2015 Renesas Electronics Corporation
6 * Copyright (C) 2013-2014 Renesas Solutions Corp.
10 #include <dt-bindings/clock/r8a7791-cpg-mssr.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/power/r8a7791-sysc.h>
17 #address-cells = <2>;
18 #size-cells = <2>;
[all …]
H A Dr8a7790.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car H2 (R8A77900) SoC
6 * Copyright (C) 2013-2014 Renesas Solutions Corp.
10 #include <dt-bindings/clock/r8a7790-cpg-mssr.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/power/r8a7790-sysc.h>
17 #address-cells = <2>;
18 #size-cells = <2>;
46 compatible = "fixed-clock";
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/linux/Documentation/devicetree/bindings/pwm/
H A Drenesas,pwm-rcar.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/pwm/renesas,pwm-rcar.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas R-Car PWM Timer Controller
10 - Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
15 - enum:
16 - renesas,pwm-r8a7742 # RZ/G1H
17 - renesas,pwm-r8a7743 # RZ/G1M
18 - renesas,pwm-r8a7744 # RZ/G1N
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/linux/arch/arm64/boot/dts/renesas/
H A Dr8a77995.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car D3 (R8A77995) SoC
9 #include <dt-bindings/clock/r8a77995-cpg-mssr.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/power/r8a77995-sysc.h>
15 #address-cells = <2>;
16 #size-cells = <2>;
24 compatible = "fixed-clock";
25 #clock-cells = <0>;
26 clock-frequency = <0>;
[all …]
H A Dwhite-hawk-ard-audio-da7212.dtso1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for White Hawk (Single) board with ARD-AUDIO-DA7212 board
5 * You can find and buy "ARD-AUDIO-DA7212" at Digi-Key
7 * https://www.digikey.jp/en/products/detail/ARD-AUDIO-DA7212/1564-1021-ND/5456357
14 * White Hawk ARD-AUDIO-DA7212
15 * +----------------------------+
19 * | AUDIO_CLKIN_V pin1 |<--\ +---------------+
20 * |(*) GP1_25/SL_SW2_V pin2 |<--/ |J2 |
21 * | AUDIO_CLKOUT_V pin5 |<----->| pin7 MCLK |
22 * | SSI_SCK_V pin9 |<----->| pin1 BCLK |
[all …]
/linux/drivers/pwm/
H A Dpwm-rcar.c1 // SPDX-License-Identifier: GPL-2.0
3 * R-Car PWM Timer driver
8 * - The hardware cannot generate a 0% duty cycle.
21 #include <linux/pwm.h>
54 writel(data, rp->base + offset); in rcar_pwm_write()
59 return readl(rp->base + offset); in rcar_pwm_read()
75 unsigned long clk_rate = clk_get_rate(rp->clk); in rcar_pwm_get_clock_division()
79 return -EINVAL; in rcar_pwm_get_clock_division()
82 tmp = (u64)period_ns * clk_rate + div - 1; in rcar_pwm_get_clock_division()
84 div = ilog2(tmp - 1) + 1; in rcar_pwm_get_clock_division()
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/linux/drivers/clk/renesas/
H A Dr8a7792-cpg-mssr.c1 // SPDX-License-Identifier: GPL-2.0
7 * Based on clk-rcar-gen2.c
15 #include <linux/soc/renesas/rcar-rst.h>
17 #include <dt-bindings/clock/r8a7792-cpg-mssr.h>
19 #include "renesas-cpg-mssr.h"
20 #include "rcar-gen2-cpg.h"
84 DEF_MOD("2d-dmac", 115, R8A7792_CLK_ZS),
93 DEF_MOD("sys-dmac1", 218, R8A7792_CLK_ZS),
94 DEF_MOD("sys-dmac0", 219, R8A7792_CLK_ZS),
100 DEF_MOD("intc-sys", 408, R8A7792_CLK_ZS),
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H A Dr8a7794-cpg-mssr.c1 // SPDX-License-Identifier: GPL-2.0
7 * Based on clk-rcar-gen2.c
15 #include <linux/soc/renesas/rcar-rst.h>
17 #include <dt-bindings/clock/r8a7794-cpg-mssr.h>
19 #include "renesas-cpg-mssr.h"
20 #include "rcar-gen2-cpg.h"
93 DEF_MOD("2d-dmac", 115, R8A7794_CLK_ZS),
94 DEF_MOD("fdp1-0", 119, R8A7794_CLK_ZS),
109 DEF_MOD("sys-dmac1", 218, R8A7794_CLK_ZS),
110 DEF_MOD("sys-dmac0", 219, R8A7794_CLK_ZS),
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H A Dr8a7791-cpg-mssr.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2015-2017 Glider bvba
7 * Based on clk-rcar-gen2.c
16 #include <linux/soc/renesas/rcar-rst.h>
18 #include <dt-bindings/clock/r8a7791-cpg-mssr.h>
20 #include "renesas-cpg-mssr.h"
21 #include "rcar-gen2-cpg.h"
96 DEF_MOD("2d-dmac", 115, R8A7791_CLK_ZS),
97 DEF_MOD("fdp1-1", 118, R8A7791_CLK_ZS),
98 DEF_MOD("fdp1-0", 119, R8A7791_CLK_ZS),
[all …]
H A Dr8a7790-cpg-mssr.c1 // SPDX-License-Identifier: GPL-2.0
7 * Based on clk-rcar-gen2.c
15 #include <linux/soc/renesas/rcar-rst.h>
17 #include <dt-bindings/clock/r8a7790-cpg-mssr.h>
19 #include "renesas-cpg-mssr.h"
20 #include "rcar-gen2-cpg.h"
101 DEF_MOD("2d-dmac", 115, R8A7790_CLK_ZS),
102 DEF_MOD("fdp1-2", 117, R8A7790_CLK_ZS),
103 DEF_MOD("fdp1-1", 118, R8A7790_CLK_ZS),
104 DEF_MOD("fdp1-0", 119, R8A7790_CLK_ZS),
[all …]
H A Dr8a77470-cpg-mssr.c1 // SPDX-License-Identifier: GPL-2.0
11 #include <linux/soc/renesas/rcar-rst.h>
13 #include <dt-bindings/clock/r8a77470-cpg-mssr.h>
15 #include "renesas-cpg-mssr.h"
16 #include "rcar-gen2-cpg.h"
82 DEF_MOD("2d-dmac", 115, R8A77470_CLK_ZS),
83 DEF_MOD("fdp1-0", 119, R8A77470_CLK_ZS),
91 DEF_MOD("sys-dmac1", 218, R8A77470_CLK_ZS),
92 DEF_MOD("sys-dmac0", 219, R8A77470_CLK_ZS),
96 DEF_MOD("usbhs-dmac0-ch1", 326, R8A77470_CLK_HP),
[all …]
H A Dr8a77995-cpg-mssr.c1 // SPDX-License-Identifier: GPL-2.0
7 * Based on r8a7795-cpg-mssr.c
16 #include <linux/soc/renesas/rcar-rst.h>
18 #include <dt-bindings/clock/r8a77995-cpg-mssr.h>
20 #include "renesas-cpg-mssr.h"
21 #include "rcar-gen3-cpg.h"
136 DEF_MOD("sys-dmac2", 217, R8A77995_CLK_S3D1),
137 DEF_MOD("sys-dmac1", 218, R8A77995_CLK_S3D1),
138 DEF_MOD("sys-dmac0", 219, R8A77995_CLK_S3D1),
139 DEF_MOD("sceg-pub", 229, R8A77995_CLK_CR),
[all …]
H A Dr8a7745-cpg-mssr.c1 // SPDX-License-Identifier: GPL-2.0
11 #include <linux/soc/renesas/rcar-rst.h>
13 #include <dt-bindings/clock/r8a7745-cpg-mssr.h>
15 #include "renesas-cpg-mssr.h"
16 #include "rcar-gen2-cpg.h"
86 DEF_MOD("2d-dmac", 115, R8A7745_CLK_ZS),
87 DEF_MOD("fdp1-0", 119, R8A7745_CLK_ZS),
102 DEF_MOD("sys-dmac1", 218, R8A7745_CLK_ZS),
103 DEF_MOD("sys-dmac0", 219, R8A7745_CLK_ZS),
112 DEF_MOD("usbhs-dmac0", 330, R8A7745_CLK_HP),
[all …]
H A Dr8a77980-cpg-mssr.c1 // SPDX-License-Identifier: GPL-2.0
8 * Based on r8a7795-cpg-mssr.c
16 #include <linux/soc/renesas/rcar-rst.h>
19 #include <dt-bindings/clock/r8a77980-cpg-mssr.h>
21 #include "renesas-cpg-mssr.h"
22 #include "rcar-gen3-cpg.h"
129 DEF_MOD("sys-dmac2", 217, R8A77980_CLK_S0D3),
130 DEF_MOD("sys-dmac1", 218, R8A77980_CLK_S0D3),
139 DEF_MOD("intc-ex", 407, R8A77980_CLK_CP),
140 DEF_MOD("intc-ap", 408, R8A77980_CLK_S0D3),
[all …]
H A Dr8a774c0-cpg-mssr.c1 // SPDX-License-Identifier: GPL-2.0
7 * Based on r8a77990-cpg-mssr.c
16 #include <linux/soc/renesas/rcar-rst.h>
18 #include <dt-bindings/clock/r8a774c0-cpg-mssr.h>
20 #include "renesas-cpg-mssr.h"
21 #include "rcar-gen3-cpg.h"
149 DEF_MOD("sys-dmac2", 217, R8A774C0_CLK_S3D1),
150 DEF_MOD("sys-dmac1", 218, R8A774C0_CLK_S3D1),
151 DEF_MOD("sys-dmac0", 219, R8A774C0_CLK_S3D1),
162 DEF_MOD("usb3-if0", 328, R8A774C0_CLK_S3D1),
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H A Dr8a7742-cpg-mssr.c1 // SPDX-License-Identifier: GPL-2.0
11 #include <linux/soc/renesas/rcar-rst.h>
13 #include <dt-bindings/clock/r8a7742-cpg-mssr.h>
15 #include "renesas-cpg-mssr.h"
16 #include "rcar-gen2-cpg.h"
90 DEF_MOD("2d-dmac", 115, R8A7742_CLK_ZS),
91 DEF_MOD("fdp1-2", 117, R8A7742_CLK_ZS),
92 DEF_MOD("fdp1-1", 118, R8A7742_CLK_ZS),
93 DEF_MOD("fdp1-0", 119, R8A7742_CLK_ZS),
111 DEF_MOD("sys-dmac1", 218, R8A7742_CLK_ZS),
[all …]
H A Dr8a7743-cpg-mssr.c1 // SPDX-License-Identifier: GPL-2.0
12 #include <linux/soc/renesas/rcar-rst.h>
14 #include <dt-bindings/clock/r8a7743-cpg-mssr.h>
16 #include "renesas-cpg-mssr.h"
17 #include "rcar-gen2-cpg.h"
86 DEF_MOD("2d-dmac", 115, R8A7743_CLK_ZS),
87 DEF_MOD("fdp1-1", 118, R8A7743_CLK_ZS),
88 DEF_MOD("fdp1-0", 119, R8A7743_CLK_ZS),
104 DEF_MOD("sys-dmac1", 218, R8A7743_CLK_ZS),
105 DEF_MOD("sys-dmac0", 219, R8A7743_CLK_ZS),
[all …]
H A Dr8a7795-cpg-mssr.c1 // SPDX-License-Identifier: GPL-2.0
6 * Copyright (C) 2018-2019 Renesas Electronics Corp.
8 * Based on clk-rcar-gen3.c
16 #include <linux/soc/renesas/rcar-rst.h>
19 #include <dt-bindings/clock/r8a7795-cpg-mssr.h>
21 #include "renesas-cpg-mssr.h"
22 #include "rcar-gen3-cpg.h"
133 DEF_MOD("fdp1-1", 118, R8A7795_CLK_S0D1),
134 DEF_MOD("fdp1-0", 119, R8A7795_CLK_S0D1),
149 DEF_MOD("sys-dmac2", 217, R8A7795_CLK_S3D1),
[all …]
H A Dr8a77990-cpg-mssr.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2018-2019 Renesas Electronics Corp.
7 * Based on r8a7795-cpg-mssr.c
16 #include <linux/soc/renesas/rcar-rst.h>
18 #include <dt-bindings/clock/r8a77990-cpg-mssr.h>
20 #include "renesas-cpg-mssr.h"
21 #include "rcar-gen3-cpg.h"
150 DEF_MOD("sys-dmac2", 217, R8A77990_CLK_S3D1),
151 DEF_MOD("sys-dmac1", 218, R8A77990_CLK_S3D1),
152 DEF_MOD("sys-dmac0", 219, R8A77990_CLK_S3D1),
[all …]
H A Dr8a774b1-cpg-mssr.c1 // SPDX-License-Identifier: GPL-2.0
7 * Based on r8a7796-cpg-mssr.c
15 #include <linux/soc/renesas/rcar-rst.h>
17 #include <dt-bindings/clock/r8a774b1-cpg-mssr.h>
19 #include "renesas-cpg-mssr.h"
20 #include "rcar-gen3-cpg.h"
130 DEF_MOD("fdp1-0", 119, R8A774B1_CLK_S0D1),
140 DEF_MOD("sys-dmac2", 217, R8A774B1_CLK_S3D1),
141 DEF_MOD("sys-dmac1", 218, R8A774B1_CLK_S3D1),
142 DEF_MOD("sys-dmac0", 219, R8A774B1_CLK_S0D3),
[all …]
H A Dr8a774e1-cpg-mssr.c1 // SPDX-License-Identifier: GPL-2.0
7 * Based on r8a7795-cpg-mssr.c
15 #include <linux/soc/renesas/rcar-rst.h>
17 #include <dt-bindings/clock/r8a774e1-cpg-mssr.h>
19 #include "renesas-cpg-mssr.h"
20 #include "rcar-gen3-cpg.h"
129 DEF_MOD("fdp1-1", 118, R8A774E1_CLK_S0D1),
130 DEF_MOD("fdp1-0", 119, R8A774E1_CLK_S0D1),
147 DEF_MOD("sys-dmac2", 217, R8A774E1_CLK_S3D1),
148 DEF_MOD("sys-dmac1", 218, R8A774E1_CLK_S3D1),
[all …]
H A Dr8a774a1-cpg-mssr.c1 // SPDX-License-Identifier: GPL-2.0
7 * Based on r8a7796-cpg-mssr.c
15 #include <linux/soc/renesas/rcar-rst.h>
17 #include <dt-bindings/clock/r8a774a1-cpg-mssr.h>
19 #include "renesas-cpg-mssr.h"
20 #include "rcar-gen3-cpg.h"
133 DEF_MOD("fdp1-0", 119, R8A774A1_CLK_S0D1),
143 DEF_MOD("sys-dmac2", 217, R8A774A1_CLK_S3D1),
144 DEF_MOD("sys-dmac1", 218, R8A774A1_CLK_S3D1),
145 DEF_MOD("sys-dmac0", 219, R8A774A1_CLK_S0D3),
[all …]
H A Dr8a77965-cpg-mssr.c1 // SPDX-License-Identifier: GPL-2.0
8 * Based on r8a7795-cpg-mssr.c
17 #include <linux/soc/renesas/rcar-rst.h>
19 #include <dt-bindings/clock/r8a77965-cpg-mssr.h>
21 #include "renesas-cpg-mssr.h"
22 #include "rcar-gen3-cpg.h"
130 DEF_MOD("fdp1-0", 119, R8A77965_CLK_S0D1),
145 DEF_MOD("sys-dmac2", 217, R8A77965_CLK_S3D1),
146 DEF_MOD("sys-dmac1", 218, R8A77965_CLK_S3D1),
147 DEF_MOD("sys-dmac0", 219, R8A77965_CLK_S0D3),
[all …]
/linux/Documentation/devicetree/bindings/soc/renesas/
H A Drenesas-soc.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/soc/renesas/renesas-soc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Geert Uytterhoeven <geert+renesas@glider.be>
11 - Niklas Söderlund <niklas.soderlund@ragnatech.se>
16 renesas,SoC-IP
19 renesas,r8a77965-csi2
28 pattern: "^renesas,.+-.+$"
30 - compatible
[all …]

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