| /freebsd/sys/contrib/device-tree/Bindings/pwm/ |
| H A D | pwm-nexus-node.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pwm/pwm-nexus-node.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: PWM Nexus node properties 19 - Herve Codina <herve.codina@bootlin.com> 24 '#pwm-cells': true 26 pwm-map: 27 $ref: /schemas/types.yaml#/definitions/uint32-matrix 29 pwm-map-mask: [all …]
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| /freebsd/sys/contrib/device-tree/src/loongarch/ |
| H A D | loongson-2k2000.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 6 /dts-v1/; 8 #include <dt-bindings/interrupt-controller/irq.h> 9 #include <dt-bindings/clock/loongson,ls2k-clk.h> 12 #address-cells = <2>; 13 #size-cells = <2>; 16 #address-cells = <1>; 17 #size-cells = <0>; 34 ref_100m: clock-ref-100m { 35 compatible = "fixed-clock"; [all …]
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| H A D | loongson-2k1000.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 6 /dts-v1/; 8 #include <dt-bindings/interrupt-controller/irq.h> 9 #include <dt-bindings/clock/loongson,ls2k-clk.h> 10 #include <dt-bindings/gpio/gpio.h> 13 #address-cells = <2>; 14 #size-cells = <2>; 17 #address-cells = <1>; 18 #size-cells = <0>; 35 ref_100m: clock-ref-100m { [all …]
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| H A D | loongson-2k0500.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 6 /dts-v1/; 8 #include <dt-bindings/interrupt-controller/irq.h> 9 #include <dt-bindings/clock/loongson,ls2k-clk.h> 12 #address-cells = <2>; 13 #size-cells = <2>; 16 #address-cells = <1>; 17 #size-cells = <0>; 27 ref_100m: clock-ref-100m { 28 compatible = "fixed-clock"; [all …]
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| /freebsd/sys/contrib/device-tree/src/arm/marvell/ |
| H A D | armada-xp-mv78230.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com> 13 #include "armada-xp.dtsi" 17 compatible = "marvell,armadaxp-mv78230", "marvell,armadaxp", "marvell,armada-370-xp"; 25 #address-cells = <1>; 26 #size-cells = <0>; 27 enable-method = "marvell,armada-xp-smp"; 31 compatible = "marvell,sheeva-v7"; 34 clock-latency = <1000000>; 39 compatible = "marvell,sheeva-v7"; [all …]
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| H A D | armada-xp-mv78260.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com> 13 #include "armada-xp.dtsi" 17 compatible = "marvell,armadaxp-mv78260", "marvell,armadaxp", "marvell,armada-370-xp"; 26 #address-cells = <1>; 27 #size-cells = <0>; 28 enable-method = "marvell,armada-xp-smp"; 32 compatible = "marvell,sheeva-v7"; 35 clock-latency = <1000000>; 40 compatible = "marvell,sheeva-v7"; [all …]
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| H A D | armada-xp-mv78460.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com> 13 #include "armada-xp.dtsi" 17 compatible = "marvell,armadaxp-mv78460", "marvell,armadaxp", "marvell,armada-370-xp"; 27 #address-cells = <1>; 28 #size-cells = <0>; 29 enable-method = "marvell,armada-xp-smp"; 33 compatible = "marvell,sheeva-v7"; 36 clock-latency = <1000000>; 41 compatible = "marvell,sheeva-v7"; [all …]
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| H A D | armada-370.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 * Gregory CLEMENT <gregory.clement@free-electrons.com> 9 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com> 15 #include "armada-370-xp.dtsi" 18 #address-cells = <1>; 19 #size-cells = <1>; 22 compatible = "marvell,armada370", "marvell,armada-370-xp"; 31 compatible = "marvell,armada370-mbus", "simple-bus"; 39 compatible = "marvell,armada-370-pcie"; 43 #address-cells = <3>; [all …]
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| /freebsd/sys/contrib/device-tree/src/arm64/nvidia/ |
| H A D | tegra194.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 #include <dt-bindings/clock/tegra194-clock.h> 3 #include <dt-bindings/gpio/tegra194-gpio.h> 4 #include <dt-bindings/interrupt-controller/arm-gic.h> 5 #include <dt-bindings/mailbox/tegra186-hsp.h> 6 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h> 7 #include <dt-bindings/pinctrl/pinctrl-tegra.h> 8 #include <dt-bindings/power/tegra194-powergate.h> 9 #include <dt-bindings/reset/tegra194-reset.h> 10 #include <dt-bindings/thermal/tegra194-bpmp-thermal.h> [all …]
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| H A D | tegra234.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 #include <dt-bindings/clock/tegra234-clock.h> 4 #include <dt-bindings/gpio/tegra234-gpio.h> 5 #include <dt-bindings/interrupt-controller/arm-gic.h> 6 #include <dt-bindings/mailbox/tegra186-hsp.h> 7 #include <dt-bindings/memory/tegra234-mc.h> 8 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h> 9 #include <dt-bindings/power/tegra234-powergate.h> 10 #include <dt-bindings/reset/tegra234-reset.h> 11 #include <dt-bindings/thermal/tegra234-bpmp-thermal.h> [all …]
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| /freebsd/sys/contrib/device-tree/src/mips/brcm/ |
| H A D | bcm7358.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 #address-cells = <1>; 4 #size-cells = <1>; 8 #address-cells = <1>; 9 #size-cells = <0>; 11 mips-hpt-frequency = <375000000>; 24 cpu_intc: interrupt-controller { 25 #address-cells = <0>; 26 compatible = "mti,cpu-interrupt-controller"; 28 interrupt-controller; [all …]
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| H A D | bcm7435.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 #address-cells = <1>; 4 #size-cells = <1>; 8 #address-cells = <1>; 9 #size-cells = <0>; 11 mips-hpt-frequency = <175625000>; 42 cpu_intc: interrupt-controller { 43 #address-cells = <0>; 44 compatible = "mti,cpu-interrupt-controller"; 46 interrupt-controller; [all …]
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| H A D | bcm7425.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 #address-cells = <1>; 4 #size-cells = <1>; 8 #address-cells = <1>; 9 #size-cells = <0>; 11 mips-hpt-frequency = <163125000>; 30 cpu_intc: interrupt-controller { 31 #address-cells = <0>; 32 compatible = "mti,cpu-interrupt-controller"; 34 interrupt-controller; [all …]
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| H A D | bcm7346.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 #address-cells = <1>; 4 #size-cells = <1>; 8 #address-cells = <1>; 9 #size-cells = <0>; 11 mips-hpt-frequency = <163125000>; 30 cpu_intc: interrupt-controller { 31 #address-cells = <0>; 32 compatible = "mti,cpu-interrupt-controller"; 34 interrupt-controller; [all …]
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| H A D | bcm7420.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 #address-cells = <1>; 4 #size-cells = <1>; 8 #address-cells = <1>; 9 #size-cells = <0>; 11 mips-hpt-frequency = <93750000>; 30 cpu_intc: interrupt-controller { 31 #address-cells = <0>; 32 compatible = "mti,cpu-interrupt-controller"; 34 interrupt-controller; [all …]
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| H A D | bcm7360.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 #address-cells = <1>; 4 #size-cells = <1>; 8 #address-cells = <1>; 9 #size-cells = <0>; 11 mips-hpt-frequency = <375000000>; 24 cpu_intc: interrupt-controller { 25 #address-cells = <0>; 26 compatible = "mti,cpu-interrupt-controller"; 28 interrupt-controller; [all …]
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| /freebsd/sys/contrib/device-tree/src/riscv/microchip/ |
| H A D | mpfs-icicle-kit-fabric.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 2 /* Copyright (c) 2020-2021 Microchip Technology Inc */ 5 compatible = "microchip,mpfs-icicle-reference-rtlv2210", "microchip,mpfs-icicle-kit", 8 core_pwm0: pwm@40000000 { 9 compatible = "microchip,corepwm-rtl-v4"; 11 microchip,sync-update-mask = /bits/ 32 <0>; 12 #pwm-cells = <3>; 18 compatible = "microchip,corei2c-rtl-v7"; 20 #address-cells = <1>; 21 #size-cells = <0>; [all …]
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| /freebsd/sys/contrib/device-tree/src/arm/nxp/ls/ |
| H A D | ls1021a.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Copyright 2013-2014 Freescale Semiconductor, Inc. 6 #include <dt-bindings/interrupt-controller/arm-gic.h> 7 #include <dt-bindings/thermal/thermal.h> 10 #address-cells = <2>; 11 #size-cells = <2>; 12 interrupt-parent = <&gic>; 30 #address-cells = <1>; 31 #size-cells = <0>; 34 compatible = "arm,cortex-a7"; [all …]
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| /freebsd/sys/contrib/device-tree/src/arm64/freescale/ |
| H A D | fsl-ls1028a.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Device Tree Include file for NXP Layerscape-1028A family SoC. 5 * Copyright 2018-2020 NXP 11 #include <dt-bindings/clock/fsl,qoriq-clockgen.h> 12 #include <dt-bindings/interrupt-controller/arm-gic.h> 13 #include <dt-bindings/thermal/thermal.h> 17 interrupt-parent = <&gic>; 18 #address-cells = <2>; 19 #size-cells = <2>; 22 #address-cells = <1>; [all …]
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| /freebsd/sys/contrib/device-tree/src/riscv/sophgo/ |
| H A D | sg2044.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 6 #include <dt-bindings/clock/sophgo,sg2044-pll.h> 7 #include <dt-bindings/clock/sophgo,sg2044-clk.h> 8 #include <dt-bindings/interrupt-controller/irq.h> 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/pinctrl/pinctrl-sg2044.h> 12 #include "sg2044-cpus.dtsi" 13 #include "sg2044-reset.h" 24 compatible = "fixed-clock"; 25 clock-output-names = "osc"; [all …]
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| /freebsd/sys/contrib/device-tree/src/arm/broadcom/ |
| H A D | bcm-hr2.dtsi | 33 #include <dt-bindings/interrupt-controller/arm-gic.h> 34 #include <dt-bindings/interrupt-controller/irq.h> 39 interrupt-parent = <&gic>; 40 #address-cells = <1>; 41 #size-cells = <1>; 44 #address-cells = <1>; 45 #size-cell 206 pwm: pwm@31000 { global() label [all...] |
| H A D | bcm-nsp.dtsi | 33 #include <dt-bindings/interrupt-controller/arm-gic.h> 34 #include <dt-bindings/interrupt-controller/irq.h> 35 #include <dt-bindings/clock/bcm-nsp.h> 38 #address-cells = <1>; 39 #size-cells = <1>; 42 interrupt-paren 358 pwm: pwm@31000 { global() label [all...] |
| /freebsd/sys/contrib/device-tree/src/arm/intel/ixp/ |
| H A D | intel-ixp42x-linksys-nslu2.dts | 1 // SPDX-License-Identifier: ISC 6 /dts-v1/; 8 #include "intel-ixp42x.dtsi" 9 #include <dt-bindings/input/input.h> 14 #address-cells = <1>; 15 #size-cells = <1>; 25 stdout-path = "uart0:115200n8"; 33 compatible = "gpio-leds"; 34 led-status { 37 default-state = "on"; [all …]
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| /freebsd/sys/arm/ti/am335x/ |
| H A D | am335x_dmtreg.h | 1 /*- 35 #define DMT_IQR_EOI 0x20 /* IRQ End-Of-Interrupt Reg */ 47 #define DMT_TCLR_AUTOLOAD (1 << 1) /* Auto-reload on overflow */ 48 #define DMT_TCLR_PRES_MASK (7 << 2) /* Prescaler mask */ 51 #define DMT_TCLR_PWM_HIGH (1 << 7) /* PWM default output high */ 52 #define DMT_TCLR_CAPTRAN_MASK (3 << 8) /* Capture transition mask */ 54 #define DMT_TCLR_CAPTRAN_LOHI (1 << 8) /* Capture lo->hi transition */ 55 #define DMT_TCLR_CAPTRAN_HILO (2 << 8) /* Capture hi->lo transition */ 57 #define DMT_TCLR_TRGMODE_MASK (3 << 10) /* Trigger output mode mask */ 61 #define DMT_TCLR_PWM_PTOGGLE (1 << 12) /* PWM toggles */ [all …]
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| /freebsd/sys/contrib/device-tree/src/arm64/mediatek/ |
| H A D | mt7988a.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 3 #include <dt-bindings/clock/mediatek,mt7988-clk.h> 4 #include <dt-bindings/interrupt-controller/arm-gic.h> 5 #include <dt-bindings/phy/phy.h> 6 #include <dt-bindings/pinctrl/mt65xx.h> 7 #include <dt-bindings/reset/mediatek,mt7988-resets.h> 11 interrupt-parent = <&gic>; 12 #address-cells = <2>; 13 #size-cells = <2>; 16 compatible = "mediatek,mt7988-cci", "mediatek,mt8183-cci"; [all …]
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