Home
last modified time | relevance | path

Searched +full:pwm +full:- +full:dutycycle +full:- +full:range (Results 1 – 25 of 32) sorted by relevance

12

/freebsd/sys/contrib/device-tree/Bindings/regulator/
H A Dpwm-regulator.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/regulator/pwm-regulator.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Generic PWM Regulator
10 - Brian Norris <briannorris@chromium.org>
11 - Lee Jones <lee@kernel.org>
12 - Alexandre Courbot <acourbot@nvidia.com>
19 duty-cycle values must be provided via DT. Limitations are that the
21 Intermediary duty-cycle values which would normally allow finer grained
[all …]
H A Dpwm-regulator.txt1 Bindings for the Generic PWM Regulator
7 predefined voltage <=> duty-cycle values must be
10 Intermediary duty-cycle values which would normally
13 the user if the assumptions made in continuous-voltage
18 regulator-{min,max}-microvolt properties to calculate
19 appropriate duty-cycle values. This allows for a much
21 voltage-table mode above. This solution does make an
22 assumption that a %50 duty-cycle value will cause the
27 --------------------
28 - compatible: Should be "pwm-regulator"
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/amlogic/
H A Dmeson-g12b-khadas-vim3.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
11 vddcpu_a: regulator-vddcpu-a {
15 compatible = "pwm-regulator";
17 regulator-name = "VDDCPU_A";
18 regulator-min-microvolt = <690000>;
19 regulator-max-microvolt = <1050000>;
21 pwm-supply = <&dc_in>;
24 pwm-dutycycle-range = <100 0>;
26 regulator-boot-on;
27 regulator-always-on;
[all …]
H A Dmeson-g12b-bananapi-cm4.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include "meson-g12b-a311d.dtsi"
7 #include <dt-bindings/gpio/meson-g12a-gpio.h>
16 stdout-path = "serial0:115200n8";
19 emmc_pwrseq: emmc-pwrse
[all...]
H A Dmeson-g12b-w400.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
10 #include "meson-g12b.dtsi"
11 #include "meson-g12b-s922x.dtsi"
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/gpio/meson-g12a-gpio.h>
22 stdout-path = "serial0:115200n8";
30 emmc_pwrseq: emmc-pwrseq {
31 compatible = "mmc-pwrseq-emmc";
32 reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>;
[all …]
H A Dmeson-g12b-odroid.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/gpio/meson-g12a-gpio.h>
9 #include <dt-bindings/sound/meson-g12a-toacodec.h>
10 #include <dt-bindings/sound/meson-g12a-tohdmitx.h>
20 stdout-path = "serial0:115200n8";
28 emmc_pwrseq: emmc-pwrseq {
29 compatible = "mmc-pwrseq-emmc";
30 reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>;
33 fan: gpio-fan {
[all …]
H A Dmeson-g12b-radxa-zero2.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
10 /dts-v1/;
12 #include "meson-g12b-a311d.dtsi"
13 #include <dt-bindings/input/input.h>
14 #include <dt-bindings/leds/common.h>
15 #include <dt-bindings/gpio/meson-g12a-gpio.h>
16 #include <dt-bindings/sound/meson-g12a-tohdmitx.h>
28 stdout-path = "serial0:115200n8";
36 fan0: pwm-fan {
37 compatible = "pwm-fan";
[all …]
H A Dmeson-sm1-khadas-vim3l.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
9 #include "meson-sm1.dtsi"
10 #include "meson-khadas-vim3.dtsi"
11 #include <dt-bindings/sound/meson-g12a-tohdmitx.h>
17 vddcpu: regulator-vddcpu {
21 compatible = "pwm-regulator";
23 regulator-name = "VDDCPU";
24 regulator-min-microvolt = <690000>;
25 regulator-max-microvolt = <1050000>;
[all …]
H A Dmeson-g12b-bananapi.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/leds/common.h>
10 #include <dt-bindings/gpio/meson-g12a-gpio.h>
11 #include <dt-bindings/sound/meson-g12a-tohdmitx.h>
21 stdout-path = "serial0:115200n8";
29 adc-keys {
30 compatible = "adc-keys";
31 io-channels = <&saradc 2>;
32 io-channel-names = "buttons";
[all …]
H A Dmeson-s4-s805x2-aq222.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include "meson-s4.dtsi"
13 interrupt-parent = <&gic>;
14 #address-cells = <2>;
15 #size-cells = <2>;
26 reserved-memory {
27 #address-cells = <2>;
28 #size-cells = <2>;
34 no-map;
[all …]
H A Dmeson-sm1-ac2xx.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
11 #include "meson-sm1.dtsi"
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/gpio/meson-g12a-gpio.h>
14 #include <dt-bindings/input/input.h>
23 stdout-path = "serial0:115200n8";
26 emmc_pwrseq: emmc-pwrseq {
27 compatible = "mmc-pwrseq-emmc";
28 reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>;
31 cvbs-connector {
[all …]
H A Dmeson-g12a-radxa-zero.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include "meson-g12a.dtsi"
9 #include <dt-bindings/gpio/meson-g12a-gpio.h>
10 #include <dt-bindings/sound/meson-g12a-tohdmitx.h>
21 stdout-path = "serial0:115200n8";
29 cvbs-connector {
31 compatible = "composite-video-connector";
35 remote-endpoint = <&cvbs_vdac_out>;
40 hdmi-connector {
[all …]
H A Dmeson-g12a-x96-max.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include "meson-g12a.dtsi"
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/gpio/meson-g12a-gpio.h>
11 #include <dt-bindings/sound/meson-g12a-tohdmitx.h>
14 compatible = "amediatech,x96-max", "amlogic,g12a";
22 spdif_dit: audio-codec-1 {
23 #sound-dai-cells = <0>;
24 compatible = "linux,spdif-dit";
[all …]
H A Dmeson-g12a-fbx8am.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
10 /dts-v1/;
12 #include "meson-g12a.dtsi"
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/input/input.h>
15 #include <dt-bindings/gpio/meson-g12a-gpio.h>
16 #include <dt-bindings/sound/meson-g12a-tohdmitx.h>
21 chassis-type = "embedded";
25 compatible = "linaro,optee-tz";
30 gpio-keys-polled {
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/zte/
H A Dzx296718-pcbox.dts5 * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
10 #include <dt-bindings/pwm/pwm.h>
14 compatible = "zte,zx296718-pcbox", "zte,zx296718";
17 stdout-path = "serial0:115200n8";
25 a53_vdd0v9: regulator-a53 {
26 compatible = "pwm-regulator";
27 pwms = <&pwm 3 1250 PWM_POLARITY_INVERTED>;
28 regulator-name = "A53_VDD0V9";
29 regulator-min-microvolt = <855000>;
[all …]
/freebsd/sys/contrib/device-tree/src/arm/amlogic/
H A Dmeson8b-mxq.dts1 // SPDX-License-Identifier: GPL-2.0 OR MIT
7 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
22 stdout-path = "serial0:115200n8";
30 vcck: regulator-vcck {
31 compatible = "pwm-regulator";
33 regulator-name = "VCCK";
34 regulator-min-microvolt = <860000>;
35 regulator-max-microvolt = <1140000>;
37 pwm-supply = <&vcc_5v>;
[all …]
H A Dmeson8b-odroidc1.dts1 // SPDX-License-Identifier: GPL-2.0 OR MIT
7 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
12 model = "Hardkernel ODROID-C1";
13 compatible = "hardkernel,odroid-c1", "amlogic,meson8b";
22 stdout-path = "serial0:115200n8";
30 emmc_pwrseq: emmc-pwrseq {
31 compatible = "mmc-pwrseq-emmc";
32 reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>;
36 compatible = "gpio-leds";
[all …]
H A Dmeson8b-ec100.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
22 stdout-path = "serial0:115200n8";
30 emmc_pwrseq: emmc-pwrseq {
31 compatible = "mmc-pwrseq-emmc";
32 reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>;
35 gpio-keys {
36 compatible = "gpio-keys-polled";
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/rockchip/
H A Drk3399-gru.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 * Copyright 2016-2017 Google, Inc
8 #include <dt-bindings/input/input.h>
9 #include "rk3399-op1.dtsi"
18 stdout-path = "serial2:115200n8";
27 * - Rails that only connect to the EC (or devices that the EC talks to)
29 * - Rails _are_ included if the rails go to the AP even if the AP
38 * - The EC controls the enable and the EC always enables a rail as
40 * - The rails are actually connected to each other by a jumper and
45 ppvar_sys: ppvar-sys {
[all …]
H A Drk3568-mecsbc.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 /dts-v1/;
4 #include <dt-bindings/gpio/gpio.h>
5 #include <dt-bindings/leds/common.h>
6 #include <dt-bindings/pinctrl/rockchip.h>
7 #include <dt-bindings/pwm/pwm.h>
20 stdout-path = "serial2:1500000n8";
23 tas2562-sound {
24 compatible = "simple-audio-card";
25 simple-audio-card,format = "i2s";
[all …]
H A Drk3399-gru-chromebook.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Google Gru-Chromebook shared properties
8 #include "rk3399-gru.dtsi"
11 pp900_ap: pp900-ap {
12 compatible = "regulator-fixed";
13 regulator-name = "pp900_ap";
16 regulator-always-o
[all...]
/freebsd/sys/contrib/device-tree/Bindings/sound/
H A Daxentia,tse850-pcm5142.txt1 Devicetree bindings for the Axentia TSE-850 audio complex
4 - compatible: "axentia,tse850-pcm5142"
5 - axentia,cpu-dai: The phandle of the cpu dai.
6 - axentia,audio-codec: The phandle of the PCM5142 codec.
7 - axentia,add-gpios: gpio specifier that controls the mixer.
8 - axenti
[all...]
/freebsd/sys/contrib/device-tree/src/arm/microchip/
H A Dat91-tse850-3.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * at91-tse850-3.dts - Device Tree file for the Axentia TSE-850 3.0 board
9 /dts-v1/;
10 #include <dt-bindings/pwm/pwm.h>
11 #include "at91-linea.dtsi"
14 model = "Axentia TSE-850 3.0";
19 compatible = "fixed-clock";
21 #clock-cells = <0>;
22 clock-frequency = <16000000>;
23 clock-output-names = "sck";
[all …]
/freebsd/sys/contrib/device-tree/src/arm/rockchip/
H A Drk3288-veyron.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include <dt-bindings/clock/rockchip,rk808.h>
9 #include <dt-bindings/input/input.h>
18 stdout-path = "serial2:115200n8";
31 power_button: power-button {
32 compatible = "gpio-keys";
33 pinctrl-names = "default";
34 pinctrl-0 = <&pwr_key_l>;
36 key-power {
40 debounce-interval = <100>;
[all …]
H A Drk3128-xpi-3128.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 /dts-v1/;
5 #include <dt-bindings/input/input.h>
6 #include <dt-bindings/leds/common.h>
10 model = "Geniatech XPI-3128";
11 compatible = "geniatech,xpi-3128", "rockchip,rk3128";
25 stdout-path = &uart1;
28 adc-keys {
29 compatible = "adc-keys";
30 io-channels = <&saradc 1>;
[all …]

12