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/linux/arch/arm64/boot/dts/rockchip/
H A Drockchip-pinconf.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /omit-if-no-ref/
8 pcfg_pull_up: pcfg-pull-up {
9 bias-pull-up;
12 /omit-if-no-ref/
13 pcfg_pull_down: pcfg-pull-down {
14 bias-pull-down;
17 /omit-if-no-ref/
18 pcfg_pull_none: pcfg-pull-none {
19 bias-disable;
[all …]
/linux/arch/riscv/boot/dts/spacemit/
H A Dk1-pinctrl.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR MIT
6 #include <dt-bindings/gpio/gpio.h>
14 gmac0_cfg: gmac0-cfg {
15 gmac0-pins {
33 bias-pull-up = <0>;
34 drive-strength = <21>;
38 gmac1_cfg: gmac1-cfg {
39 gmac1-pins {
57 bias-pull-up = <0>;
58 drive-strength = <21>;
[all …]
/linux/arch/arm/boot/dts/nxp/mxs/
H A Dimx28.dtsi1 // SPDX-License-Identifier: GPL-2.0+
5 #include <dt-bindings/gpio/gpio.h>
6 #include "imx28-pinfunc.h"
9 #address-cells = <1>;
10 #size-cells = <1>;
12 interrupt-parent = <&icoll>;
15 * pre-existing /chosen node to be available to insert the
42 #address-cells = <1>;
43 #size-cells = <0>;
46 compatible = "arm,arm926ej-s";
[all …]
H A Dimx23.dtsi1 // SPDX-License-Identifier: GPL-2.0+
5 #include "imx23-pinfunc.h"
8 #address-cells = <1>;
9 #size-cells = <1>;
11 interrupt-parent = <&icoll>;
14 * pre-existing /chosen node to be available to insert the
31 #address-cells = <1>;
32 #size-cells = <0>;
35 compatible = "arm,arm926ej-s";
42 compatible = "simple-bus";
[all …]
H A Dimx28-cfa10049.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
7 * The CFA-10049 is an expansion board for the CFA-10036 module, thus we
8 * need to include the CFA-10036 DTS.
10 #include "imx28-cfa10036.dts"
13 model = "Crystalfontz CFA-10049 Board";
17 compatible = "i2c-mux-gpio";
18 #address-cells = <1>;
19 #size-cells = <0>;
20 pinctrl-names = "default";
21 pinctrl-0 = <&i2cmux_pins_cfa10049>;
[all …]
/linux/arch/arm64/boot/dts/qcom/
H A Dsc7180-idp.dts1 // SPDX-License-Identifier: BSD-3-Clause
8 /dts-v1/;
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
12 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
14 #include "sc7180-firmware-tfa.dtsi"
20 compatible = "qcom,sc7180-idp", "qcom,sc7180";
30 stdout-path = "serial0:115200n8";
42 /delete-node/ &gpu_zap_shader;
43 /delete-node/ &hyp_mem;
[all …]
H A Dipq5332-rdp441.dts1 // SPDX-License-Identifier: BSD-3-Clause
3 * IPQ5332 AP-MI01.2 board device tree source
5 * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.
8 /dts-v1/;
10 #include "ipq5332-rdp-common.dtsi"
14 compatible = "qcom,ipq5332-ap-mi01.2", "qcom,ipq5332";
18 clock-frequency = <400000>;
19 pinctrl-0 = <&i2c_1_pins>;
20 pinctrl-names = "default";
25 bus-width = <4>;
[all …]
H A Dsc7280-idp.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
8 #include <dt-bindings/iio/qcom,spmi-adc7-pmk8350.h>
9 #include <dt-bindings/input/linux-event-codes.h>
15 #include "sc7280-chrome-common.dtsi"
16 #include "sc7280-herobrine-lte-sku.dtsi"
25 max98360a: audio-codec-0 {
27 pinctrl-names = "default";
28 pinctrl-0 = <&amp_en>;
29 sdmode-gpios = <&tlmm 63 GPIO_ACTIVE_HIGH>;
30 #sound-dai-cells = <0>;
[all …]
H A Dsa8540p-ride.dts1 // SPDX-License-Identifier: BSD-3-Clause
7 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
13 #include "sa8540p-pmics.dtsi"
17 compatible = "qcom,sa8540p-ride", "qcom,sa8540p";
29 stdout-path = "serial0:115200n8";
34 regulators-0 {
35 compatible = "qcom,pm8150-rpmh-regulators";
36 qcom,pmic-id = "a";
[all …]
H A Dsc7180-trogdor.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/gpio-keys.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/leds/common.h>
12 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
13 #include <dt-bindings/sound/sc7180-lpass.h>
16 #include "sc7180-firmware-tfa.dtsi"
22 thermal-zones {
23 charger_thermal: charger-thermal {
[all …]
H A Dmsm8996-sony-xperia-tone.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/leds/common.h>
15 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
16 #include <dt-bindings/pinctrl/qcom,pmic-mpp.h>
18 /delete-node/ &adsp_mem;
19 /delete-node/ &slpi_mem;
20 /delete-node/ &venus_mem;
21 /delete-node/ &gpu_mem;
[all …]
H A Dqcs404-evb-4000.dts1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
9 #include "qcs404-evb.dtsi"
13 compatible = "qcom,qcs404-evb-4000", "qcom,qcs404-evb",
20 snps,reset-gpio = <&tlmm 60 GPIO_ACTIVE_LOW>;
21 snps,reset-active-low;
22 snps,reset-delays-us = <0 10000 10000>;
24 pinctrl-names = "default";
25 pinctrl-0 = <&ethernet_defaults>;
[all …]
H A Dmsm8998-xiaomi-sagit.dts1 // SPDX-License-Identifier: BSD-3-Clause
3 * Xiaomi Mi 6 (sagit) device tree source based on msm8998-mtp.dtsi
10 /dts-v1/;
16 #include <dt-bindings/input/input.h>
17 #include <dt-bindings/leds/common.h>
18 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
24 /delete-node/ &adsp_mem;
25 /delete-node/ &mpss_mem;
26 /delete-node/ &venus_mem;
27 /delete-node/ &mba_mem;
[all …]
H A Dipq5332-rdp442.dts1 // SPDX-License-Identifier: BSD-3-Clause
8 /dts-v1/;
10 #include "ipq5332-rdp-common.dtsi"
14 compatible = "qcom,ipq5332-ap-mi01.3", "qcom,ipq5332";
18 clock-frequency = <400000>;
19 pinctrl-0 = <&i2c_1_pins>;
20 pinctrl-names = "default";
25 pinctrl-0 = <&spi_0_data_clk_pins &spi_0_cs_pins>;
26 pinctrl-names = "default";
30 compatible = "micron,n25q128a11", "jedec,spi-nor";
[all …]
/linux/Documentation/devicetree/bindings/mmc/
H A Dnvidia,tegra20-sdhci.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mmc/nvidia,tegra20-sdhci.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
18 mmc-controller.yaml and the properties for the Tegra SDHCI controller.
23 - enum:
24 - nvidia,tegra20-sdhci
25 - nvidia,tegra30-sdhci
[all …]
/linux/arch/arm/boot/dts/qcom/
H A Dqcom-apq8064-pins.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 sdcc1_default_state: sdcc1-default-state {
5 clk-pins {
7 drive-strength = <16>;
8 bias-disable;
11 cmd-pins {
13 drive-strength = <10>;
14 bias-pull-up;
17 data-pins {
19 drive-strength = <10>;
[all …]
H A Dqcom-apq8060-dragonboard.dts1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2 #include <dt-bindings/input/input.h>
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/leds/common.h>
5 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
6 #include <dt-bindings/pinctrl/qcom,pmic-mpp.h>
7 #include "qcom-msm8660.dtsi"
12 compatible = "qcom,apq8060-dragonboard", "qcom,msm8660";
19 stdout-path = "serial0:115200n8";
23 vph: regulator-fixed {
[all …]
/linux/arch/arm64/boot/dts/mediatek/
H A Dmt7986a-bananapi-bpi-r3-mini.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
4 * Authors: Frank Wunderlich <frank-w@public-files.de>
9 /dts-v1/;
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/leds/common.h>
14 #include <dt-bindings/pinctrl/mt65xx.h>
19 model = "Bananapi BPI-R3 Mini";
20 chassis-type = "embedded";
21 compatible = "bananapi,bpi-r3mini", "mediatek,mt7986a";
[all …]
H A Dmt7986a-rfb.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
7 /dts-v1/;
8 #include <dt-bindings/pinctrl/mt65xx.h>
14 chassis-type = "embedded";
15 compatible = "mediatek,mt7986a-rfb", "mediatek,mt7986a";
22 stdout-path = "serial0:115200n8";
30 reg_1p8v: regulator-1p8v {
31 compatible = "regulator-fixed";
32 regulator-name = "fixed-1.8V";
33 regulator-min-microvolt = <1800000>;
[all …]
H A Dmt8390-genio-common.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
4 * Author: Chris Chen <chris-qj.chen@mediatek.com>
9 * Louis-Alexis Eyraud <louisalexis.eyraud@collabora.com>
14 #include <dt-bindings/gpio/gpio.h>
15 #include <dt-bindings/input/input.h>
16 #include <dt-bindings/interrupt-controller/irq.h>
17 #include <dt-bindings/pinctrl/mediatek,mt8188-pinfunc.h>
18 #include <dt-bindings/regulator/mediatek,mt6360-regulator.h>
19 #include <dt-bindings/spmi/spmi.h>
20 #include <dt-bindings/usb/pd.h>
[all …]
H A Dmt8390-grinn-genio-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
4 * Author: Mateusz Koza <mateusz.koza@grinn-global.com>
8 #include <dt-bindings/input/input.h>
18 pinctrl-names = "default";
19 pinctrl-0 = <&i2c1_pins>;
20 clock-frequency = <400000>;
25 domain-supply = <&mt6359_vproc2_buck_reg>;
29 domain-supply = <&mt6359_vsram_others_ldo_reg>;
34 pinctrl-names = "default", "state_uhs";
35 pinctrl-0 = <&mmc0_default_pins>;
[all …]
H A Dmt8188-evb.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
5 /dts-v1/;
11 compatible = "mediatek,mt8188-evb", "mediatek,mt8188";
26 stdout-path = "serial0:115200n8";
34 reserved_memory: reserved-memory {
35 #address-cells = <2>;
36 #size-cells = <2>;
40 compatible = "shared-dma-pool";
42 no-map;
52 pinctrl-names = "default";
[all …]
/linux/Documentation/devicetree/bindings/pinctrl/
H A Dmediatek,mt8365-pinctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/mediatek,mt8365-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Zhiyong Tao <zhiyong.tao@mediatek.com>
11 - Bernhard Rosenkränzer <bero@baylibre.com>
18 const: mediatek,mt8365-pinctrl
23 mediatek,pctl-regmap:
24 $ref: /schemas/types.yaml#/definitions/phandle-array
32 gpio-controller: true
[all …]
H A Dthead,th1520-pinctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/thead,th1520-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: T-Head TH1520 SoC pin controller
10 - Emil Renner Berthing <emil.renner.berthing@canonical.com>
13 Pinmux and pinconf controller in the T-Head TH1520 RISC-V SoC.
17 PADCTRL_AOSYS -> PAD Group 1
18 PADCTRL1_APSYS -> PAD Group 2
19 PADCTRL0_APSYS -> PAD Group 3
[all …]
/linux/arch/riscv/boot/dts/starfive/
H A Djh7100-common.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR MIT
7 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/leds/common.h>
11 #include <dt-bindings/pinctrl/pinctrl-starfive-jh7100.h>
21 stdout-path = "serial0:115200n8";
25 timebase-frequency = <6250000>;
34 compatible = "gpio-leds";
36 led-ack {
40 linux,default-trigger = "heartbeat";
[all …]

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