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/freebsd/sys/contrib/device-tree/Bindings/net/
H A Dintel,ixp46x-ptp-timer.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/net/intel,ixp46x-ptp-timer.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Intel IXP46x PTP Timer (TSYNC)
11 - Linus Walleij <linus.walleij@linaro.org>
14 The Intel IXP46x PTP timer is known in the manual as IEEE1588 Hardware
15 Assist and Time Synchronization Hardware Assist TSYNC provides a PTP
16 timer. It exists in the Intel IXP45x and IXP46x XScale SoCs.
20 const: intel,ixp46x-ptp-timer
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H A Dfsl,fman.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Frank Li <Frank.Li@nxp.com>
13 Due to the fact that the FMan is an aggregation of sub-engines (ports, MACs,
19 - fsl,fman
26 cell-index:
31 The cell-index value may be used by the SoC, to identify the
33 there's a description of the cell-index use in each SoC:
35 - P1023:
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H A Dfsl,fman-dtsec.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/fsl,fman-dtsec.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Madalin Bucur <madalin.bucur@nxp.com>
15 10/100/1000 MBit/s speeds, and the 10-Gigabit Ethernet Media Access Controller
22 - fsl,fman-dtsec
23 - fsl,fman-xgec
24 - fsl,fman-memac
26 cell-index:
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H A Damd-xgbe.txt1 * AMD 10GbE driver (amd-xgbe)
4 - compatible: Should be "amd,xgbe-seattle-v1a"
5 - reg: Address and length of the register sets for the device
6 - MAC registers
7 - PCS registers
8 - SerDes Rx/Tx registers
9 - SerDes integration registers (1/2)
10 - SerDes integration registers (2/2)
11 - interrupts: Should contain the amd-xgbe interrupt(s). The first interrupt
13 amd,per-channel-interrupt property is specified, then one additional
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H A Dfsl-fman.txt5 - FMan Node
6 - FMan Port Node
7 - FMan MURAM Node
8 - FMan dTSEC/XGEC/mEMAC Node
9 - FMan IEEE 1588 Node
10 - FMan MDIO Node
11 - Example
18 Due to the fact that the FMan is an aggregation of sub-engines (ports, MACs,
23 - compatible
32 - cell-index
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/freebsd/sys/contrib/device-tree/Bindings/ptp/
H A Dptp-qoriq.txt1 * Freescale QorIQ 1588 timer based PTP clock
5 - compatible Should be "fsl,etsec-ptp" for eTSEC
6 Should be "fsl,fman-ptp-timer" for DPAA FMan
7 Should be "fsl,dpaa2-ptp" for DPAA2
8 Should be "fsl,enetc-ptp" for ENETC
9 - reg Offset and length of the register set for the device
10 - interrupts There should be at least two interrupts. Some devices
11 have as many as four PTP related interrupts.
15 - fsl,cksel Timer reference clock source.
16 - fsl,tclk-period Timer reference clock period in nanoseconds.
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H A Dfsl,ptp.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/ptp/fsl,ptp.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale QorIQ 1588 timer based PTP clock
10 - Frank Li <Frank.Li@nxp.com>
15 - enum:
16 - fsl,etsec-ptp
17 - fsl,fman-ptp-timer
18 - fsl,dpaa2-ptp
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/freebsd/sys/dev/cadence/
H A Dif_cgem_hw.h1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 2012-2013 Thomas Skibo
31 * controller such as the one used in Zynq-7000 SoC.
33 * Reference: Zynq-7000 All Programmable SoC Technical Reference Manual.
39 * https://www.xilinx.com/html_docs/registers/ug1087/ug1087-zynq-ultrascale-registers.html
244 #define CGEM_FRAMES_64B_TX 0x118 /* 64-Byte Frames xmitted */
245 #define CGEM_FRAMES_65_127B_TX 0x11C /* 65-127 Byte Frames xmitted*/
246 #define CGEM_FRAMES_128_255B_TX 0x120 /* 128-255 Byte Frames xmit */
247 #define CGEM_FRAMES_256_511B_TX 0x124 /* 256-511 Byte Frames xmit */
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/freebsd/sys/contrib/device-tree/src/arm/intel/ixp/
H A Dintel-ixp45x-ixp46x.dtsi1 // SPDX-License-Identifier: ISC
8 #include "intel-ixp4xx.dtsi"
13 compatible = "intel,ixp46x-expansion-bus-controller", "syscon";
19 compatible = "intel,ixp46x-rng";
23 interrupt-controller@c8003000 {
24 compatible = "intel,ixp43x-interrupt";
32 compatible = "intel,ixp4xx-udc";
39 compatible = "intel,ixp4xx-i2c";
47 compatible = "intel,ixp4xx-ethernet";
52 queue-rx = <&qmgr 0>;
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/freebsd/sys/contrib/device-tree/src/arm64/freescale/
H A Dqoriq-fman3-0.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
5 * Copyright 2012-2015 Freescale Semiconductor Inc.
9 #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
12 #address-cells = <1>;
13 #size-cells = <1>;
14 cell-index = <0>;
21 clock-names = "fmanclk";
22 fsl,qman-channel-range = <0x800 0x10>;
23 ptimer-handle = <&ptp_timer0>;
24 dma-coherent;
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H A Dqoriq-fman3-0-1g-2.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
5 * Copyright 2012-2015 Freescale Semiconductor Inc.
11 cell-index = <0xa>;
12 compatible = "fsl,fman-v3-port-rx";
17 cell-index = <0x2a>;
18 compatible = "fsl,fman-v3-port-tx";
23 cell-index = <2>;
24 compatible = "fsl,fman-memac";
26 fsl,fman-ports = <&fman0_rx_0x0a &fman0_tx_0x2a>;
27 ptp-timer = <&ptp_timer0>;
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H A Dqoriq-fman3-0-1g-1.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
5 * Copyright 2012-2015 Freescale Semiconductor Inc.
11 cell-index = <0x9>;
12 compatible = "fsl,fman-v3-port-rx";
17 cell-index = <0x29>;
18 compatible = "fsl,fman-v3-port-tx";
23 cell-index = <1>;
24 compatible = "fsl,fman-memac";
26 fsl,fman-ports = <&fman0_rx_0x09 &fman0_tx_0x29>;
27 ptp-timer = <&ptp_timer0>;
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H A Dqoriq-fman3-0-1g-4.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
5 * Copyright 2012-2015 Freescale Semiconductor Inc.
11 cell-index = <0xc>;
12 compatible = "fsl,fman-v3-port-rx";
17 cell-index = <0x2c>;
18 compatible = "fsl,fman-v3-port-tx";
23 cell-index = <4>;
24 compatible = "fsl,fman-memac";
26 fsl,fman-ports = <&fman0_rx_0x0c &fman0_tx_0x2c>;
27 ptp-timer = <&ptp_timer0>;
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H A Dqoriq-fman3-0-1g-3.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
5 * Copyright 2012-2015 Freescale Semiconductor Inc.
11 cell-index = <0xb>;
12 compatible = "fsl,fman-v3-port-rx";
17 cell-index = <0x2b>;
18 compatible = "fsl,fman-v3-port-tx";
23 cell-index = <3>;
24 compatible = "fsl,fman-memac";
26 fsl,fman-ports = <&fman0_rx_0x0b &fman0_tx_0x2b>;
27 ptp-timer = <&ptp_timer0>;
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H A Dqoriq-fman3-0-1g-0.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
5 * Copyright 2012-2015 Freescale Semiconductor Inc.
11 cell-index = <0x8>;
12 compatible = "fsl,fman-v3-port-rx";
17 cell-index = <0x28>;
18 compatible = "fsl,fman-v3-port-tx";
23 cell-index = <0>;
24 compatible = "fsl,fman-memac";
26 fsl,fman-ports = <&fman0_rx_0x08 &fman0_tx_0x28>;
27 ptp-timer = <&ptp_timer0>;
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H A Dqoriq-fman3-0-1g-5.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
5 * Copyright 2012-2015 Freescale Semiconductor Inc.
11 cell-index = <0xd>;
12 compatible = "fsl,fman-v3-port-rx";
17 cell-index = <0x2d>;
18 compatible = "fsl,fman-v3-port-tx";
23 cell-index = <5>;
24 compatible = "fsl,fman-memac";
26 fsl,fman-ports = <&fman0_rx_0x0d &fman0_tx_0x2d>;
27 ptp-timer = <&ptp_timer0>;
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/freebsd/sys/contrib/device-tree/src/powerpc/fsl/
H A Dqoriq-fman3-1.dtsi4 * Copyright 2012 - 2015 Freescale Semiconductor Inc.
36 #address-cells = <1>;
37 #size-cells = <1>;
38 cell-index = <1>;
44 clock-names = "fmanclk";
45 fsl,qman-channel-range = <0x820 0x10>;
46 ptimer-handle = <&ptp_timer1>;
49 compatible = "fsl,fman-muram";
54 cell-index = <0x2>;
55 compatible = "fsl,fman-v3-port-oh";
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H A Dqoriq-fman-0.dtsi4 * Copyright 2011 - 2015 Freescale Semiconductor Inc.
36 #address-cells = <1>;
37 #size-cells = <1>;
38 cell-index = <0>;
44 clock-names = "fmanclk";
45 fsl,qman-channel-range = <0x40 0xc>;
46 ptimer-handle = <&ptp_timer0>;
49 compatible = "fsl,fman-muram";
54 cell-index = <0x1>;
55 compatible = "fsl,fman-v2-port-oh";
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H A Dqoriq-fman-1.dtsi4 * Copyright 2011 - 2015 Freescale Semiconductor Inc.
36 #address-cells = <1>;
37 #size-cells = <1>;
38 cell-index = <1>;
44 clock-names = "fmanclk";
45 fsl,qman-channel-range = <0x60 0xc>;
46 ptimer-handle = <&ptp_timer1>;
49 compatible = "fsl,fman-muram";
54 cell-index = <0x1>;
55 compatible = "fsl,fman-v2-port-oh";
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H A Dqoriq-fman3l-0.dtsi4 * Copyright 2012 - 2015 Freescale Semiconductor Inc.
36 #address-cells = <1>;
37 #size-cells = <1>;
38 cell-index = <0>;
44 clock-names = "fmanclk";
45 fsl,qman-channel-range = <0x800 0x10>;
46 ptimer-handle = <&ptp_timer0>;
49 compatible = "fsl,fman-muram";
54 cell-index = <0x2>;
55 compatible = "fsl,fman-v3-port-oh";
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H A Dqoriq-fman3-0.dtsi4 * Copyright 2012 - 2015 Freescale Semiconductor Inc.
36 #address-cells = <1>;
37 #size-cells = <1>;
38 cell-index = <0>;
44 clock-names = "fmanclk";
45 fsl,qman-channel-range = <0x800 0x10>;
46 ptimer-handle = <&ptp_timer0>;
49 compatible = "fsl,fman-muram";
54 cell-index = <0x2>;
55 compatible = "fsl,fman-v3-port-oh";
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H A Dqoriq-fman3-0-10g-2.dtsi1 // SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-or-later
6 * Copyright 2012 - 2015 Freescale Semiconductor Inc.
11 cell-index = <0x8>;
12 compatible = "fsl,fman-v3-port-rx";
14 fsl,fman-10g-port;
18 cell-index = <0x28>;
19 compatible = "fsl,fman-v3-port-tx";
21 fsl,fman-10g-port;
25 cell-index = <0>;
26 compatible = "fsl,fman-memac";
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H A Dqoriq-fman3-0-10g-3.dtsi1 // SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-or-later
6 * Copyright 2012 - 2015 Freescale Semiconductor Inc.
11 cell-index = <0x9>;
12 compatible = "fsl,fman-v3-port-rx";
14 fsl,fman-10g-port;
18 cell-index = <0x29>;
19 compatible = "fsl,fman-v3-port-tx";
21 fsl,fman-10g-port;
25 cell-index = <1>;
26 compatible = "fsl,fman-memac";
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H A Dpq3-etsec1-timer-0.dtsi2 * PQ3 eTSEC Timer (IEEE 1588) device tree stub [ @ offsets 0x24e00 ]
36 compatible = "fsl,etsec-ptp";
/freebsd/sys/contrib/device-tree/Bindings/pinctrl/
H A Dmarvell,armada-xp-pinctrl.txt3 Please refer to marvell,mvebu-pinctrl.txt in this directory for common binding
7 - compatible: "marvell,mv78230-pinctrl", "marvell,mv78260-pinctrl",
8 "marvell,mv78460-pinctrl"
9 - reg: register specifier of MPP registers
39 mpp18 18 gpio, ge0(rxerr), ge1(rxd0), lcd(d18), ptp(trig)
40 mpp19 19 gpio, ge0(crs), ge1(rxd1), lcd(d19), ptp(evreq)
41 mpp20 20 gpio, ge0(rxd4), ge1(rxd2), lcd(d20), ptp(clk)
48 mpp27 27 gpio, lcd(e), tdm(dtx), ptp(trig)
49 mpp28 28 gpio, lcd(pwm), tdm(drx), ptp(evreq)
50 mpp29 29 gpio, lcd(ref-clk), tdm(int0), ptp(clk)
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