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/freebsd/sys/contrib/device-tree/Bindings/ptp/
H A Dfsl,ptp.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/ptp/fsl,ptp.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale QorIQ 1588 timer based PTP clock
10 - Frank Li <Frank.Li@nxp.com>
15 - enum:
16 - fsl,etsec-ptp
17 - fsl,fman-ptp-timer
18 - fsl,dpaa2-ptp
[all …]
/freebsd/sys/contrib/device-tree/Bindings/net/
H A Dfsl,fman.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Frank Li <Frank.Li@nxp.com>
13 Due to the fact that the FMan is an aggregation of sub-engines (ports, MACs,
19 - fsl,fman
26 cell-index:
27 $ref: /schemas/types.yaml#/definitions/uint32
31 The cell-index value may be used by the SoC, to identify the
33 there's a description of the cell-index use in each SoC:
[all …]
H A Dmscc,vsc7514-switch.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/net/mscc,vsc7514-switc
[all...]
H A Dsnps,dwmac.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Alexandre Torgue <alexandre.torgue@foss.st.com>
11 - Giuseppe Cavallaro <peppe.cavallaro@st.com>
12 - Jose Abreu <joabreu@synopsys.com>
23 - snps,dwmac
24 - snps,dwmac-3.40a
25 - snps,dwmac-3.50a
26 - snps,dwmac-3.610
[all …]
H A Dfsl,fman-dtsec.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/fsl,fman-dtsec.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Madalin Bucur <madalin.bucur@nxp.com>
15 10/100/1000 MBit/s speeds, and the 10-Gigabit Ethernet Media Access Controller
22 - fsl,fman-dtsec
23 - fsl,fman-xgec
24 - fsl,fman-memac
26 cell-index:
[all …]
H A Dmicrochip,lan966x-switch.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/net/microchip,lan966x-switch.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Horatiu Vultur <horatiu.vultur@microchip.com>
13 The lan966x switch is a multi-port Gigabit AVB/TSN Ethernet Switch with
14 two integrated 10/100/1000Base-T PHYs. In addition to the integrated PHYs,
15 it supports up to 2RGMII/RMII, up to 3BASE-X/SERDES/2.5GBASE-X and up to
16 2 Quad-SGMII/Quad-USGMII interfaces.
20 pattern: "^switch@[0-9a-f]+$"
[all …]
H A Dnvidia,tegra234-mgbe.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/nvidia,tegra234-mgbe.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Tegra234 MGBE Multi-Gigabit Ethernet Controller
10 - Thierry Reding <treding@nvidia.com>
11 - Jon Hunter <jonathanh@nvidia.com>
15 const: nvidia,tegra234-mgbe
20 reg-names:
22 - const: hypervisor
[all …]
H A Dfsl,fec.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shawn Guo <shawnguo@kernel.org>
11 - Wei Fang <wei.fang@nxp.com>
12 - NXP Linux Team <linux-imx@nxp.com>
15 - $ref: ethernet-controller.yaml#
20 - enum:
21 - fsl,imx25-fec
22 - fsl,imx27-fec
[all …]
H A Dmicrochip,sparx5-switch.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/net/microchip,sparx5-switch.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Steen Hegelund <steen.hegelund@microchip.com>
11 - Lars Povlsen <lars.povlsen@microchip.com>
14 The SparX-5 Enterprise Ethernet switch family provides a rich set of
15 Enterprise switching features such as advanced TCAM-based VLAN and
17 security through TCAM-based frame processing using versatile content
25 forwarding (uRPF) tasks. Additional L3 features include VRF-Lite and
[all …]
H A Dsocfpga-dwmac.txt9 - compatible : For Cyclone5/Arria5 SoCs it should contain
10 "altr,socfpga-stmmac". For Arria10/Agilex/Stratix10 SoCs
11 "altr,socfpga-stmmac-a10-s10".
14 - altr,sysmgr-syscon : Should be the phandle to the system manager node that
20 - altr,f2h_ptp_ref_clk use f2h_ptp_ref_clk instead of default eosc1 clock
21 for ptp ref clk. This affects all emacs as the clock is common.
24 altr,emac-splitter: Should be the phandle to the emac splitter soft IP node if
26 phy-mode: The phy mode the ethernet operates in
27 altr,sgmii-to-sgmii-converter: phandle to the TSE SGMII converter
32 - compatible : Should be altr,gmii-to-sgmii-2.0
[all …]
H A Dstm32-dwmac.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/net/stm32-dwmac.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Alexandre Torgue <alexandre.torgue@foss.st.com>
12 - Christophe Roullier <christophe.roullier@foss.st.com>
23 - st,stm32-dwmac
24 - st,stm32mp1-dwmac
25 - st,stm32mp13-dwmac
26 - st,stm32mp25-dwmac
[all …]
H A Dstarfive,jh7110-dwmac.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/net/starfive,jh7110-dwmac.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Emil Renner Berthing <kernel@esmil.dk>
12 - Samin Guo <samin.guo@starfivetech.com>
19 - starfive,jh7100-dwmac
20 - starfive,jh7110-dwmac
22 - compatible
27 - items:
[all …]
H A Dintel,dwmac-plat.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/intel,dwmac-plat.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Vineetha G. Jaya Kumaran <vineetha.g.jaya.kumaran@intel.com>
17 - intel,keembay-dwmac
19 - compatible
22 - $ref: snps,dwmac.yaml#
27 - items:
28 - enum:
[all …]
H A Dmediatek-dwmac.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/mediatek-dwma
[all...]
/freebsd/sys/contrib/device-tree/Bindings/pinctrl/
H A Dmarvell,armada-38x-pinctrl.txt3 Please refer to marvell,mvebu-pinctrl.txt in this directory for common binding
7 - compatible: "marvell,88f6810-pinctrl", "marvell,88f6820-pinctrl" or
8 "marvell,88f6828-pinctrl" depending on the specific variant of the
10 - reg: register specifier of MPP registers
32 mpp14 14 gpio, ge0(rxd2), ptp(clk), dram(vttctrl), spi0(cs3), dev(we1), pcie3(clkreq)
35 mpp17 17 gpio, ge0(rxclk), ptp(clk), ua1(rxd), spi0(sck), sata1(prsnt), sata0(prsnt)
36 mpp18 18 gpio, ge0(rxerr), ptp(trig), ua1(txd), spi0(cs0)
37 mpp19 19 gpio, ge0(col), ptp(evreq), ge0(txerr), sata1(prsnt), ua0(cts)
38 mpp20 20 gpio, ge0(txclk), ptp(clk), sata0(prsnt), ua0(rts)
53 mpp35 35 gpio, ref(clk_out1), dev(a1)
[all …]
H A Dmarvell,armada-xp-pinctrl.txt3 Please refer to marvell,mvebu-pinctrl.txt in this directory for common binding
7 - compatible: "marvell,mv78230-pinctrl", "marvell,mv78260-pinctrl",
8 "marvell,mv78460-pinctrl"
9 - reg: register specifier of MPP registers
39 mpp18 18 gpio, ge0(rxerr), ge1(rxd0), lcd(d18), ptp(trig)
40 mpp19 19 gpio, ge0(crs), ge1(rxd1), lcd(d19), ptp(evreq)
41 mpp20 20 gpio, ge0(rxd4), ge1(rxd2), lcd(d20), ptp(clk)
48 mpp27 27 gpio, lcd(e), tdm(dtx), ptp(trig)
49 mpp28 28 gpio, lcd(pwm), tdm(drx), ptp(evreq)
50 mpp29 29 gpio, lcd(ref-clk), tdm(int0), ptp(clk)
[all …]
H A Dmarvell,armada-39x-pinctrl.txt3 Please refer to marvell,mvebu-pinctrl.txt in this directory for common binding
7 - compatible: "marvell,88f6920-pinctrl", "marvell,88f6925-pinctrl" or
8 "marvell,88f6928-pinctrl" depending on the specific variant of the
10 - reg: register specifier of MPP registers
26 mpp8 8 gpio, dev(ad10), ptp(trig)
27 mpp9 9 gpio, dev(ad11), ptp(clk)
28 mpp10 10 gpio, dev(ad12), ptp(evreq)
54 mpp35 35 gpio, ref(clk), dev(a1)
57 mpp38 38 gpio, ref(clk), sd0(d0), dev(ad4), ge(rxd1)
65 mpp45 45 gpio, ref(clk), pcie0(rstout), ua1(rxd)
[all …]
H A Dmarvell,armada-375-pinctrl.txt3 Please refer to marvell,mvebu-pinctrl.txt in this directory for common binding
7 - compatible: "marvell,88f6720-pinctrl"
8 - reg: register specifier of MPP registers
18 mpp2 2 gpio, dev(ad4), ptp(evreq), led(c0), audio(sdi)
19 mpp3 3 gpio, dev(ad5), ptp(trig), led(p3), audio(mclk)
23 mpp7 7 gpio, dev(ad1), ptp(clk), led(p2), audio(extclk)
48 mpp32 32 gpio, ge1(txd2), spi1(sck), ptp(trig)
55 mpp39 39 gpio, ref(clkout)
79 mpp63 63 gpio, ptp(trig), led(p2), dev(burst/last)
82 mpp66 66 gpio, ptp(evreq), spi1(cs3)
H A Dmarvell,ac5-pinctrl.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/marvell,ac5-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chris Packham <chris.packham@alliedtelesis.co.nz>
13 Bindings for Marvell's AC5 memory-mapped pin controller.
18 - const: marvell,ac5-pinctrl
24 '-pins$':
26 $ref: pinmux-node.yaml#
31 $ref: /schemas/types.yaml#/definitions/string
[all …]
/freebsd/sys/contrib/device-tree/Bindings/net/dsa/
H A Dhirschmann,hellcreek.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - $ref: dsa.yaml#/$defs/ethernet-ports
13 - Andrew Lunn <andrew@lunn.ch>
14 - Florian Fainelli <f.fainelli@gmail.com>
15 - Vladimir Oltean <olteanv@gmail.com>
16 - Kurt Kanzenbach <kurt@linutronix.de>
26 - const: hirschmann,hellcreek-de1soc-r1
30 The physical base address and size of TSN and PTP memory base
[all …]
/freebsd/sys/contrib/device-tree/Bindings/tpm/
H A Dtcg,tpm-tis-i2c.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/tpm/tcg,tpm-tis-i2c.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: I²C-attached Trusted Platform Module conforming to TCG TIS specification
10 - Lukas Wunner <lukas@wunner.de>
13 The Trusted Computing Group (TCG) has defined a multi-vendor standard
17 …tps://trustedcomputinggroup.org/resource/pc-client-work-group-pc-client-specific-tpm-interface-spe…
21 TCG PC Client Platform TPM Profile Specification for TPM 2.0 (PTP)
22 https://trustedcomputinggroup.org/resource/pc-client-platform-tpm-profile-ptp-specification/
[all …]
/freebsd/sys/dev/axgbe/
H A Dxgbe-ptp.c126 nsec = pdata->hw_if.get_tstamp_time(pdata); in xgbe_cc_read()
143 delta = -delta; in xgbe_adjfreq()
146 adjust = pdata->tstamp_addend; in xgbe_adjfreq()
150 addend = (neg_adjust) ? pdata->tstamp_addend - diff : in xgbe_adjfreq()
151 pdata->tstamp_addend + diff; in xgbe_adjfreq()
153 spin_lock_irqsave(&pdata->tstamp_lock, flags); in xgbe_adjfreq()
155 pdata->hw_if.update_tstamp_addend(pdata, addend); in xgbe_adjfreq()
157 spin_unlock_irqrestore(&pdata->tstamp_lock, flags); in xgbe_adjfreq()
169 spin_lock_irqsave(&pdata->tstamp_lock, flags); in xgbe_adjtime()
170 timecounter_adjtime(&pdata->tstamp_tc, delta); in xgbe_adjtime()
[all …]
/freebsd/sys/contrib/device-tree/src/arm/nxp/imx/
H A Dimx6dl-sielaff.dts1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
6 /dts-v1/;
9 #include <dt-bindings/clock/imx6qdl-clock.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/input/input.h>
15 compatible = "sielaff,imx6dl-board", "fsl,imx6dl";
18 stdout-path = &uart2;
21 backlight: pwm-backlight {
22 compatible = "pwm-backlight";
23 pinctrl-names = "default";
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/rockchip/
H A Drk3588-pinctrl.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/pinctrl/rockchip.h>
7 #include "rockchip-pinconf.dtsi"
15 /omit-if-no-ref/
16 clk32k_out1: clk32k-out1 {
25 /omit-if-no-ref/
26 eth0_pins: eth0-pins {
35 /omit-if-no-ref/
36 fspim1_pins: fspim1-pins {
52 /omit-if-no-ref/
[all …]
H A Drk3588-extra-pinctrl.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/pinctrl/rockchip.h>
7 #include "rockchip-pinconf.dtsi"
15 /omit-if-no-ref/
16 clk32k_out1: clk32k-out1 {
25 /omit-if-no-ref/
26 eth0_pins: eth0-pins {
35 /omit-if-no-ref/
36 fspim1_pins: fspim1-pins {
52 /omit-if-no-ref/
[all …]

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