| /linux/drivers/misc/ |
| H A D | sram-exec.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * SRAM protect-exec region helper functions 5 * Copyright (C) 2017 Texas Instruments Incorporated - https://www.ti.com/ 25 unsigned long base = (unsigned long)part->base; in sram_check_protect_exec() 26 unsigned long end = base + block->size; in sram_check_protect_exec() 29 dev_err(sram->dev, in sram_check_protect_exec() 30 "SRAM pool marked with 'protect-exec' is not page aligned and will not be created.\n"); in sram_check_protect_exec() 31 return -ENOMEM; in sram_check_protect_exec() 40 list_add_tail(&part->list, &exec_pool_list); in sram_add_protect_exec() 47 * sram_exec_copy - copy data to a protected executable region of sram [all …]
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| H A D | sram.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * Generic on-chip SRAM allocation driver 19 #include <soc/at91/atmel-secumod.h> 34 mutex_lock(&part->lock); in sram_read() 35 memcpy_fromio(buf, part->base + pos, count); in sram_read() 36 mutex_unlock(&part->lock); in sram_read() 50 mutex_lock(&part->lock); in sram_write() 51 memcpy_toio(part->base + pos, buf, count); in sram_write() 52 mutex_unlock(&part->lock); in sram_write() 62 part->pool = devm_gen_pool_create(sram->dev, ilog2(SRAM_GRANULARITY), in sram_add_pool() [all …]
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| /linux/drivers/gpu/drm/xe/ |
| H A D | xe_hw_engine_group_types.h | 1 /* SPDX-License-Identifier: MIT */ 14 * enum xe_hw_engine_group_execution_mode - possible execution modes of a hw 17 * @EXEC_MODE_LR: execution in long-running mode 26 * struct xe_hw_engine_group - Hardware engine group 33 * @exec_queue_list: list of exec queues attached to this 37 /** @resume_work: worker to resume faulting LR exec queues */ 39 /** @resume_wq: workqueue to resume faulting LR exec queues */ 42 * @mode_sem: used to protect this group's hardware resources and ensure
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| H A D | xe_userptr.c | 1 // SPDX-License-Identifier: MIT 13 * xe_vma_userptr_check_repin() - Advisory check for repin needed 18 * without the vm->svm.gpusvm.notifier_lock held. There is no guarantee that the 22 * Return: 0 if userptr vma is valid, -EAGAIN otherwise; repin recommended. 26 return mmu_interval_check_retry(&uvma->userptr.notifier, in xe_vma_userptr_check_repin() 27 uvma->userptr.pages.notifier_seq) ? in xe_vma_userptr_check_repin() 28 -EAGAIN : 0; in xe_vma_userptr_check_repin() 32 * __xe_vm_userptr_needs_repin() - Check whether the VM does have userptrs 37 * and provides a release-type barrier on the svm.gpusvm.notifier_lock after 40 * Return: 0 if there are no userptrs needing repinning, -EAGAIN if there are. [all …]
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| H A D | xe_exec_queue.c | 1 // SPDX-License-Identifier: MIT 46 if (q->tlb_inval[i].dep_scheduler) in __xe_exec_queue_free() 47 xe_dep_scheduler_fini(q->tlb_inval[i].dep_scheduler); in __xe_exec_queue_free() 50 xe_pxp_exec_queue_remove(gt_to_xe(q->gt)->pxp, q); in __xe_exec_queue_free() 51 if (q->vm) in __xe_exec_queue_free() 52 xe_vm_put(q->vm); in __xe_exec_queue_free() 54 if (q->xef) in __xe_exec_queue_free() 55 xe_file_put(q->xef); in __xe_exec_queue_free() 62 struct xe_tile *tile = gt_to_tile(q->gt); in alloc_dep_schedulers() 71 gt = tile->primary_gt; in alloc_dep_schedulers() [all …]
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| H A D | xe_device_types.h | 1 /* SPDX-License-Identifier: MIT */ 3 * Copyright © 2022-2023 Intel Corporation 47 #define GRAPHICS_VER(xe) ((xe)->info.graphics_verx100 / 100) 48 #define MEDIA_VER(xe) ((xe)->info.media_verx100 / 100) 49 #define GRAPHICS_VERx100(xe) ((xe)->info.graphics_verx100) 50 #define MEDIA_VERx100(xe) ((xe)->info.media_verx100) 51 #define IS_DGFX(xe) ((xe)->info.is_dgfx) 62 ((_xe)->info.platform == (_platform) && \ 63 (_xe)->info.step.graphics >= (min_step) && \ 64 (_xe)->info.step.graphics < (max_step)) [all …]
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| /linux/tools/testing/selftests/exec/ |
| H A D | check-exec-tests.sh | 2 # SPDX-License-Identifier: GPL-2.0 7 # samples/check-exec/inc.c 11 set -u -e -o pipefail 14 exec 2>/dev/null 16 DIR="$(dirname $(readlink -f "$0"))" 29 if [[ ${ret} -ne ${expect} ]]; then 33 if [[ ${ret} -eq 0 && "${out}" != "${EXPECTED_OUTPUT}" ]]; then 49 if [[ ${ret} -ne ${expect} ]]; then 53 if [[ ${ret} -eq 0 && "${out}" != "${EXPECTED_OUTPUT}" ]]; then 67 out="$("$@" ./inc -i < "${script}")" || ret=$? [all …]
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| /linux/Documentation/gpu/ |
| H A D | drm-vm-bind-locking.rst | 1 .. SPDX-License-Identifier: (GPL-2.0+ OR MIT) 30 meta-data. Typically one per client (DRM file-private), or one per 33 associated meta-data. The backing storage of a gpu_vma can either be 34 a GEM object or anonymous or page-cache pages mapped also into the CPU 40 is anonymous or page-cache pages as described above. 43 page-table entries point to that backing store. 47 the :doc:`dma-buf doc </driver-api/dma-buf>`. 53 allows deadlock-safe locking of multiple dma_resvs in arbitrary 55 :doc:`dma-buf doc </driver-api/dma-buf>`. 56 * ``exec function``: An exec function is a function that revalidates all [all …]
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| /linux/drivers/gpu/drm/ |
| H A D | drm_gpuvm.c | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 48 * The GPU VA manager internally uses a rb-tree to manage the 63 * entries from within dma-fence signalling critical sections it is enough to 64 * pre-allocate the &drm_gpuva structures. 89 * lists are maintained in order to accelerate locking of dma-resv locks and 113 * implement Vulkan 'Sparse Memory Bindings' - drivers UAPIs often refer to this 151 * created such that those mappings are split up and re-mapped partially. 162 * dma-fence signalling critical path. 173 * by drm_gpuvm_sm_map() - it doesn't cover any arbitrary combinations of these. 181 * old: |-----------| (bo_offset=n) [all …]
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| /linux/Documentation/userspace-api/ |
| H A D | check_exec.rst | 1 .. SPDX-License-Identifier: GPL-2.0 12 `samples/check-exec/inc.c`_ example. 41 Programs should always perform this check to apply kernel-level checks against 60 To avoid race conditions leading to time-of-check to time-of-use issues, 76 securebits but without relying on any other user-controlled configuration. 103 of any exec securebits: 122 users. That can protect against unintended script executions (e.g. ``sh 123 /tmp/*.sh``). This makes sense for (semi-restricted) user sessions. 131 dm-verity/IPE) but where access rights might not be ready yet. Indeed, 143 .. _samples/check-exec/inc.c: [all …]
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| H A D | mseal.rst | 1 .. SPDX-License-Identifier: GPL-2.0 17 such an attacker primitive can break control-flow integrity guarantees 18 since read-only memory that is supposed to be trusted can become writable 29 ----------------------- 34 - The start address must be in an allocated VMA. 35 - The start address must be page aligned. 36 - The end address (**addr** + **len**) must be in an allocated VMA. 37 - no gap (unallocated memory) between start and end address. 44 - **0**: Success. 45 - **-EINVAL**: [all …]
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| /linux/Documentation/devicetree/bindings/arm/omap/ |
| H A D | mpu.txt | 1 * TI - MPU (Main Processor Unit) subsystem 8 - compatible : Should be "ti,omap3-mpu" for OMAP3 9 Should be "ti,omap4-mpu" for OMAP4 10 Should be "ti,omap5-mpu" for OMAP5 11 - ti,hwmods: "mpu" 14 - sram: Phandle to the ocmcram node 17 - pm-sram: Phandles to ocmcram nodes to be used for power management. 18 First should be type 'protect-exec' for the driver to use to copy 25 - For an OMAP5 SMP system: 28 compatible = "ti,omap5-mpu"; [all …]
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| /linux/Documentation/devicetree/bindings/memory-controllers/ti/ |
| H A D | emif.txt | 3 EMIF - External Memory Interface - is an SDRAM controller used in 11 - compatible : Should be of the form "ti,emif-<ip-rev>" where <ip-rev> 14 "ti,emif-am3352" 15 "ti,emif-am4372" 16 "ti,emif-dra7xx" 17 "ti,emif-keystone" 19 - phy-type : <u32> indicating the DDR phy type. Following are the 24 - device-handle : phandle to a "lpddr2" node representing the memory part 26 - ti,hwmods : For TI hwmods processing and omap device creation 29 - interrupts : interrupt used by the controller [all …]
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| /linux/arch/powerpc/mm/ |
| H A D | pgtable.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 7 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) 29 #include <asm/pte-walk.h> 41 return current->thread.regs && TRAP(current->thread.regs) == 0x400; in is_exec_fault() 76 /* Server-style MMU handles coherency when hashing if HW exec permission 77 * is supposed per page (currently 64-bit only). If not, then, we always 78 * flush the cache for valid PTEs in set_pte. Embedded CPU without HW exec 90 if (!test_bit(PG_dcache_clean, &folio->flags.f)) { in set_pte_filter_hash() 92 set_bit(PG_dcache_clean, &folio->flags.f); in set_pte_filter_hash() 104 /* Embedded type MMU with HW exec support. This is a bit more complicated [all …]
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| /linux/Documentation/arch/x86/ |
| H A D | shstk.rst | 1 .. SPDX-License-Identifier: GPL-2.0 4 Control-flow Enforcement Technology (CET) Shadow Stack 10 Control-flow Enforcement Technology (CET) covers several related x86 processor 12 can protect both applications and the kernel. 20 control-protection fault. IBT verifies indirect CALL/JMP targets are intended 22 Stack and Indirect Branch Tracking. Today in the 64-bit kernel, only userspace 45 from readelf/llvm-readelf output:: 47 readelf -n <application> | grep -a SHSTK 60 on a per-thread basis. The enablement status is inherited on clone, so if the 90 -EPERM if any of the passed feature are locked. [all …]
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| /linux/fs/ |
| H A D | exec.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * linux/fs/exec.c 9 * #!-checking implemented by tytso. 12 * Demand-loading implemented 01.12.91 - no need to read anything but 14 * "current->executable", and page faults do the actual loading. Clean. 17 * was less than 2 hours work to get demand-loading completely implemented. 20 * current->executable is only used by the procfs. This allows a dispatch 81 /* For vma exec functions. */ 94 insert ? list_add(&fmt->lh, &formats) : in __register_binfmt() 95 list_add_tail(&fmt->lh, &formats); in __register_binfmt() [all …]
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| /linux/include/uapi/linux/ |
| H A D | taskstats.h | 1 /* SPDX-License-Identifier: LGPL-2.1 WITH Linux-syscall-note */ 2 /* taskstats.h - exporting per-task statistics 22 /* Format for per-task data returned to userland when 23 * - a task exits 24 * - listener requests stats for a task 33 * c) add new fields after version comment; maintain 64-bit alignment 76 /* Following four fields atomically updated using task->delays->lock */ 88 /* cpu "wall-clock" running time 127 /* Accumulated RSS usage in duration of a task, in MBytes-usecs. 133 __u64 coremem; /* accumulated RSS usage in MB-usec */ [all …]
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| /linux/Documentation/driver-api/ |
| H A D | dma-buf.rst | 1 Buffer Sharing and Synchronization (dma-buf) 4 The dma-buf subsystem provides the framework for sharing buffers for 14 interact with the three main primitives offered by dma-buf: 16 - dma-buf, representing a sg_table and exposed to userspace as a file 19 - dma-fence, providing a mechanism to signal when an asynchronous 21 - dma-resv, which manages a set of dma-fences for a particular dma-buf 22 allowing implicit (kernel-ordered) synchronization of work to 27 -------------------------------- 29 For more details on how to design your subsystem's API for dma-buf use, please 30 see Documentation/userspace-api/dma-buf-alloc-exchange.rst. [all …]
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| /linux/tools/testing/selftests/drivers/net/ |
| H A D | stats.py | 2 # SPDX-License-Identifier: GPL-2.0 24 def check_pause(cfg) -> None: 31 ethnl.pause_get({"header": {"dev-index": cfg.ifindex}}) 37 data = ethnl.pause_get({"header": {"dev-index": cfg.ifindex, 42 def check_fec(cfg) -> None: 49 ethnl.fec_get({"header": {"dev-index": cfg.ifindex}}) 55 data = ethnl.fec_get({"header": {"dev-index": cfg.ifindex, 60 def check_fec_hist(cfg) -> Non [all...] |
| /linux/Documentation/filesystems/ |
| H A D | affs.rst | 1 .. SPDX-License-Identifier: GPL-2.0 19 in file names are case-insensitive, as they ought to be. 44 protect 107 Amiga -> Linux: 111 - R maps to r for user, group and others. On directories, R implies x. 113 - W maps to w. 115 - E maps to x. 117 - D is ignored. 119 - H, S and P are always retained and ignored under Linux. 121 - A is cleared when a file is written to. [all …]
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| /linux/include/linux/sched/ |
| H A D | signal.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 13 #include <linux/posix-timers.h> 18 * Types defining task->signal and task->sighand and APIs using them: 29 * Per-process accounting stats: 61 * struct thread_group_cputimer - thread group interval timer counts 103 /* current thread group signal load-balancing target: */ 126 * manager, to re-parent orphan (double-forking) child processes 212 * getrlimit/setrlimit use task_lock(current->group_leader) to 213 * protect this instead of the siglock, because they really 219 struct pacct_struct pacct; /* per-process accounting information */ [all …]
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| /linux/drivers/gpu/drm/amd/amdgpu/ |
| H A D | amdgpu_vm.h | 55 #define AMDGPU_VM_PTE_COUNT(adev) (1 << (adev)->vm_manager.block_size) 89 /* Flag combination to set no-retry with TF disabled */ 93 /* Flag combination to set no-retry with TF enabled */ 169 #define AMDGPU_VA_RESERVED_CSA_START(adev) (((adev)->vm_manager.max_pfn \ 171 - AMDGPU_VA_RESERVED_CSA_SIZE) 174 - AMDGPU_VA_RESERVED_SEQ64_SIZE) 177 - AMDGPU_VA_RESERVED_TRAP_SIZE) 188 * PDB2->PDB1->PDB0->PTB 346 /* Lock to protect vm_bo add/del/move on all lists of vm */ 356 * evicted -> relocated (PDs, PTs) or moved (per VM BOs) -> idle [all …]
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| /linux/include/linux/ |
| H A D | fsnotify_backend.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 43 #define FS_OPEN_EXEC 0x00001000 /* File was opened for exec */ 57 #define FS_OPEN_EXEC_PERM 0x00040000 /* open/exec event in a permission hook */ 60 #define FS_PRE_ACCESS 0x00100000 /* Pre-content access hook */ 80 * Directory entry modification events - reported only to directory 93 /* Pre-content events can be used to fill file content */ 142 * handle_event - main call for a group to handle an fs event 147 * @dir: optional directory associated with event - 154 * handle_inode_event - simple variant of handle_event() for groups that only 159 * @dir: optional directory associated with event - [all …]
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| /linux/drivers/net/ethernet/mellanox/mlx5/core/lib/ |
| H A D | crypto.c | 1 // SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB 7 #define MLX5_CRYPTO_DEK_POOLS_NUM (MLX5_ACCEL_OBJ_TYPE_KEY_NUM - 1) 8 #define type2idx(type) ((type) - 1) 17 _a->num_deks - _a->avail_deks - _a->in_use_deks; }) 24 _bulk->avail_deks == _bulk->num_deks; }) 36 struct mutex lock; /* protect the following lists, and the bulks */ 41 /* No in-used keys, and all need to be synced. 50 spinlock_t destroy_lock; /* protect destroy_list */ 87 return dek->obj_id; in mlx5_crypto_dek_get_id() 105 return -EINVAL; in mlx5_crypto_dek_get_key_sz() [all …]
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| /linux/drivers/mtd/nand/raw/ |
| H A D | qcom_nandc.c | 1 // SPDX-License-Identifier: GPL-2.0-only 9 #include <linux/dma-mapping.h> 18 #include <linux/mtd/nand-qpic-common.h> 82 * ecc/non-ecc mode for the current nand flash 132 ((u8 *)chip->controller - sizeof(struct qcom_nand_controller)); in get_qcom_nand_controller() 137 return ioread32(nandc->base + offset); in nandc_read() 143 iowrite32(val, nandc->base + offset); in nandc_write() 149 return cw == (ecc->steps - 1); in qcom_nandc_is_last_cw() 153 * nandc_set_read_loc_first() - to set read location first register 175 nandc->regs->read_location0 = locreg_val; in nandc_set_read_loc_first() [all …]
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