| /freebsd/sys/contrib/device-tree/Bindings/interrupt-controller/ |
| H A D | fsl,mu-msi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/fsl,mu-msi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Frank Li <Frank.Li@nxp.com>
16 for one processor (A side) to signal the other processor (B side) using
20 different clocks (from each side of the different peripheral buses).
21 Therefore, the MU must synchronize the accesses from one side to the
23 registers (Processor A-side, Processor B-side).
28 - $ref: /schemas/interrupt-controller/msi-controller.yaml#
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| /freebsd/sys/contrib/device-tree/Bindings/mailbox/ |
| H A D | fsl,mu.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Dong Aisheng <aisheng.dong@nxp.com>
16 for one processor to signal the other processor using interrupts.
19 different clocks (from each side of the different peripheral buses).
20 Therefore, the MU must synchronize the accesses from one side to the
22 registers (Processor A-facing, Processor B-facing).
27 - const: fsl,imx6sx-mu
28 - const: fsl,imx7ulp-mu
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| /freebsd/lib/libpmc/pmu-events/arch/powerpc/power9/ |
| H A D | other.json | 45 …"BriefDescription": "The processor's data cache was reloaded from a location other than the local …
50 …dified (M) data from another core's ECO L3 on the same chip due to a data side request. When using…
65 "BriefDescription": "Read-write data cache collisions"
90 "BriefDescription": "D-cache invalidates sent over the reload bus to the core"
95 …"BriefDescription": "The processor's Instruction cache was reloaded from the local chip's Memory d…
145 …"BriefDescription": "The processor's data cache was reloaded from local core's L2 with load hit st…
200 "BriefDescription": "Read-write data cache collisions"
255 …"BriefDescription": "The processor's data cache was reloaded from local core's L2 with load hit st…
280 …-word boundary, which causes it to require an additional slice than than what normally would be re…
300 "BriefDescription": "I-cache Invalidates sent over the realod bus to the core"
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| /freebsd/lib/libpmc/pmu-events/arch/powerpc/power8/ |
| H A D | other.json | 11 …"BriefDescription": "Cycles in 2-lpar mode. Threads 0-3 belong to Lpar0 and threads 4-7 belong to …
17 …cles in 4 LPAR mode. Threads 0-1 belong to lpar0, threads 2-3 belong to lpar1, threads 4-5 belong …
113 …to the Target Address Prediction from the Count Cache or Link Stack. Only XL-form branches that re…
161 …ed. I-form branches do not set this event. In addition, B-form branches which do not use the BHT d…
167 …ed. I-form branches do not set this event. In addition, B-form branches which do not use the BHT d…
197 …ional Branch Completed on BR0 that had its target address predicted. Only XL-form branches set thi…
203 …ional Branch Completed on BR1 that had its target address predicted. Only XL-form branches set thi…
215 …t used for this branch. This can be an I-form branch, a B-form branch with BO-field set to branch …
221 …t used for this branch. This can be an I-form branch, a B-form branch with BO-field set to branch …
371 "BriefDescription": "IFU Finished a (non-branch) instruction",
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| /freebsd/sys/contrib/device-tree/Bindings/remoteproc/ |
| H A D | st,stm32-rproc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/st,stm32-rproc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STMicroelectronics STM32 remote processor controller
14 - Fabien Dessenne <fabien.dessenne@foss.st.com>
15 - Arnaud Pouliquen <arnaud.pouliquen@foss.st.com>
19 const: st,stm32mp1-m4
24 processor.
31 reset-names:
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| /freebsd/share/doc/psd/17.m4/ |
| H A D | m4.ms | 1 .\" Copyright (C) Caldera International Inc. 2001-2002. All rights reserved.
40 .EH 'PSD:17-%''The M4 Macro Processor'
41 .OH 'The M4 Macro Processor''PSD:17-%'
46 \&\\$3\s-1\\$1\\s0\&\\$2
73 .tr --||''^^!!
80 .hw semi-colon
81 .hw estab-lished
83 . \"2=not last lines; 4= no -xx; 8=no xx-
88 .\" .....TM 77-1273-6 39199 39199-11
91 The M4 Macro Processor
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| /freebsd/share/doc/smm/06.nfs/ |
| H A D | 1.t | 43 the client side.
49 The client side can operate without any daemons running, but performance
50 will be improved by running nfsiod daemons that perform read-aheads
51 and write-behinds.
52 For the server side to function, the daemons portmap, mountd and
68 The client side mount_nfs along with portmap and
78 On the server side,
80 require the \fB-n\fR option to enable non-root mount request servicing.
86 The server side requires that the daemons
92 Other server side problems are normally caused by problems with the format
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|
| /freebsd/sys/dev/bnxt/bnxt_en/ |
| H A D | hsi_struct_def.h | 1 /*-
34 * Copyright(c) 2001-2025, Broadcom. All rights reserved. The
53 /* hwrm_cmd_hdr (size:128b/16B) */
71 * * 0x0-0xFFF8 - The function ID
72 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
73 * * 0xFFFD - Reserved for user-space HWRM interface
74 * * 0xFFFF - HWRM
87 /* hwrm_resp_hdr (size:64b/8B) */
122 /* Engine CKV - The Alias key EC curve and ECC public key information. */
124 /* Engine CKV - Initialization vector. */
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|
| /freebsd/usr.bin/clang/llvm-mca/ |
| H A D | llvm-mca.1 | 4 .nr rst2man-indent-level 0
7 \\$1 \\n[an-margin]
8 level \\n[rst2man-indent-level]
9 level margin: \\n[rst2man-indent\\n[rst2man-indent-level]]
10 -
11 \\n[rst2man-indent0]
12 \\n[rst2man-indent1]
13 \\n[rst2man-indent2]
18 . nr rst2man-indent\\n[rst2man-indent-level] \\n[an-margin]
19 . nr rst2man-indent-level +1
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|
| /freebsd/lib/libpmc/pmu-events/arch/x86/amdzen3/ |
| H A D | memory.json | 5 …"BriefDescription": "Non-forwardable conflict; used to reduce STLI's via software. All reasons. St…
6 …-to-load conflicts: A load was unable to complete due to a non-forwardable conflict with an older …
24 "BriefDescription": "Retired lock instructions. Non-speculative lock succeeded.",
36 … "BriefDescription": "The number of retired CLFLUSH instructions. This is a non-speculative event."
46 …"BriefDescription": "Load-op-Store Dispatch. Dispatch of a single op that performs a load from and…
84 "BriefDescription": "A non-cacheable store and the non-cacheable commit buffer is full.",
91 …esses, although these are generally rare. Each increment represents an eight-byte access, although…
258 "BriefDescription": "Total Page Table Walks on I-side.",
276 "BriefDescription": "Total Page Table Walks on D-side.",
300 "BriefDescription": "The number of 64B misaligned (i.e., cacheline crossing) loads.",
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|
| /freebsd/share/man/man4/ |
| H A D | ddb.4 | 22 .\" Pittsburgh PA 15213-3890
35 .Bd -ragged -offset indent
42 .Bd -ragged -offset indent
48 .Bd -ragged -offset indent
54 .Bd -ragged -offset indent
63 .Bd -ragged -offset indent
83 MIB variable is set non-zero,
97 is already set non-zero.
146 of -1 is equivalent to a missing
161 .Dq Li --More--
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| /freebsd/lib/libpmc/ |
| H A D | pmc.atomsilvermont.3 | 45 .Bl -tag -width "Li PMC_CLASS_IAP"
47 Fixed-function counters that count only one hardware event per counter.
59 .%B "Intel 64 and IA-32 Intel(R) Architecture Software Developer's Manual"
61 .%N "Order Number 325462-050US"
70 .Bl -column "PMC_CAP_INTERRUPT" "Support"
87 .Bl -tag -width indent
89 Count matching events seen on any logical processor in a package.
95 Configure the PMC to count the number of de-asserted to asserted
108 Configure the PMC to count events happening at processor privilege
121 Events that require core-specificity to be specified use a
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|
| /freebsd/share/misc/ |
| H A D | pci_vendors | 5 # Date: 2025-10-18 03:15:01
8 # the PCI ID Project at https://pci-ids.ucw.cz/.
14 # (version 2 or higher) or the 3-clause BSD License.
25 # device device_name <-- single tab
26 # subvendor subdevice subsystem_name <-- two tabs
30 # This is a relabelled RTL-8139
31 8139 AT-2500TX V3 Ethernet
41 7a09 PCI-to-PCI Bridge
51 7a19 PCI-to-PCI Bridge
57 7a29 PCI-to-PCI Bridge
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|
| H A D | usb_hid_usages | 4 # - lines that do not start with a white space give the number and name of
6 # - lines that start with a white space give the number and name of
20 0x08 Multi-axis Controller
62 0x90 D-pad Up
63 0x91 D-pad Down
64 0x92 D-pad Right
65 0x93 D-pad Left
107 0xB2 Anti-Torque Control
238 0x05 Keyboard b and B
278 0x2D Keyboard - and (underscore)
[all …]
|
| /freebsd/contrib/llvm-project/llvm/include/llvm/Target/ |
| H A D | Target.td | 1 //===- Target.td - Target Independent TableGen interface ---*- tablegen -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 // This file defines the target-independent interfaces which should be
12 //===----------------------------------------------------------------------===//
19 //===----------------------------------------------------------------------===//
20 // Register file description - These classes are used to fill in the target
25 // For example, "+feat1,-feat2" will indicate that the mode is active
44 // The n-th element on the Objects list will be associated with the n-th
88 int Offset = offset; // Offset of the first bit of the sub-reg index.
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|
| /freebsd/sys/contrib/zstd/ |
| H A D | CONTRIBUTING.md | 30 Zstd uses a branch-based workflow for making changes to the codebase. Typically, zstd
51 git checkout -b <branch-name>
52 git push origin <branch-name>
57 git add -u && git commit -m <message>
58 git push origin <branch-name>
113 executing it. It usually helps us find many simple bugs. Zstd uses clang's `scan-build` tool for
114 …install it by following the instructions for your OS on https://clang-analyzer.llvm.org/scan-build.
122 In general, you can use `scan-build` to static analyze any build script. For example, to static ana…
126 scan-build make -C contrib/largeNbDicts largeNbDicts
130 `scan-build` is part of our regular CI suite. Other static analyzers are not.
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| /freebsd/sys/cam/ctl/ |
| H A D | README.ctl.txt | 2 CTL - CAM Target Layer Description
21 CTL is a disk, processor and cdrom device emulation subsystem originally
27 available under a BSD-style license. The intent behind the agreement was
33 - Disk, processor and cdrom device emulation.
34 - Tagged queueing
35 - SCSI task attribute support (ordered, head of queue, simple tags)
36 - SCSI implicit command ordering support. (e.g. if a read follows a mode
38 - Full task management support (abort, LUN reset, target reset, etc.)
39 - Support for multiple ports
40 - Support for multiple simultaneous initiators
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| /freebsd/sys/contrib/dev/iwlwifi/ |
| H A D | iwl-csr.h | 1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
3 * Copyright (C) 2005-2014, 2018-2025 Intel Corporation
4 * Copyright (C) 2013-2014 Intel Mobile Communications GmbH
14 * low power states due to driver-invoked device resets
15 * (e.g. CSR_RESET_REG_FLAG_SW_RESET) or uCode-driven power-saving modes.
21 * The MAC (uCode processor, etc.) does not need to be powered up for accessing
30 #define CSR_INT_COALESCING (CSR_BASE+0x004) /* accum ints, 32-usec units */
37 #define CSR_FUNC_SCRATCH (CSR_BASE+0x02c) /* Scratch register - used for FW dbg */
45 * 31-16: Reserved
46 * 15-4: Type of device: see CSR_HW_REV_TYPE_xxx definitions
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| /freebsd/crypto/openssl/crypto/ |
| H A D | threads_win.c | 2 * Copyright 2016-2025 The OpenSSL Project Authors. All Rights Reserved.
21 * https://docs.microsoft.com/en-us/cpp/intrinsics/interlockedor-intrinsic-functions#requirements
89 /* rcu generation counter for in-order retirement */
107 /* lock protecting write side operations */
116 /* lock to enforce in-order retirement */
132 lock->group_count = count; in allocate_new_qp_group()
155 new->ctx = ctx; in ossl_rcu_lock_new()
156 new->rw_lock = CRYPTO_THREAD_lock_new(); in ossl_rcu_lock_new()
157 new->write_lock = ossl_crypto_mutex_new(); in ossl_rcu_lock_new()
158 new->alloc_signal = ossl_crypto_condvar_new(); in ossl_rcu_lock_new()
[all …]
|
| H A D | threads_pthread.c | 2 * Copyright 2016-2025 The OpenSSL Project Authors. All Rights Reserved.
48 * See: https://github.com/llvm/llvm-project/commit/a4c2602b714e6c6edb98164550a5ae829b2de760
63 * The Non-Stop KLT thread model currently seems broken in its rwlock
83 * not true on 32-bit pointer platforms, as a |uint64_t| is twice as large)
173 *p -= v; in fallback_atomic_sub_fetch()
225 /* rcu generation counter for in-order retirement */
243 /* lock protecting write side operations */
252 /* lock to enforce in-order retirement */
259 /* Read side acquisition of the current qp */
266 qp_idx = ATOMIC_LOAD_N(uint32_t, &lock->reader_idx, __ATOMIC_RELAXED); in get_hold_current_qp()
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|
| /freebsd/share/man/man9/ |
| H A D | cdefs.9 | 1 .\"-
4 .\" SPDX-License-Identifier: BSD-2-Clause
30 .Bl -tag -offset 2n -width 0
32 .Bl -column -offset 0n indent-two
42 .Bl -column -offset 0n indent-two
63 .Bl -column "---------------"
66 __volatile in pre-ANSI environments that support this extension or nothing
69 __inline in pre-ANSI environments that support this extension or nothing
73 .It Dv __CONCAT Ta used to paste two pre-processor tokens.
83 .Bl -column "---------------"
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|
| /freebsd/sys/contrib/dev/acpica/common/ |
| H A D | dmtbinfo2.c | 3 * Module Name: dmtbinfo2 - Table info for non-AML tables
11 * Some or all of this work - Copyright (c) 1999 - 2025, Intel Corp.
28 * 2.3. Intel grants Licensee a non-exclusive and non-transferable patent
104 * re-exports any such software from a foreign destination, Licensee shall
105 * ensure that the distribution and export/re-export of the software is in
108 * any of its subsidiaries will export/re-export any technical data, process,
130 * 3. Neither the names of the above-listed copyright holders nor the names
157 /* This module used for application-level code only */
165 * - Add the C table definition to the actbl1.h or actbl2.h header.
166 * - Add ACPI_xxxx_OFFSET macro(s) for the table (and subtables) to list below.
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| /freebsd/contrib/llvm-project/clang/include/clang/Basic/ |
| H A D | AttrDocs.td | 1 //==--- AttrDocs.td - Attribute documentation ----------------------------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===---------------------------------------------------------------------===//
9 // To test that the documentation builds cleanly, you must run clang-tblgen to
15 // To run clang-tblgen to generate the .rst file:
16 // clang-tblgen -gen-attr-docs -I <root>/llvm/tools/clang/include
17 // <root>/llvm/tools/clang/include/clang/Basic/Attr.td -o
20 // To run sphinx to generate the .html files (note that sphinx-build must be
24 // Non-Windows (from within the clang\docs directory):
25 // sphinx-build -b html _build/html
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| /freebsd/sys/contrib/x86emu/ |
| H A D | x86emu.c | 8 * Copyright (C) 1996-1999 SciTech Software, Inc.
9 * Copyright (C) David Mosberger-Tang
179 if (emu->_x86emu_intrTab[intno]) { in x86emu_intr_dispatch()
180 (*emu->_x86emu_intrTab[intno]) (emu, intno); in x86emu_intr_dispatch()
182 push_word(emu, (uint16_t) emu->x86.R_FLG); in x86emu_intr_dispatch()
185 push_word(emu, emu->x86.R_CS); in x86emu_intr_dispatch()
186 emu->x86.R_CS = fetch_word(emu, 0, intno * 4 + 2); in x86emu_intr_dispatch()
187 push_word(emu, emu->x86.R_IP); in x86emu_intr_dispatch()
188 emu->x86.R_IP = fetch_word(emu, 0, intno * 4); in x86emu_intr_dispatch()
197 if (emu->x86.intr & INTR_SYNCH) { in x86emu_intr_handle()
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| /freebsd/contrib/bmake/ |
| H A D | make.1 | 78 .%T "PMake \- A Tutorial"
87 .Bl -tag -width Ds
88 .It Fl B
105 .It Fl d Oo Cm \- Oc Ns Ar flags
110 .Ql \- ,
124 .Bl -tag -width Ds
218 Print debugging information about suffix-transformation rules.
258 Ignore non-zero exit of shell commands in the makefile.
287 .Fl B
311 .Li \&< Ns Ar file Ns Li \&> Ns -style
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|