| /linux/Documentation/devicetree/bindings/powerpc/ |
| H A D | ibm,powerpc-cpu-features.txt | 13 enablement, privilege, and compatibility metadata.
94 - usable-privilege
104 This property describes the privilege levels and/or software components
118 This property describes the HV privilege support required to enable the
119 feature to lesser privilege levels. If the property does not exist then no
137 This property describes the OS privilege support required to enable the
138 feature to lesser privilege levels. If the property does not exist then no
179 This property may exist when the usable-privilege property value has PR bit set.
213 usable-privilege = <1 | 2 | 4>;
219 usable-privilege = <1 | 2>;
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| /linux/arch/powerpc/boot/dts/ |
| H A D | microwatt.dts | 46 usable-privilege = <6>;
52 usable-privilege = <7>;
59 usable-privilege = <6>;
65 usable-privilege = <7>;
70 usable-privilege = <2>;
78 usable-privilege = <7>;
87 usable-privilege = <7>;
96 usable-privilege = <7>;
104 usable-privilege = <7>;
109 usable-privilege = <7>;
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| /linux/arch/arm64/include/asm/ |
| H A D | hw_breakpoint.h | 17 privilege : 2, member
27 /* Privilege Levels */
35 u32 val = (ctrl.len << 5) | (ctrl.type << 3) | (ctrl.privilege << 1) | in encode_ctrl_reg()
38 if (is_kernel_in_hyp_mode() && ctrl.privilege == AARCH64_BREAKPOINT_EL1) in encode_ctrl_reg()
49 ctrl->privilege = reg & 0x3; in decode_ctrl_reg()
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| /linux/arch/arm64/kernel/ |
| H A D | hw_breakpoint.c | 138 * Convert a breakpoint privilege level to the corresponding exception
141 static enum dbg_active_el debug_exception_level(int privilege) in debug_exception_level() argument
143 switch (privilege) { in debug_exception_level()
149 pr_warn("invalid breakpoint privilege level %d\n", privilege); in debug_exception_level()
230 enum dbg_active_el dbg_el = debug_exception_level(info->ctrl.privilege); in hw_breakpoint_control()
490 * Privilege in arch_build_bp_info()
495 hw->ctrl.privilege = AARCH64_BREAKPOINT_EL1; in arch_build_bp_info()
497 hw->ctrl.privilege = AARCH64_BREAKPOINT_EL0; in arch_build_bp_info()
570 if (hw->ctrl.privilege == AARCH64_BREAKPOINT_EL1 && bp->hw.target) in hw_breakpoint_arch_parse()
583 int i, max_slots, privilege; in toggle_bp_registers() local
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| /linux/arch/arm/include/asm/ |
| H A D | hw_breakpoint.h | 17 privilege : 2,
31 (ctrl.privilege << 1) | ctrl.enabled; in encode_ctrl_reg()
39 ctrl->privilege = reg & 0x3; in decode_ctrl_reg()
68 /* Privilege Levels */
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| /linux/arch/sparc/include/uapi/asm/ |
| H A D | psr.h | 7 * PSTATE.PRIV for the current CPU privilege level.
24 #define PSR_PS 0x00000040 /* previous privilege level */
25 #define PSR_S 0x00000080 /* current privilege level */
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| H A D | psrcompat.h | 10 #define PSR_PS 0x00000040 /* previous privilege level */
11 #define PSR_S 0x00000080 /* current privilege level */
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| H A D | pstate.h | 30 #define PSTATE_PRIV _AC(0x0000000000000004,UL) /* Privilege. */
72 #define TSTATE_PRIV _AC(0x0000000000000400,UL) /* Privilege. */
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| /linux/include/linux/ |
| H A D | tsm.h | 13 * Privilege level is a nested permission concept to allow confidential
20 * @privlevel: optional privilege level to associate with @outblob
60 * @TSM_REPORT_PRIVLEVEL: index of the desired privilege level attribute
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| /linux/Documentation/userspace-api/ |
| H A D | no_new_privs.rst | 26 promises not to grant the privilege to do anything that could not have
41 Note that ``no_new_privs`` does not prevent privilege changes that do not
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| /linux/Documentation/devicetree/bindings/bus/ |
| H A D | st,stm32mp25-rifsc.yaml | 21 any security domains (secure, privilege, compartment).
30 security domains (secure, privilege, compartment).
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| /linux/Documentation/admin-guide/LSM/ |
| H A D | Smack.rst | 425 Privilege:
427 policy is said to have privilege. As of this writing a task can
428 have privilege either by possessing capabilities or by having an
614 only be changed by a process with privilege.
616 Privilege section in Smack Basics
779 privilege.
793 program has appropriate privilege::
798 packets will be checked if the program has appropriate privilege.
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| /linux/tools/testing/selftests/powerpc/dscr/ |
| H A D | dscr_explicit_test.c | 7 * privilege state SPR and the problem state SPR for this purpose.
9 * When using the privilege state SPR, the instructions such as
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| H A D | dscr_user_test.c | 10 * When using the privilege state SPR, the instructions such as
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| /linux/Documentation/arch/powerpc/ |
| H A D | ultravisor.rst | 26 | Privilege States |
68 * The privilege of a process is now determined by three MSR bits,
70 from least privilege to highest privilege. The higher privilege
71 modes can access all the resources of the lower privilege modes.
76 | S | HV| PR|Privilege |
90 | S | HV| PR|Privilege |
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| /linux/Documentation/devicetree/bindings/interrupt-controller/ |
| H A D | sifive,plic-1.0.0.yaml | 17 A hart context is a privilege mode in a hardware execution thread. For example,
19 privilege modes per hart; machine mode and supervisor mode.
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| /linux/Documentation/ABI/testing/ |
| H A D | configfs-tsm-report | 83 different privilege levels, like SEV-SNP "VMPL", specify the
84 privilege level via this attribute. The minimum acceptable
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| /linux/security/ |
| H A D | commoncap.c | 39 * to get full privilege on a kernel without file capabilities
341 * Erase the privilege-enhancing security markings on an inode.
810 * @effective: Do we have effective root privilege?
995 /* Check for privilege-elevated exec. */ in cap_bprm_creds_from_file()
1109 * of its privilege. The call to setuid(!=0) would drop all privileges!
1312 * system from legacy UID=0 based privilege (when filesystem in cap_task_prctl()
1327 * capability-based-privilege environment. in cap_task_prctl()
1344 * Doing anything requires privilege (go read about the in cap_task_prctl()
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| /linux/arch/arm/kernel/ |
| H A D | hw_breakpoint.c | 570 /* Privilege */ in arch_build_bp_info()
571 hw->ctrl.privilege = ARM_BREAKPOINT_USER; in arch_build_bp_info()
573 hw->ctrl.privilege |= ARM_BREAKPOINT_PRIV; in arch_build_bp_info()
674 info->step_ctrl.privilege = info->ctrl.privilege; in enable_single_step()
724 return !user_mode(regs) && info->ctrl.privilege == ARM_BREAKPOINT_USER; in watchpoint_fault_on_uaccess()
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| /linux/Documentation/security/ |
| H A D | credentials.rst | 238 * UNIX exec privilege escalation bits (SUID/SGID);
239 * File capabilities exec privilege escalation bits.
243 privilege escalation bits come into play, and may allow the resulting process
545 To avoid "confused deputy" privilege escalation attacks, access control checks
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| /linux/Documentation/devicetree/bindings/arm/firmware/ |
| H A D | sdei.txt | 11 privilege level of the SDEI firmware (specified as part of the binding
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| /linux/arch/sparc/include/asm/ |
| H A D | psr.h | 7 * PSTATE.PRIV for the current CPU privilege level.
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| /linux/arch/arm/mach-imx/ |
| H A D | cpu.c | 50 * supervisor privilege level for access, allow for in imx_set_aips()
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| /linux/tools/perf/Documentation/ |
| H A D | perf-top.txt | 254 The privilege levels may be omitted, in which case, the privilege levels of the associated
255 event are applied to the branch filter. Both kernel (k) and hypervisor (hv) privilege
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| /linux/Documentation/driver-api/firmware/ |
| H A D | other_interfaces.rst | 24 Some features of the Intel Stratix10 SoC require a level of privilege
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