| /linux/Documentation/devicetree/bindings/powerpc/ |
| H A D | ibm,powerpc-cpu-features.txt | 13 enablement, privilege, and compatibility metadata.
94 - usable-privilege
104 This property describes the privilege levels and/or software components
118 This property describes the HV privilege support required to enable the
119 feature to lesser privilege levels. If the property does not exist then no
137 This property describes the OS privilege support required to enable the
138 feature to lesser privilege levels. If the property does not exist then no
179 This property may exist when the usable-privilege property value has PR bit set.
213 usable-privilege = <1 | 2 | 4>;
219 usable-privilege = <1 | 2>;
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| /linux/arch/powerpc/boot/dts/ |
| H A D | microwatt.dts | 46 usable-privilege = <6>;
52 usable-privilege = <7>;
59 usable-privilege = <6>;
65 usable-privilege = <7>;
70 usable-privilege = <2>;
78 usable-privilege = <7>;
87 usable-privilege = <7>;
96 usable-privilege = <7>;
104 usable-privilege = <7>;
109 usable-privilege = <7>;
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| /linux/arch/arm64/include/asm/ |
| H A D | hw_breakpoint.h | 17 privilege : 2, member
27 /* Privilege Levels */
35 u32 val = (ctrl.len << 5) | (ctrl.type << 3) | (ctrl.privilege << 1) | in encode_ctrl_reg()
38 if (is_kernel_in_hyp_mode() && ctrl.privilege == AARCH64_BREAKPOINT_EL1) in encode_ctrl_reg()
49 ctrl->privilege = reg & 0x3; in decode_ctrl_reg()
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| /linux/arch/arm64/kernel/ |
| H A D | hw_breakpoint.c | 139 * Convert a breakpoint privilege level to the corresponding exception
142 static enum dbg_active_el debug_exception_level(int privilege) in debug_exception_level() argument
144 switch (privilege) { in debug_exception_level()
150 pr_warn("invalid breakpoint privilege level %d\n", privilege); in debug_exception_level()
231 enum dbg_active_el dbg_el = debug_exception_level(info->ctrl.privilege); in hw_breakpoint_control()
491 * Privilege in arch_build_bp_info()
496 hw->ctrl.privilege = AARCH64_BREAKPOINT_EL1; in arch_build_bp_info()
498 hw->ctrl.privilege = AARCH64_BREAKPOINT_EL0; in arch_build_bp_info()
571 if (hw->ctrl.privilege == AARCH64_BREAKPOINT_EL1 && bp->hw.target) in hw_breakpoint_arch_parse()
584 int i, max_slots, privilege; in toggle_bp_registers() local
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| /linux/arch/arm/include/asm/ |
| H A D | hw_breakpoint.h | 17 privilege : 2,
31 (ctrl.privilege << 1) | ctrl.enabled; in encode_ctrl_reg()
39 ctrl->privilege = reg & 0x3; in decode_ctrl_reg()
68 /* Privilege Levels */
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| /linux/arch/sparc/include/uapi/asm/ |
| H A D | psr.h | 7 * PSTATE.PRIV for the current CPU privilege level.
24 #define PSR_PS 0x00000040 /* previous privilege level */
25 #define PSR_S 0x00000080 /* current privilege level */
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| H A D | psrcompat.h | 10 #define PSR_PS 0x00000040 /* previous privilege level */
11 #define PSR_S 0x00000080 /* current privilege level */
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| /linux/arch/x86/include/asm/ |
| H A D | segment.h | 31 * privilege level
36 * When running on Xen PV, the actual privilege level of the kernel is 1,
37 * not 0. Testing the Requested Privilege Level in a segment selector to
39 * SEGMENT_RPL_MASK is wrong because the PV kernel's privilege level
43 * kernels because privilege level 2 is never used.
47 /* User mode is privilege level 3: */
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| /linux/Documentation/gpu/nova/core/ |
| H A D | devinit.rst | 57 The initialization process involves careful privilege management. For example, before
58 accessing certain completion status registers, the driver must check privilege level
60 privilege level to allow CPU (LS/low-secure) access. This is the case, for example,
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| /linux/include/linux/ |
| H A D | tsm.h | 14 * Privilege level is a nested permission concept to allow confidential
21 * @privlevel: optional privilege level to associate with @outblob
61 * @TSM_REPORT_PRIVLEVEL: index of the desired privilege level attribute
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| /linux/Documentation/userspace-api/ |
| H A D | no_new_privs.rst | 26 promises not to grant the privilege to do anything that could not have
41 Note that ``no_new_privs`` does not prevent privilege changes that do not
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| /linux/Documentation/devicetree/bindings/bus/ |
| H A D | st,stm32mp25-rifsc.yaml | 21 any security domains (secure, privilege, compartment).
30 security domains (secure, privilege, compartment).
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| /linux/drivers/perf/ |
| H A D | Kconfig | 105 full perf feature support i.e. counter overflow, privilege mode
242 branch types and privilege based filtering. It captures additional
244 type, branch privilege level etc.
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| H A D | arm_brbe.c | 368 * BRBE supports the following privilege mode filters while generating
408 * captured, irrespective of the perf event's privilege. in branch_type_to_brbcr()
409 * If the perf event does not have enough privilege for in branch_type_to_brbcr()
592 pr_warn_once("%d - unknown branch privilege captured\n", brbe_el); in brbinf_get_perf_priv()
641 * Branch privilege level is available for target only and complete in perf_entry_from_brbe_regset()
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| /linux/tools/testing/selftests/powerpc/dscr/ |
| H A D | dscr_explicit_test.c | 7 * privilege state SPR and the problem state SPR for this purpose.
9 * When using the privilege state SPR, the instructions such as
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| /linux/Documentation/admin-guide/LSM/ |
| H A D | Smack.rst | 425 Privilege:
427 policy is said to have privilege. As of this writing a task can
428 have privilege either by possessing capabilities or by having an
619 only be changed by a process with privilege.
621 Privilege section in Smack Basics
789 privilege.
803 program has appropriate privilege::
808 packets will be checked if the program has appropriate privilege.
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| /linux/Documentation/devicetree/bindings/interrupt-controller/ |
| H A D | sifive,plic-1.0.0.yaml | 17 A hart context is a privilege mode in a hardware execution thread. For example,
19 privilege modes per hart; machine mode and supervisor mode.
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| /linux/Documentation/arch/powerpc/ |
| H A D | ultravisor.rst | 26 | Privilege States |
68 * The privilege of a process is now determined by three MSR bits,
70 from least privilege to highest privilege. The higher privilege
71 modes can access all the resources of the lower privilege modes.
76 | S | HV| PR|Privilege |
90 | S | HV| PR|Privilege |
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| /linux/Documentation/ABI/testing/ |
| H A D | configfs-tsm-report | 83 different privilege levels, like SEV-SNP "VMPL", specify the
84 privilege level via this attribute. The minimum acceptable
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| /linux/Documentation/filesystems/fuse/ |
| H A D | fuse-passthrough.rst | 49 Privilege Requirements
130 file descriptors, starting with a higher privilege requirement (like
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| /linux/include/linux/sched/ |
| H A D | coredump.h | 28 * that are using this for checking for privilege transitions, it must
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| /linux/Documentation/translations/zh_CN/security/ |
| H A D | credentials.rst | 202 * UNIX exec privilege escalation bits (SUID/SGID);
203 * File capabilities exec privilege escalation bits.
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| /linux/tools/perf/arch/x86/util/ |
| H A D | evsel.c | 176 return scnprintf(msg, size, "AMD IBS doesn't support privilege filtering. Try " in amd_evsel__open_strerror()
177 "again without the privilege modifiers (like 'k') at the end."); in amd_evsel__open_strerror()
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| /linux/Documentation/devicetree/bindings/arm/firmware/ |
| H A D | sdei.txt | 11 privilege level of the SDEI firmware (specified as part of the binding
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| /linux/tools/testing/selftests/tty/ |
| H A D | tty_tiocsti_test.c | 53 * 4. Result: Effective privilege escalation via file descriptor passing
336 /* Prevent privilege regain */ in drop_all_privs()
339 /* Verify privilege drop */ in drop_all_privs()
456 /* Handle privilege dropping */ in run_fdpass_tiocsti_test()
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