/linux/Documentation/devicetree/bindings/powerpc/ |
H A D | ibm,powerpc-cpu-features.txt | 13 enablement, privilege, and compatibility metadata. 94 - usable-privilege 104 This property describes the privilege levels and/or software components 118 This property describes the HV privilege support required to enable the 119 feature to lesser privilege levels. If the property does not exist then no 137 This property describes the OS privilege support required to enable the 138 feature to lesser privilege levels. If the property does not exist then no 179 This property may exist when the usable-privilege property value has PR bit set. 213 usable-privilege = <1 | 2 | 4>; 219 usable-privilege = <1 | 2>; [all …]
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/linux/arch/powerpc/boot/dts/ |
H A D | microwatt.dts | 44 usable-privilege = <2>; 49 usable-privilege = <3>; 55 usable-privilege = <2>; 60 usable-privilege = <3>; 65 usable-privilege = <2>; 71 usable-privilege = <3>;
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/linux/arch/arm64/include/asm/ |
H A D | hw_breakpoint.h | 17 privilege : 2, member 27 /* Privilege Levels */ 35 u32 val = (ctrl.len << 5) | (ctrl.type << 3) | (ctrl.privilege << 1) | in encode_ctrl_reg() 38 if (is_kernel_in_hyp_mode() && ctrl.privilege == AARCH64_BREAKPOINT_EL1) in encode_ctrl_reg() 49 ctrl->privilege = reg & 0x3; in decode_ctrl_reg()
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/linux/arch/arm64/kernel/ |
H A D | hw_breakpoint.c | 138 * Convert a breakpoint privilege level to the corresponding exception 141 static enum dbg_active_el debug_exception_level(int privilege) in debug_exception_level() argument 143 switch (privilege) { in debug_exception_level() 149 pr_warn("invalid breakpoint privilege level %d\n", privilege); in debug_exception_level() 230 enum dbg_active_el dbg_el = debug_exception_level(info->ctrl.privilege); in hw_breakpoint_control() 490 * Privilege in arch_build_bp_info() 495 hw->ctrl.privilege = AARCH64_BREAKPOINT_EL1; in arch_build_bp_info() 497 hw->ctrl.privilege = AARCH64_BREAKPOINT_EL0; in arch_build_bp_info() 570 if (hw->ctrl.privilege == AARCH64_BREAKPOINT_EL1 && bp->hw.target) in hw_breakpoint_arch_parse() 583 int i, max_slots, privilege; in toggle_bp_registers() local [all …]
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/linux/Documentation/devicetree/bindings/interrupt-controller/ |
H A D | riscv,imsics.yaml | 18 for each privilege level (machine or supervisor). The configuration of 22 which is same for given privilege level across CPUs (or HARTs). 25 for each privilege level (machine or supervisor) which collectively describe 26 IMSIC interrupt files at that privilege level across CPUs (or HARTs). 33 privilege level (machine or supervisor) encodes group index, HART index,
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H A D | sifive,plic-1.0.0.yaml | 17 A hart context is a privilege mode in a hardware execution thread. For example, 19 privilege modes per hart; machine mode and supervisor mode.
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/linux/arch/arm/include/asm/ |
H A D | hw_breakpoint.h | 17 privilege : 2, 31 (ctrl.privilege << 1) | ctrl.enabled; in encode_ctrl_reg() 39 ctrl->privilege = reg & 0x3; in decode_ctrl_reg() 68 /* Privilege Levels */
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/linux/arch/x86/include/asm/ |
H A D | segment.h | 31 * privilege level 36 * When running on Xen PV, the actual privilege level of the kernel is 1, 37 * not 0. Testing the Requested Privilege Level in a segment selector to 39 * SEGMENT_RPL_MASK is wrong because the PV kernel's privilege level 43 * kernels because privilege level 2 is never used. 47 /* User mode is privilege level 3: */
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/linux/arch/sparc/include/uapi/asm/ |
H A D | psr.h | 7 * PSTATE.PRIV for the current CPU privilege level. 24 #define PSR_PS 0x00000040 /* previous privilege level */ 25 #define PSR_S 0x00000080 /* current privilege level */
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H A D | psrcompat.h | 10 #define PSR_PS 0x00000040 /* previous privilege level */ 11 #define PSR_S 0x00000080 /* current privilege level */
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/linux/include/linux/ |
H A D | tsm.h | 13 * Privilege level is a nested permission concept to allow confidential 20 * @privlevel: optional privilege level to associate with @outblob 60 * @TSM_REPORT_PRIVLEVEL: index of the desired privilege level attribute
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/linux/Documentation/userspace-api/ |
H A D | no_new_privs.rst | 26 promises not to grant the privilege to do anything that could not have 41 Note that ``no_new_privs`` does not prevent privilege changes that do not
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/linux/Documentation/devicetree/bindings/bus/ |
H A D | st,stm32mp25-rifsc.yaml | 21 any security domains (secure, privilege, compartment). 30 security domains (secure, privilege, compartment).
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/linux/arch/loongarch/kernel/ |
H A D | hw_breakpoint.c | 177 u32 ctrl, privilege; in hw_breakpoint_control() local 184 privilege = CTRL_PLV0_ENABLE; in hw_breakpoint_control() 186 privilege = CTRL_PLV3_ENABLE; in hw_breakpoint_control() 214 write_wb_reg(CSR_CFG_CTRL, i, 0, privilege); in hw_breakpoint_control() 220 write_wb_reg(CSR_CFG_CTRL, i, 1, ctrl | privilege); in hw_breakpoint_control()
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/linux/tools/perf/arch/x86/util/ |
H A D | evsel.c | 118 return scnprintf(msg, size, "AMD IBS doesn't support privilege filtering. Try " in arch_evsel__open_strerror() 119 "again without the privilege modifiers (like 'k') at the end."); in arch_evsel__open_strerror()
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/linux/Documentation/admin-guide/LSM/ |
H A D | Smack.rst | 425 Privilege: 427 policy is said to have privilege. As of this writing a task can 428 have privilege either by possessing capabilities or by having an 614 only be changed by a process with privilege. 616 Privilege section in Smack Basics 779 privilege. 793 program has appropriate privilege:: 798 packets will be checked if the program has appropriate privilege.
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/linux/tools/perf/Documentation/ |
H A D | perf-arm-spe.txt | 149 pa_enable=1 - collect physical address (as well as VA) of loads/stores (PMSCR.PA) - requires privilege 150 pct_enable=1 - collect physical timestamp instead of virtual timestamp (PMSCR.PCT) - requires privilege 216 Root privilege is required to collect context packets. But these only increase the accuracy of
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/linux/Documentation/arch/x86/ |
H A D | amd-memory-encryption.rst | 135 SNP provides a feature called Virtual Machine Privilege Levels (VMPL) which 136 defines four privilege levels at which guest software can run. The most 139 Privilege Levels", docID: 24593.
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/linux/Documentation/arch/powerpc/ |
H A D | ultravisor.rst | 26 | Privilege States | 68 * The privilege of a process is now determined by three MSR bits, 70 from least privilege to highest privilege. The higher privilege 71 modes can access all the resources of the lower privilege modes. 76 | S | HV| PR|Privilege | 90 | S | HV| PR|Privilege |
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/linux/tools/testing/selftests/powerpc/dscr/ |
H A D | dscr_explicit_test.c | 7 * privilege state SPR and the problem state SPR for this purpose. 9 * When using the privilege state SPR, the instructions such as
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/linux/Documentation/ABI/testing/ |
H A D | configfs-tsm | 83 different privilege levels, like SEV-SNP "VMPL", specify the 84 privilege level via this attribute. The minimum acceptable
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/linux/arch/x86/include/asm/xen/ |
H A D | interface.h | 127 * The privilege level specifies which modes may enter a trap via a software 129 * privilege levels as follows: 143 uint8_t flags; /* 0-3: privilege level; 4: clear event enable? */
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/linux/security/ |
H A D | commoncap.c | 36 * to get full privilege on a kernel without file capabilities 312 * Erase the privilege-enhancing security markings on an inode. 781 * @effective: Do we have effective root privilege? 966 /* Check for privilege-elevated exec. */ in cap_bprm_creds_from_file() 1080 * of its privilege. The call to setuid(!=0) would drop all privileges! 1283 * system from legacy UID=0 based privilege (when filesystem in cap_task_prctl() 1298 * capability-based-privilege environment. in cap_task_prctl() 1313 * [4] doing anything requires privilege (go read about in cap_task_prctl()
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/linux/arch/arm/kernel/ |
H A D | hw_breakpoint.c | 570 /* Privilege */ in arch_build_bp_info() 571 hw->ctrl.privilege = ARM_BREAKPOINT_USER; in arch_build_bp_info() 573 hw->ctrl.privilege |= ARM_BREAKPOINT_PRIV; in arch_build_bp_info() 674 info->step_ctrl.privilege = info->ctrl.privilege; in enable_single_step() 724 return !user_mode(regs) && info->ctrl.privilege == ARM_BREAKPOINT_USER; in watchpoint_fault_on_uaccess()
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/linux/Documentation/security/ |
H A D | credentials.rst | 238 * UNIX exec privilege escalation bits (SUID/SGID); 239 * File capabilities exec privilege escalation bits. 243 privilege escalation bits come into play, and may allow the resulting process 550 To avoid "confused deputy" privilege escalation attacks, access control checks
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