Searched full:prioritized (Results 1 – 25 of 29) sorted by relevance
12
13 The core interrupt controller provides 32 prioritized interrupts (2 levels)
100 ``prioritized`` - loopback traffic is prioritized on this port103 ``prioritized`` provides ability to adjust loopback traffic rate to increase106 on the ``prioritized`` port.
21 allows latency-sensitive tasks with shorter time slices to be prioritized,
5 # prioritized according to the default priority specified at the port.
5 # tag and are prioritized according to the map at $swp1. They egress $swp2 and
5 # of 1. This stream is consistently prioritized as priority 1, is put to PG
103 * be prioritized over any exposed GPU-driven raw device(s). in nvidia_wmi_ec_backlight_probe()
248 * prioritized. The lowest buffer number wins. in c_can_get_tx_free()
82 * gets prioritized. The driver of the last device specified on in sh_early_platform_driver_register()
32 * prioritized over user threads, which is required for ensuring forward
43 * to the two pass nature of it where extent discarding is prioritized over
162 The driver has support for multiple prioritized Tx traffic classes. Priorities
1466 #define DEVLINK_LOCAL_FWD_PRIORITIZED_STR "prioritized"1566 * "prioritized" - local_fwd traffic is prioritized in scheduling.
348 * pick up the least prioritized 'n'. in sym_calc_choice()630 * given the least prioritized 'n'. This works well when the in choice_set_value()
105 * data) into one of up to 7 prioritized Tx DMA FIFO channels within the
252 * data) into one of up to 7 prioritized Tx DMA FIFO channels within the
825 * This command sets up timings for each of the 4 prioritized EDCA Tx FIFOs1252 * Driver must place each C_TX command into one of the prioritized Tx1799 /* # of EDCA prioritized tx fifos */
284 * every new mask gets a fair chance of being prioritized. in tbl_mask_array_add_mask()
535 rarely accessed (colder) memory regions would be prioritized for page-out
709 * This command sets up timings for each of the 4 prioritized EDCA Tx FIFOs1074 * Driver must place each REPLY_TX command into one of the prioritized Tx1460 /* # of EDCA prioritized tx fifos */
1566 pci_warn(pdev, "Device-specific reset disabled/de-prioritized by user"); in reset_method_store()
1399 /* CAN_ISOTP_SF_BROADCAST is prioritized */ in isotp_setsockopt_locked()
837 * later interrupts could be prioritized by the GIC.
326 * structures in prioritized order as defined by the call to the
1349 * prioritized according to severity and only the most severe