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Searched full:prescaler (Results 1 – 25 of 138) sorted by relevance

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/linux/drivers/pwm/
H A Dpwm-sl28cpld.c10 * With the prescaler setting you can select which bit of the counter is used
16 * | prescaler | reset | counter bits | frequency | period length |
25 * - The hardware cannot generate a 100% duty cycle if the prescaler is 0.
26 * - The hardware cannot atomically set the prescaler and the counter value,
28 * - The counter is not reset if you switch the prescaler which leads
55 #define SL28CPLD_PWM_MAX_DUTY_CYCLE(prescaler) (1 << (7 - (prescaler))) argument
56 #define SL28CPLD_PWM_PERIOD(prescaler) \ argument
57 (NSEC_PER_SEC / SL28CPLD_PWM_CLK * SL28CPLD_PWM_MAX_DUTY_CYCLE(prescaler))
64 * max_period_ns = 1 << (7 - prescaler) / SL28CPLD_PWM_CLK * NSEC_PER_SEC
65 * max_duty_cycle = 1 << (7 - prescaler)
[all …]
H A Dpwm-sun4i.c114 unsigned int prescaler; in sun4i_pwm_get_state() local
138 prescaler = 1; in sun4i_pwm_get_state()
140 prescaler = prescaler_table[PWM_REG_PRESCAL(val, pwm->hwpwm)]; in sun4i_pwm_get_state()
142 if (prescaler == 0) in sun4i_pwm_get_state()
158 tmp = (u64)prescaler * NSEC_PER_SEC * PWM_REG_DTY(val); in sun4i_pwm_get_state()
161 tmp = (u64)prescaler * NSEC_PER_SEC * PWM_REG_PRD(val); in sun4i_pwm_get_state()
173 unsigned int prescaler = 0; in sun4i_pwm_calculate() local
188 /* First, test without any prescaler when available */ in sun4i_pwm_calculate()
189 prescaler = PWM_PRESCAL_MASK; in sun4i_pwm_calculate()
191 * When not using any prescaler, the clock period in nanoseconds in sun4i_pwm_calculate()
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H A Dpwm-renesas-tpu.c75 unsigned int prescaler; member
172 * - Set prescaler in tpu_pwm_timer_start()
178 tpd->prescaler); in tpu_pwm_timer_start()
225 tpd->prescaler = 0; in tpu_pwm_request()
247 unsigned int prescaler; in tpu_pwm_config() local
268 * Find the minimal prescaler in [0..3] such that in tpu_pwm_config()
270 * period >> (2 * prescaler) < 0x10000 in tpu_pwm_config()
274 * prescaler = max(ilog2(period) / 2, 7) - 7; in tpu_pwm_config()
281 prescaler = 0; in tpu_pwm_config()
285 prescaler = 1; in tpu_pwm_config()
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H A Dpwm-rockchip.c50 unsigned int prescaler; member
66 u64 prescaled_ns = (u64)pc->data->prescaler * NSEC_PER_SEC; in rockchip_pwm_get_state()
109 u64 prescaled_ns = (u64)pc->data->prescaler * NSEC_PER_SEC; in rockchip_pwm_config()
119 * default prescaler value for all practical clock rate values. in rockchip_pwm_config()
246 .prescaler = 2,
259 .prescaler = 1,
273 .prescaler = 1,
287 .prescaler = 1,
H A Dpwm-stm32-lp.c31 /* STM32 Low-Power Timer is preceded by a configurable power-of-2 prescaler */
40 /* Only one PWM on this LPTIMER: enable, prescaler and reload value can be changed */ in stm32_pwm_lp_update_allowed()
49 /* More than one channel enabled: enable, prescaler or ARR value can't be changed */ in stm32_pwm_lp_update_allowed()
55 * report if enable, prescaler or ARR value can be changed. in stm32_pwm_lp_update_allowed()
165 /* Calculate the period and prescaler value */ in stm32_pwm_lp_apply()
178 dev_err(pwmchip_parent(chip), "max prescaler exceeded\n"); in stm32_pwm_lp_apply()
194 * When there are several channels, they share the same prescaler and reload value. in stm32_pwm_lp_apply()
H A Dpwm-stm32.c123 * First we need to find the minimal value for prescaler such that in stm32_pwm_round_waveform_tohw()
127 * NSEC_PER_SEC * (prescaler + 1) in stm32_pwm_round_waveform_tohw()
132 * ---------------------------- < prescaler + 1 in stm32_pwm_round_waveform_tohw()
138 * (period_ns * clkrate) // (NSEC_PER_SEC * (max_arr + 1)) ≤ prescaler in stm32_pwm_round_waveform_tohw()
562 /* prescaler: fit timeout window provided by upper layer */ in stm32_pwm_capture()
596 * - decrease counter clock prescaler, scale up to max rate. in stm32_pwm_capture()
597 * - use input prescaler, capture once every /2 /4 or /8 edges. in stm32_pwm_capture()
622 /* input prescaler: also keep arbitrary margin */ in stm32_pwm_capture()
632 /* Last chance to improve period accuracy, using input prescaler */ in stm32_pwm_capture()
645 * We may fall here using input prescaler, when input in stm32_pwm_capture()
/linux/drivers/clocksource/
H A Dtimer-stm32.c200 * stm32_timer_set_prescaler - Compute and set the prescaler register
203 * Depending on the timer width, compute the prescaler to always
205 * considered precise and long enough to not use the prescaler.
209 int prescaler = 1; in stm32_timer_set_prescaler() local
212 prescaler = DIV_ROUND_CLOSEST(timer_of_rate(to), in stm32_timer_set_prescaler()
215 * The prescaler register is an u16, the variable in stm32_timer_set_prescaler()
219 prescaler = prescaler < TIM_PSC_MAX ? prescaler : TIM_PSC_MAX; in stm32_timer_set_prescaler()
222 writel_relaxed(prescaler - 1, timer_of_base(to) + TIM_PSC); in stm32_timer_set_prescaler()
226 /* Adjust rate and period given the prescaler value */ in stm32_timer_set_prescaler()
227 to->of_clk.rate = DIV_ROUND_CLOSEST(to->of_clk.rate, prescaler); in stm32_timer_set_prescaler()
H A Darm_global_timer.c48 * Note: it is assumed we are using a prescaler value of zero, so this is
271 /* set prescaler and enable timer on all the cores */ in gt_clocksource_init()
298 /* prescaler within legal range? */ in gt_clk_rate_change_cb()
342 unsigned long prescaler; member
348 * OPPs, so the initial prescaler has to be compatible with all OPPs
350 * gives us a GCD of 10. Initial frequency is 1000, so the prescaler is
353 { .compatible = "ti,am43", .prescaler = 50 },
354 { .compatible = "xlnx,zynq-7000", .prescaler = 2 },
367 return config->prescaler; in gt_get_initial_prescaler_value()
H A Dtimer-microchip-pit64b.c250 /* Use the biggest prescaler if we didn't match one. */ in mchp_pit64b_pres_compute()
257 * runtime; this includes prescaler and SGCLK bit
267 * PMC and then using the internal PIT64B prescaler, if any, to reach the
270 * choosing the highest prescaler in case it doesn't locate one to match the
339 pr_info("PIT64B: using clk=%s with prescaler %u, freq=%lu [Hz]\n", in mchp_pit64b_init_mode()
462 /* Initialize mode (prescaler + SGCK bit). To be used at runtime. */ in mchp_pit64b_dt_init_timer()
/linux/drivers/tty/serial/8250/
H A D8250_ni.c72 u8 prescaler; member
160 u8 prescaler) in ni16550_config_prescaler() argument
180 /* Set prescaler to CPR register. */ in ni16550_config_prescaler()
182 serial_out(up, UART_ICR, prescaler); in ni16550_config_prescaler()
283 unsigned int prescaler; in ni16550_probe() local
347 prescaler = info->prescaler; in ni16550_probe()
348 device_property_read_u32(dev, "clock-prescaler", &prescaler); in ni16550_probe()
349 if (prescaler) { in ni16550_probe()
351 ni16550_config_prescaler(uart, (u8)prescaler); in ni16550_probe()
418 .prescaler = 0x09,
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/linux/drivers/watchdog/
H A Dcadence_wdt.c34 /* Clock prescaler value and selection */
67 * @prescaler: for saving prescaler value
68 * @ctrl_clksel: counter clock prescaler selection
78 u32 prescaler; member
163 * calculated count = (timeout * clock) / prescaler + 1.
166 * Clears the contents of prescaler and counter reset value. Sets the
167 * prescaler to 4096 and the calculated count and access key
186 count = (wdd->timeout * (clock_f / wdt->prescaler)) / in cdns_wdt_start()
338 wdt->prescaler = CDNS_WDT_PRESCALE_512; in cdns_wdt_probe()
341 wdt->prescaler = CDNS_WDT_PRESCALE_4096; in cdns_wdt_probe()
H A Dmpc8xxx_wdt.c44 int prescaler; member
188 ddata->swtc = min(ddata->wdd.timeout * freq / wdt_type->prescaler, in mpc8xxx_wdt_probe()
199 ddata->wdd.max_hw_heartbeat_ms = (ddata->swtc * wdt_type->prescaler) / in mpc8xxx_wdt_probe()
221 .prescaler = 0x10000,
228 .prescaler = 0x10000,
236 .prescaler = 0x800,
H A Dmt7621_wdt.c82 /* set the prescaler to 1ms == 1000us */ in mt7621_wdt_start()
182 * the prescaler of this driver here into account (the in mt7621_wdt_probe()
183 * boot loader might be using a different prescaler). in mt7621_wdt_probe()
186 * we first disable the watchdog, set the new prescaler in mt7621_wdt_probe()
H A Dkempld_wdt.c133 u32 prescaler; in kempld_wdt_set_stage_timeout() local
139 prescaler = kempld_prescaler[PRESCALER_21]; in kempld_wdt_set_stage_timeout()
145 remainder = do_div(stage_timeout64, prescaler); in kempld_wdt_set_stage_timeout()
175 u32 prescaler; in kempld_wdt_get_timeout() local
184 prescaler = kempld_prescaler[STAGE_CFG_GET_PRESCALER(stage_cfg)]; in kempld_wdt_get_timeout()
186 stage_timeout = (stage_timeout & stage->mask) * prescaler; in kempld_wdt_get_timeout()
H A Dstm32_iwdg.c28 #define IWDG_PR 0x04 /* Prescaler Register */
49 #define SR_PVU BIT(0) /* Watchdog prescaler value update */
115 /* The prescaler is align on power of 2 and start at 2 ^ PR_SHIFT. */ in stm32_iwdg_start()
124 /* set prescaler & reload registers */ in stm32_iwdg_start()
136 dev_err(wdd->parent, "Fail to set prescaler, reload regs\n"); in stm32_iwdg_start()
/linux/Documentation/misc-devices/
H A Doxsemi-tornado.rst11 frequency by dividing it by the clock prescaler, which can be set to any
19 By default the oversampling rate is set to 16 and the clock prescaler is
27 prescaler is programmed with the CPR/CPR2 register pair [OX200]_ [OX952]_
29 the prescaler the enhanced mode has to be explicitly enabled though, by
31 the prescaler or otherwise it is bypassed as if the value of 1 was used.
34 devices that do not have the extra prescaler's 9th bit in CPR2, so the
45 (tcr), the clock prescaler (cpr) and the divisor (div) produced by the
93 used by encoding the values for, the prescaler, the oversampling rate
109 oversampling rate to 16 and prescaler values below 1 in CPR2/CPR are
113 respectively to 0x1f4, 0x0 and 0x04e2, choosing the prescaler value,
/linux/drivers/rtc/
H A Drtc-mpfs.c219 unsigned long prescaler; in mpfs_rtc_probe() local
259 /* prescaler hardware adds 1 to reg value */ in mpfs_rtc_probe()
260 prescaler = clk_get_rate(devm_clk_get(&pdev->dev, "rtcref")) - 1; in mpfs_rtc_probe()
261 if (prescaler > MAX_PRESCALER_COUNT) { in mpfs_rtc_probe()
262 dev_dbg(&pdev->dev, "invalid prescaler %lu\n", prescaler); in mpfs_rtc_probe()
266 writel(prescaler, rtcdev->base + PRESCALER_REG); in mpfs_rtc_probe()
267 dev_info(&pdev->dev, "prescaler set to: %lu\n", prescaler); in mpfs_rtc_probe()
/linux/Documentation/devicetree/bindings/power/supply/
H A Dlltc,ltc294x.yaml39 lltc,prescaler-exponent:
42 The prescaler exponent as explained in the datasheet.
51 - lltc,prescaler-exponent
64 lltc,prescaler-exponent = <5>; /* 2^(2*5) = 1024 */
/linux/arch/powerpc/sysdev/
H A Dfsl_gtm.c170 unsigned int prescaler; in gtm_set_ref_timer16() local
177 /* CPM2 doesn't have primary prescaler */ in gtm_set_ref_timer16()
181 prescaler = gtm->clock / frequency; in gtm_set_ref_timer16()
187 if (prescaler > max_prescaler) in gtm_set_ref_timer16()
190 if (prescaler > max_prescaler / 16) { in gtm_set_ref_timer16()
192 prescaler /= 16; in gtm_set_ref_timer16()
195 if (prescaler <= 256) { in gtm_set_ref_timer16()
197 sps = prescaler - 1; in gtm_set_ref_timer16()
200 sps = prescaler / 256 - 1; in gtm_set_ref_timer16()
366 /* CPM2 doesn't have primary prescaler */ in gtm_set_shortcuts()
/linux/Documentation/devicetree/bindings/pwm/
H A Dti,omap-dmtimer-pwm.yaml29 ti,prescaler:
31 Legacy clock prescaler for timer. The timer counter is prescaled
32 with 2^n where n is the prescaler.
/linux/drivers/i2c/busses/
H A Di2c-mpc.c390 * According to the AN2919 all MPC824x have prescaler 1, while MPC83xx in mpc_i2c_get_prescaler_8xxx()
391 * may have prescaler 1, 2, or 3, depending on the power-on in mpc_i2c_get_prescaler_8xxx()
394 u32 prescaler = 1; in mpc_i2c_get_prescaler_8xxx() local
408 /* the above 85xx SoCs have prescaler 1 */ in mpc_i2c_get_prescaler_8xxx()
409 prescaler = 1; in mpc_i2c_get_prescaler_8xxx()
412 /* the above 85xx SoCs have prescaler 3 or 2 */ in mpc_i2c_get_prescaler_8xxx()
413 prescaler = mpc_i2c_get_sec_cfg_8xxx() ? 3 : 2; in mpc_i2c_get_prescaler_8xxx()
415 /* all the other 85xx have prescaler 2 */ in mpc_i2c_get_prescaler_8xxx()
416 prescaler = 2; in mpc_i2c_get_prescaler_8xxx()
419 return prescaler; in mpc_i2c_get_prescaler_8xxx()
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/linux/drivers/hwmon/
H A Dmax6650.c38 /* prescaler: Possible values are 1, 2, 4, 8, 16 or 0 for don't change */
39 static int prescaler; variable
44 module_param(prescaler, int, 0444);
233 * 2) The prescaler (low three bits of the config register) has already
234 * been set to an appropriate value. Use the prescaler module parameter
252 * KSCALE is the prescaler value (1, 2, 4, 8, or 16)
375 prescale = prescaler; in max6650_init_client()
419 dev_err(dev, "illegal value for prescaler (%d)\n", prescale); in max6650_init_client()
422 dev_info(dev, "Fan voltage: %dV, prescaler: %d.\n", in max6650_init_client()
/linux/drivers/usb/serial/
H A Dkeyspan.c49 u8 *prescaler, int portnum);
53 u8 *prescaler, int portnum);
57 u8 *prescaler, int portnum);
61 u8 *prescaler, int portnum);
176 u8 *rate_hi, u8 *rate_low, u8 *prescaler,
1841 /* usa19 function doesn't require prescaler */
1844 u8 *rate_low, u8 *prescaler, int portnum) in keyspan_usa19_calc_baud() argument
1882 /* usa19hs function doesn't require prescaler */
1885 u8 *rate_low, u8 *prescaler, int portnum) in keyspan_usa19hs_calc_baud() argument
1921 u8 *rate_low, u8 *prescaler, int portnum) in keyspan_usa19w_calc_baud() argument
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/linux/arch/arm/mach-omap2/
H A Dvc.c467 * Calculates voltage ramp prescaler + counter values for a voltage
470 * bits[8:9] prescaler ... bits[0:5] counter. See OMAP4 TRM for reference.
474 u32 prescaler; in omap4_calc_volt_ramp() local
483 prescaler = 0; in omap4_calc_volt_ramp()
485 /* shift to next prescaler until no overflow */ in omap4_calc_volt_ramp()
490 prescaler++; in omap4_calc_volt_ramp()
496 prescaler++; in omap4_calc_volt_ramp()
502 prescaler++; in omap4_calc_volt_ramp()
514 return (prescaler << OMAP4430_RAMP_UP_PRESCAL_SHIFT) | in omap4_calc_volt_ramp()
/linux/drivers/iio/trigger/
H A Dstm32-timer-trigger.c126 int prescaler = 0, ret; in stm32_timer_start() local
129 /* Period and prescaler values depends of clock rate */ in stm32_timer_start()
137 * Increase prescaler value until we get a result that fit in stm32_timer_start()
141 prescaler++; in stm32_timer_start()
143 do_div(div, (prescaler + 1)); in stm32_timer_start()
147 if (prescaler > MAX_TIM_PSC) { in stm32_timer_start()
148 dev_err(priv->dev, "prescaler exceeds the maximum value\n"); in stm32_timer_start()
165 regmap_write(priv->regmap, TIM_PSC, prescaler); in stm32_timer_start()

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