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/linux/Documentation/devicetree/bindings/mtd/
H A Dti,gpmc-nand.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mtd/ti,gpmc-nand.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Tony Lindgren <tony@atomide.com>
11 - Roger Quadros <rogerq@kernel.org>
20 - enum:
21 - ti,am64-nand
22 - ti,omap2-nand
29 - description: Interrupt for fifoevent
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/linux/tools/perf/pmu-events/arch/nds32/n13/
H A Datcpmu.json15 "PublicDescription": "Prefetch Instruction",
18 "BriefDescription": "V3 Prefetch Instruction"
27 "PublicDescription": "JR(non-RET) instructions",
30 "BriefDescription": "V3 JR(non-RET) instructions"
123 "PublicDescription": "DMA BIU CYCLES",
126 "BriefDescription": "V3 DMA BIU CYCLES"
165 "PublicDescription": "Prefetch Instructions with cache hit",
168 "BriefDescription": "V3 Prefetch Instructions with cache hit"
201 "PublicDescription": "ld-after-st conflict replays",
204 "BriefDescription": "V3 ld-after-st conflict replays"
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/linux/drivers/net/ethernet/sfc/
H A Dtx_tso.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Copyright 2005-2006 Fen Systems Ltd.
5 * Copyright 2005-2015 Solarflare Communications Inc.
34 #define PTR_DIFF(p1, p2) ((u8 *)(p1) - (u8 *)(p2))
37 * struct tso_state - TSO state for an SKB
42 * @dma_addr: DMA address of current position
45 * @unmap_addr: DMA address of SKB fragment
51 * @header_dma_addr: Header DMA address
52 * @header_unmap_len: Header DMA mapped length
84 ptr = (char *) (tx_queue->buffer + insert_ptr); in prefetch_ptr()
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/linux/arch/arm/boot/dts/axis/
H A Dartpec6.dtsi2 * Device Tree Source for the Axis ARTPEC-6 SoC
4 * This file is dual-licensed: you can use it either under the terms
43 #include <dt-bindings/interrupt-controller/arm-gic.h>
44 #include <dt-bindings/dma/nbpfaxi.h>
45 #include <dt-bindings/clock/axis,artpec6-clkctrl.h>
48 #address-cells = <1>;
49 #size-cells = <1>;
51 interrupt-parent = <&intc>;
54 #address-cells = <1>;
55 #size-cells = <0>;
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/linux/drivers/comedi/drivers/
H A Dplx9080.h1 /* SPDX-License-Identifier: GPL-2.0+ */
26 * struct plx_dma_desc - DMA descriptor format for PLX PCI 9080
32 * Describes the format of a scatter-gather DMA descriptor for the PLX
33 * PCI 9080. All members are raw, little-endian register values that
34 * will be transferred by the DMA engine from local or PCI memory into
35 * corresponding registers for the DMA channel.
37 * The DMA descriptors must be aligned on a 16-byte boundary. Bits 3:0
82 /* DMA Arbitration Register (alias of MARBR). */
99 /* DMA Channel Priority */
101 #define PLX_MARBR_PRIO_DMA0 (BIT(19) * 1) /* DMA channel 0 has priority */
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/linux/drivers/net/ethernet/intel/igbvf/
H A Digbvf.h1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright(c) 2009 - 2018 Intel Corporation. */
52 * PTHRESH - MAC will consider prefetch if it has fewer than this number of
54 * Setting this to 0 disables RX descriptor prefetch.
55 * HTHRESH - MAC will only prefetch if there are at least this many descriptors
58 * WTHRESH - RX descriptor writeback threshold - MAC will delay writing back
79 #define IGBVF_MNG_VLAN_NONE (-1)
84 #define PS_PAGE_BUFFERS (MAX_PS_BUFFERS - 1)
97 * so a DMA handle can be stored along with the buffer
100 dma_addr_t dma; member
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/linux/Documentation/devicetree/bindings/memory-controllers/
H A Dti,gpmc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/ti,gpmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Tony Lindgren <tony@atomide.com>
11 - Roger Quadros <rogerq@kernel.org>
16 - Asynchronous SRAM-like memories and ASICs
17 - Asynchronous, synchronous, and page mode burst NOR flash
18 - NAND flash
19 - Pseudo-SRAM devices
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/linux/drivers/net/ethernet/pasemi/
H A Dpasemi_mac.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2006-2007 PA Semi, Inc
18 #include <asm/dma-mapping.h>
24 #include <linux/prefetch.h>
35 * unaligned DMA, so make sure the data is aligned instead.
41 * - Multicast support
42 * - Large MTU support
43 * - Multiqueue RX/TX
64 static int debug = -1; /* -1 == use DEFAULT_MSG_ENABLE as value */
86 return pasemi_read_mac_reg(mac->dma_if, reg); in read_mac_reg()
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/linux/drivers/gpu/drm/xe/
H A Dxe_vm_types.h1 /* SPDX-License-Identifier: MIT */
13 #include <linux/dma-resv.h>
57 * struct xe_vma_mem_attr - memory attributes associated with vma
73 * @preferred_loc.dpagemap: Reference-counted pointer to the drm_pagemap preferred
74 * for migration on a SVM page-fault. The pointer is protected by the
103 * Per-VMA purgeable state from madvise. Valid states are WILLNEED (0)
107 * Protected by BO dma-res
518 struct xe_vma_op_prefetch prefetch; global() member
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/linux/arch/arm/mm/
H A Dcache-fa.S1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * linux/arch/arm/mm/cache-fa.S
6 * Copyright (C) 2008-2009 Paulius Zaleckas <paulius.zaleckas@teltonika.lt>
8 * Based on cache-v4wb.S:
9 * Copyright (C) 1997-2002 Russell king
19 #include "proc-macros.S"
71 mcrne p15, 0, ip, c7, c5, 4 @ prefetch flush
81 * - start - start address (inclusive, page aligned)
82 * - end - end address (exclusive, page aligned)
83 * - flags - vma_area_struct flags describing address space
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H A Dproc-xsc3.S1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * linux/arch/arm/mm/proc-xsc3.S
15 * - ARMv6 Supersections
16 * - Low Locality Reference pages (replaces mini-cache)
17 * - 36-bit addressing
18 * - L2 cache
19 * - Cache coherency if chipset supports it
30 #include <asm/pgtable-hwdef.h>
33 #include "proc-macros.S"
178 mcrne p15, 0, ip, c7, c5, 4 @ prefetch flush
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/linux/drivers/gpu/drm/etnaviv/
H A Detnaviv_iommu_v2.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2016-2018 Etnaviv Project
7 #include <linux/dma-mapping.h>
52 drm_mm_takedown(&context->mm); in etnaviv_iommuv2_free()
55 if (v2_context->stlb_cpu[i]) in etnaviv_iommuv2_free()
56 dma_free_wc(context->global->dev, SZ_4K, in etnaviv_iommuv2_free()
57 v2_context->stlb_cpu[i], in etnaviv_iommuv2_free()
58 v2_context->stlb_dma[i]); in etnaviv_iommuv2_free()
61 dma_free_wc(context->global->dev, SZ_4K, v2_context->mtlb_cpu, in etnaviv_iommuv2_free()
62 v2_context->mtlb_dma); in etnaviv_iommuv2_free()
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/linux/arch/arc/mm/
H A Ddma.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
6 #include <linux/dma-map-ops.h>
11 * ARCH specific callbacks for generic noncoherent DMA op
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/linux/drivers/net/ethernet/huawei/hinic/
H A Dhinic_rx.c1 // SPDX-License-Identifier: GPL-2.0-only
18 #include <linux/dma-mapping.h>
19 #include <linux/prefetch.h>
46 (HINIC_GET_RX_PKT_TYPE(be32_to_cpu((cqe)->offload_type)) == \
50 * hinic_rxq_clean_stats - Clean the statistics of specific queue
55 struct hinic_rxq_stats *rxq_stats = &rxq->rxq_stats; in hinic_rxq_clean_stats()
57 u64_stats_update_begin(&rxq_stats->syncp); in hinic_rxq_clean_stats()
58 rxq_stats->pkts = 0; in hinic_rxq_clean_stats()
59 rxq_stats->bytes = 0; in hinic_rxq_clean_stats()
60 rxq_stats->errors = 0; in hinic_rxq_clean_stats()
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/linux/arch/riscv/mm/
H A Ddma-noncoherent.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * RISC-V specific functions to support DMA for non-coherent devices
8 #include <linux/dma-direct.h>
9 #include <linux/dma
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/linux/drivers/block/mtip32xx/
H A Dmtip32xx.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * mtip32xx.h - Header file for the P320 SSD Block Driver
67 * NOTE: This is the driver maximum; check dd->slot_groups for actual value.
95 * Per-tag bitfield size in longs.
104 (U32_PER_LONG-1))/U32_PER_LONG)
181 mtip_workq_sdbfx(w->port, group, w->completed); \
188 * - 27h Register FIS, host to device.
189 * - 34h Register FIS, device to host.
190 * - 39h DMA Activate FIS, device to host.
191 * - 41h DMA Setup FIS, bi-directional.
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/linux/drivers/net/ethernet/sfc/siena/
H A Drx.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Copyright 2005-2006 Fen Systems Ltd.
5 * Copyright 2005-2013 Solarflare Communications Inc.
15 #include <linux/prefetch.h>
47 struct efx_nic *efx = rx_queue->efx; in efx_rx_packet__check_len()
48 unsigned max_len = rx_buf->len - efx->type->rx_buffer_padding; in efx_rx_packet__check_len()
56 rx_buf->flags |= EFX_RX_PKT_DISCARD; in efx_rx_packet__check_len()
59 netif_err(efx, rx_err, efx->net_dev, in efx_rx_packet__check_len()
63 efx_rx_queue_channel(rx_queue)->n_rx_overlength++; in efx_rx_packet__check_len()
72 struct efx_nic *efx = channel->efx; in efx_rx_mk_skb()
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/linux/drivers/ata/
H A Dpata_pdc2027x.c1 // SPDX-License-Identifier: GPL-2.0-or-later
8 * Copyright (C) 1998-2002 Andre Hedrick <andre@linux-ide.org>
15 * as Documentation/driver-api/libata.rst
78 { 0x27, 0x0d, 0x35 }, /* PIO mode 3, IORDY on, Prefetch off */
79 { 0x23, 0x09, 0x25 }, /* PIO mode 4, IORDY on, Prefetch of
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H A Dpata_sch.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * pata_sch.c - Intel SCH PATA controllers
10 * Intel SCH (AF82US15W, AF82US15L, AF82UL11L) chipsets -- see spec at:
32 MDM = (0x03 << 8), /* Multi-word DMA Mode Bit Mask */
33 UDM = (0x07 << 16), /* Ultra DMA Mod
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/linux/drivers/parisc/
H A Diommu-helpers.h1 /* SPDX-License-Identifier: GPL-2.0 */
2 #include <linux/prefetch.h>
5 * iommu_fill_pdir - Insert coalesced scatter/gather chunks into the I/O Pdir.
9 * @hint: The DMA Hint.
20 struct scatterlist *dma_sg = startsg; /* pointer to current DMA */ in iommu_fill_pdir()
28 dma_sg--; in iommu_fill_pdir()
30 while (nents-- > 0) { in iommu_fill_pdir()
36 sg_virt(startsg), startsg->length in iommu_fill_pdir()
41 ** Look for the start of a new DMA stream in iommu_fill_pdir()
57 sg_dma_address(dma_sg) = pide | ioc->ibase; in iommu_fill_pdir()
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/linux/tools/perf/pmu-events/arch/x86/amdzen4/
H A Drecommended.json4 "BriefDescription": "Execution-time branch misprediction ratio (non-speculative).",
23 "BriefDescription": "L2 cache accesses from L1 instruction cache misses (including prefetch).",
29 "BriefDescription": "L2 cache accesses from L1 data cache misses (including prefetch).",
216 "BriefDescription": "Macro-ops dispatched.",
227 "BriefDescription": "Macro-ops retired.",
236 "ScaleUnit": "6.103515625e-5MiB"
244 "ScaleUnit": "6.103515625e-5MiB"
252 "ScaleUnit": "6.103515625e-5MiB"
260 "ScaleUnit": "6.103515625e-5MiB"
264 "BriefDescription": "Local socket upstream DMA read data.",
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/linux/drivers/net/ethernet/intel/fm10k/
H A Dfm10k_main.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2013 - 2019 Intel Corporation. */
10 #include <linux/prefetch.h>
18 "Copyright(c) 2013 - 2019 Intel Corporation.";
27 * fm10k_init_module - Driver Registration Routine
43 return -ENOMEM; in fm10k_init_module()
58 * fm10k_exit_module - Driver Exit Cleanup Routine
77 struct page *page = bi->page; in fm10k_alloc_mapped_page()
78 dma_addr_t dma; in fm10k_alloc_mapped_page() local
87 rx_ring->rx_stats.alloc_failed++; in fm10k_alloc_mapped_page()
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/linux/drivers/dma/dw-edma/
H A Ddw-hdma-v0-debugfs.c1 // SPDX-License-Identifier: GPL-2.0
12 #include "dw-hdma-v0-debugfs.h"
13 #include "dw-hdma-v0-regs.h"
14 #include "dw-edma-core.h"
18 struct dw_hdma_v0_regs __iomem *__regs = (dw)->chip->reg_base; \
20 (void __iomem *)&__regs->name; \
32 (void __iomem *)&__ch_regs->name; \
51 void __iomem *reg = entry->reg; in dw_hdma_debugfs_u32_get()
66 entries = devm_kcalloc(dw->chip->dev, nr_entries, sizeof(*entries), in dw_hdma_debugfs_create_x32()
85 CTX_REGISTER(dw, prefetch, dir, ch), in dw_hdma_debugfs_regs_ch()
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/linux/drivers/net/ethernet/broadcom/
H A Dbgmac.h1 /* SPDX-License-Identifier: GPL-2.0 */
200 (((BGMAC_TX_Q3_OCTETS_HIGH - BGMAC_TX_GOOD_OCTETS) / 4) + 1)
202 (((BGMAC_RX_UNI_PKTS - BGMAC_RX_GOOD_OCTETS) / 4) + 1)
225 #define BGMAC_DMA_TX_PC_MASK 0x00E00000 /* Prefetch control */
231 #define BGMAC_DMA_TX_PT_MASK 0x03000000 /* Prefetch threshold */
279 #define BGMAC_DMA_RX_PC_MASK 0x00E00000 /* Prefetch control */
285 #define BGMAC_DMA_RX_PT_MASK 0x03000000 /* Prefetch threshold */
329 #define BGMAC_RX_BUF_OFFSET (NET_SKB_PAD + NET_IP_ALIGN - \
412 * bgmac_dma_ring - contains info about DMA ring (either TX or RX one)
461 /* DMA */
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/linux/drivers/usb/gadget/udc/
H A Damd5536udc_pci.c1 // SPDX-License-Identifier: GPL-2.0+
3 * amd5536udc_pci.c -- AMD 5536 UDC high/full speed USB device controller
5 * Copyright (C) 2005-2007 AMD (https://www.amd.com)
11 * It is a USB Highspeed DMA capable USB device controller. Beside ep0 it
18 * UDC DMA requires 32-bit aligned buffers so DMA with gadget ether does not
32 #define UDC_MOD_DESCRIPTION "AMD 5536 UDC - USB Device Controller"
42 #include <linux/prefetch.h>
52 static const char name[] = "amd5536udc-pci";
61 usb_del_gadget_udc(&udc->gadget); in udc_pci_remove()
63 if (WARN_ON(dev->driver)) in udc_pci_remove()
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