| /linux/Documentation/ABI/testing/ |
| H A D | sysfs-pps | 1 What: /sys/class/pps/
5 The /sys/class/pps/ directory will contain files and
7 the PPS sources.
9 What: /sys/class/pps/ppsX/
13 The /sys/class/pps/ppsX/ directory is related to X-th
14 PPS source into the system. Each directory will
15 contain files to manage and control its PPS source.
17 What: /sys/class/pps/ppsX/assert
21 The /sys/class/pps/ppsX/assert file reports the assert events
29 What: /sys/class/pps/ppsX/clear
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| /linux/drivers/pps/ |
| H A D | sysfs.c | 3 * PPS sysfs support
21 struct pps_device *pps = dev_get_drvdata(dev); in assert_show() local
23 if (!(pps->info.mode & PPS_CAPTUREASSERT)) in assert_show()
27 (long long) pps->assert_tu.sec, pps->assert_tu.nsec, in assert_show()
28 pps->assert_sequence); in assert_show()
35 struct pps_device *pps = dev_get_drvdata(dev); in clear_show() local
37 if (!(pps->info.mode & PPS_CAPTURECLEAR)) in clear_show()
41 (long long) pps->clear_tu.sec, pps->clear_tu.nsec, in clear_show()
42 pps->clear_sequence); in clear_show()
49 struct pps_device *pps = dev_get_drvdata(dev); in mode_show() local
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| H A D | Kconfig | 3 # PPS support configuration
6 menuconfig PPS config
7 tristate "PPS support"
9 PPS (Pulse Per Second) is a special pulse provided by some GPS
13 Some antennae's PPS signals are connected with the CD (Carrier
17 Some antennae's PPS signals are connected with some special host
23 if PPS
26 bool "PPS debugging messages"
28 Say Y here if you want the PPS support to produce a bunch of debug
30 problem with PPS support and want to see more of what is going on.
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| H A D | kc.h | 3 * PPS kernel consumer API header
16 extern int pps_kc_bind(struct pps_device *pps,
18 extern void pps_kc_remove(struct pps_device *pps);
19 extern void pps_kc_event(struct pps_device *pps,
25 static inline int pps_kc_bind(struct pps_device *pps, in pps_kc_bind() argument
27 static inline void pps_kc_remove(struct pps_device *pps) {} in pps_kc_remove() argument
28 static inline void pps_kc_event(struct pps_device *pps, in pps_kc_event() argument
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| /linux/drivers/pps/clients/ |
| H A D | pps-gpio.c | 3 * pps-gpio.c -- PPS client driver using GPIO
9 #define PPS_GPIO_NAME "pps-gpio"
28 int irq; /* IRQ used as PPS source */
29 struct pps_device *pps; /* PPS source device */ member
30 struct pps_source_info info; /* PPS source information */
36 unsigned int echo_active_ms; /* PPS echo active duration */
41 * Report the PPS event
60 pps_event(info->pps, &ts, PPS_CAPTUREASSERT, data); in pps_gpio_irq_handler()
64 pps_event(info->pps, &ts, PPS_CAPTURECLEAR, data); in pps_gpio_irq_handler()
66 dev_warn_ratelimited(&info->pps->dev, "IRQ did not trigger any PPS event\n"); in pps_gpio_irq_handler()
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| H A D | pps-ktimer.c | 3 * pps-ktimer.c -- kernel timer test client
21 static struct pps_device *pps; variable
35 pps_event(pps, &ts, PPS_CAPTUREASSERT, NULL); in pps_ktimer_event()
41 * The PPS info struct
59 dev_dbg(&pps->dev, "ktimer PPS source unregistered\n"); in pps_ktimer_exit()
62 pps_unregister_source(pps); in pps_ktimer_exit()
67 pps = pps_register_source(&pps_ktimer_info, in pps_ktimer_init()
69 if (IS_ERR(pps)) { in pps_ktimer_init()
70 pr_err("cannot register PPS source\n"); in pps_ktimer_init()
71 return PTR_ERR(pps); in pps_ktimer_init()
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| H A D | Kconfig | 3 # PPS clients configuration
6 comment "PPS clients support"
11 If you say yes here you get support for a PPS debugging client
12 which uses a kernel timer to generate the PPS signal.
15 will be called pps-ktimer.
18 tristate "PPS line discipline"
21 If you say yes here you get support for a PPS source connected
25 tristate "Parallel port PPS client"
28 If you say yes here you get support for a PPS source connected
32 tristate "PPS client using GPIO"
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| H A D | Makefile | 3 # Makefile for PPS clients.
6 obj-$(CONFIG_PPS_CLIENT_KTIMER) += pps-ktimer.o
7 obj-$(CONFIG_PPS_CLIENT_LDISC) += pps-ldisc.o
9 obj-$(CONFIG_PPS_CLIENT_GPIO) += pps-gpio.o
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| /linux/drivers/media/platform/allegro-dvt/ |
| H A D | nal-hevc.c | 11 * RBSP for VPS/SPS/PPS nal units and add them to the encoded stream if the
430 static void nal_hevc_rbsp_pps(struct rbsp *rbsp, struct nal_hevc_pps *pps) in nal_hevc_rbsp_pps() argument
434 rbsp_uev(rbsp, &pps->pps_pic_parameter_set_id); in nal_hevc_rbsp_pps()
435 rbsp_uev(rbsp, &pps->pps_seq_parameter_set_id); in nal_hevc_rbsp_pps()
436 rbsp_bit(rbsp, &pps->dependent_slice_segments_enabled_flag); in nal_hevc_rbsp_pps()
437 rbsp_bit(rbsp, &pps->output_flag_present_flag); in nal_hevc_rbsp_pps()
438 rbsp_bits(rbsp, 3, &pps->num_extra_slice_header_bits); in nal_hevc_rbsp_pps()
439 rbsp_bit(rbsp, &pps->sign_data_hiding_enabled_flag); in nal_hevc_rbsp_pps()
440 rbsp_bit(rbsp, &pps->cabac_init_present_flag); in nal_hevc_rbsp_pps()
441 rbsp_uev(rbsp, &pps->num_ref_idx_l0_default_active_minus1); in nal_hevc_rbsp_pps()
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| H A D | nal-h264.c | 11 * generator to generate the RBSP for SPS/PPS nal units and add them to the
283 static void nal_h264_rbsp_pps(struct rbsp *rbsp, struct nal_h264_pps *pps) in nal_h264_rbsp_pps() argument
287 rbsp_uev(rbsp, &pps->pic_parameter_set_id); in nal_h264_rbsp_pps()
288 rbsp_uev(rbsp, &pps->seq_parameter_set_id); in nal_h264_rbsp_pps()
289 rbsp_bit(rbsp, &pps->entropy_coding_mode_flag); in nal_h264_rbsp_pps()
290 rbsp_bit(rbsp, &pps->bottom_field_pic_order_in_frame_present_flag); in nal_h264_rbsp_pps()
291 rbsp_uev(rbsp, &pps->num_slice_groups_minus1); in nal_h264_rbsp_pps()
292 if (pps->num_slice_groups_minus1 > 0) { in nal_h264_rbsp_pps()
293 rbsp_uev(rbsp, &pps->slice_group_map_type); in nal_h264_rbsp_pps()
294 switch (pps->slice_group_map_type) { in nal_h264_rbsp_pps()
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| /linux/drivers/gpu/drm/amd/display/dc/dsc/ |
| H A D | rc_calc.c | 31 * @pps: DRM struct with all required DSC values
40 void calc_rc_params(struct rc_params *rc, const struct drm_dsc_config *pps) in calc_rc_params() argument
46 u16 drm_bpp = pps->bits_per_pixel; in calc_rc_params()
47 int slice_width = pps->slice_width; in calc_rc_params()
48 int slice_height = pps->slice_height; in calc_rc_params()
50 mode = pps->convert_rgb ? CM_RGB : (pps->simple_422 ? CM_444 : in calc_rc_params()
51 (pps->native_422 ? CM_422 : in calc_rc_params()
52 pps->native_420 ? CM_420 : CM_444)); in calc_rc_params()
53 bpc = (pps->bits_per_component == 8) ? BPC_8 : (pps->bits_per_component == 10) in calc_rc_params()
56 is_navite_422_or_420 = pps->native_422 || pps->native_420; in calc_rc_params()
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| H A D | rc_calc_dpi.c | 98 int dscc_compute_dsc_parameters(const struct drm_dsc_config *pps, in dscc_compute_dsc_parameters() argument
105 dsc_params->pps = *pps; in dscc_compute_dsc_parameters()
106 …dsc_params->pps.initial_scale_value = 8 * rc->rc_model_size / (rc->rc_model_size - rc->initial_ful… in dscc_compute_dsc_parameters()
108 copy_pps_fields(&dsc_cfg, &dsc_params->pps); in dscc_compute_dsc_parameters()
111 dsc_cfg.mux_word_size = dsc_params->pps.bits_per_component <= 10 ? 48 : 64; in dscc_compute_dsc_parameters()
118 copy_pps_fields(&dsc_params->pps, &dsc_cfg); in dscc_compute_dsc_parameters()
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| /linux/drivers/gpu/drm/i915/display/ |
| H A D | intel_vdsc_regs.h | 58 #define DSCA_PPS(pps) _MMIO(_DSCA_PPS_0 + ((pps) < 12 ? (pps) : (pps) + 12) * 4) argument
59 #define DSCC_PPS(pps) _MMIO(_DSCC_PPS_0 + ((pps) < 12 ? (pps) : (pps) + 12) * 4) argument
81 #define ICL_DSC0_PPS(pipe, pps) _MMIO(_ICL_DSC0_PPS_0(pipe) + ((pps) * 4)) argument
82 #define ICL_DSC1_PPS(pipe, pps) _MMIO(_ICL_DSC1_PPS_0(pipe) + ((pps) * 4)) argument
83 #define BMG_DSC2_PPS(pipe, pps) _MMIO(_BMG_DSC2_PPS_0(pipe) + ((pps) * 4)) argument
85 /* PPS 0 */
102 /* PPS 1 */
106 /* PPS 2 */
112 /* PPS 3 */
118 /* PPS 4 */
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| /linux/samples/bpf/ |
| H A D | xdp_sample_user.c | 60 #define PPS(pps) pps, "pkt/s" macro
123 __u64 pps; member
137 __u64 pps; member
592 __u64 pps = 0; in calc_pps() local
596 pps = sample_round(packets / period_); in calc_pps()
598 return pps; in calc_pps()
604 __u64 pps = 0; in calc_drop_pps() local
608 pps = sample_round(packets / period_); in calc_drop_pps()
610 return pps; in calc_drop_pps()
616 __u64 pps = 0; in calc_errs_pps() local
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| /linux/drivers/staging/media/sunxi/cedrus/ |
| H A D | cedrus_h265.c | 364 const struct v4l2_ctrl_hevc_pps *pps; in cedrus_h265_write_tiles() local
370 pps = run->h265.pps; in cedrus_h265_write_tiles()
375 for (x = 0, tx = 0; tx < pps->num_tile_columns_minus1 + 1; tx++) { in cedrus_h265_write_tiles()
376 if (x + pps->column_width_minus1[tx] + 1 > ctb_addr_x) in cedrus_h265_write_tiles()
379 x += pps->column_width_minus1[tx] + 1; in cedrus_h265_write_tiles()
382 for (y = 0, ty = 0; ty < pps->num_tile_rows_minus1 + 1; ty++) { in cedrus_h265_write_tiles()
383 if (y + pps->row_height_minus1[ty] + 1 > ctb_addr_y) in cedrus_h265_write_tiles()
386 y += pps->row_height_minus1[ty] + 1; in cedrus_h265_write_tiles()
391 ((y + pps->row_height_minus1[ty]) << 16) | in cedrus_h265_write_tiles()
392 ((x + pps->column_width_minus1[tx]) << 0)); in cedrus_h265_write_tiles()
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| H A D | cedrus_h264.c | 261 const struct v4l2_ctrl_h264_pps *pps = run->h264.pps; in cedrus_write_scaling_lists() local
264 if (!(pps->flags & V4L2_H264_PPS_FLAG_SCALING_MATRIX_PRESENT)) in cedrus_write_scaling_lists()
346 const struct v4l2_ctrl_h264_pps *pps = run->h264.pps; in cedrus_set_params() local
391 if (V4L2_H264_CTRL_PRED_WEIGHTS_REQUIRED(pps, slice)) in cedrus_set_params()
410 reg |= (pps->weighted_bipred_idc & 0x3) << 2; in cedrus_set_params()
411 if (pps->flags & V4L2_H264_PPS_FLAG_ENTROPY_CODING_MODE) in cedrus_set_params()
413 if (pps->flags & V4L2_H264_PPS_FLAG_WEIGHTED_PRED) in cedrus_set_params()
415 if (pps->flags & V4L2_H264_PPS_FLAG_CONSTRAINED_INTRA_PRED) in cedrus_set_params()
417 if (pps->flags & V4L2_H264_PPS_FLAG_TRANSFORM_8X8_MODE) in cedrus_set_params()
466 reg |= (pps->second_chroma_qp_index_offset & 0x3f) << 16; in cedrus_set_params()
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| /linux/drivers/media/platform/verisilicon/ |
| H A D | hantro_g1_h264_dec.c | 27 const struct v4l2_ctrl_h264_pps *pps = ctrls->pps; in set_params() local
58 reg = G1_REG_DEC_CTRL2_CH_QP_OFFSET(pps->chroma_qp_index_offset) | in set_params()
59 G1_REG_DEC_CTRL2_CH_QP_OFFSET2(pps->second_chroma_qp_index_offset); in set_params()
61 if (pps->flags & V4L2_H264_PPS_FLAG_SCALING_MATRIX_PRESENT) in set_params()
69 G1_REG_DEC_CTRL3_INIT_QP(pps->pic_init_qp_minus26 + 26) | in set_params()
76 G1_REG_DEC_CTRL4_WEIGHT_BIPR_IDC(pps->weighted_bipred_idc); in set_params()
77 if (pps->flags & V4L2_H264_PPS_FLAG_ENTROPY_CODING_MODE) in set_params()
83 if (pps->flags & V4L2_H264_PPS_FLAG_WEIGHTED_PRED) in set_params()
90 if (pps->flags & V4L2_H264_PPS_FLAG_CONSTRAINED_INTRA_PRED) in set_params()
92 if (pps->flags & V4L2_H264_PPS_FLAG_DEBLOCKING_FILTER_CONTROL_PRESENT) in set_params()
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| H A D | rockchip_vpu2_hw_h264_dec.c | 198 const struct v4l2_ctrl_h264_pps *pps = ctrls->pps; in set_params() local
209 reg = VDPU_REG_INIT_QP(pps->pic_init_qp_minus26 + 26) | in set_params()
261 reg = VDPU_REG_CH_QP_OFFSET2(pps->second_chroma_qp_index_offset) | in set_params()
262 VDPU_REG_CH_QP_OFFSET(pps->chroma_qp_index_offset) | in set_params()
267 reg = VDPU_REG_WEIGHT_BIPR_IDC(pps->weighted_bipred_idc) | in set_params()
271 reg = VDPU_REG_FILT_CTRL_PRES(pps->flags & V4L2_H264_PPS_FLAG_DEBLOCKING_FILTER_CONTROL_PRESENT) | in set_params()
272 VDPU_REG_RDPIC_CNT_PRES(pps->flags & V4L2_H264_PPS_FLAG_REDUNDANT_PIC_CNT_PRESENT) | in set_params()
281 reg = VDPU_REG_PPS_ID(pps->pic_parameter_set_id) | in set_params()
282 VDPU_REG_REFIDX1_ACTIVE(pps->num_ref_idx_l1_default_active_minus1 + 1) | in set_params()
283 VDPU_REG_REFIDX0_ACTIVE(pps->num_ref_idx_l0_default_active_minus1 + 1) | in set_params()
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| /linux/include/uapi/linux/ |
| H A D | timex.h | 32 * defines for PPS phase-lock loop.
35 * Revised status codes and structures for external clock and PPS
80 __kernel_long_t ppsfreq;/* pps frequency (scaled ppm) (ro) */
81 __kernel_long_t jitter; /* pps jitter (us) (ro) */
83 __kernel_long_t stabil; /* pps stability (scaled ppm) (ro) */
119 long long ppsfreq;/* pps frequency (scaled ppm) (ro) */
120 long long jitter; /* pps jitter (us) (ro) */
123 long long stabil; /* pps stability (scaled ppm) (ro) */
172 #define STA_PPSFREQ 0x0002 /* enable PPS freq discipline (rw) */
173 #define STA_PPSTIME 0x0004 /* enable PPS time discipline (rw) */
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| H A D | gen_stats.h | 34 * @pps: current packet rate
38 __u32 pps; member
44 * @pps: current packet rate
48 __u64 pps; member
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| /linux/include/drm/display/ |
| H A D | drm_dsc.h | 27 /* DSC PPS constants and macros */
276 * The VESA DSC standard defines picture parameter set (PPS) which display
278 * The PPS is encapsulated in 128 bytes (PPS 0 through PPS 127). The fields in
280 * The PPS fields that span over more than a byte should be stored in Big Endian
293 * used to differentiate between different PPS tables.
537 * PPS 94, 95, 96, 97 - Reserved
542 * PPS 98, 99, 100, 101 - Reserved
547 * PPS 102, 103, 104, 105 - Reserved
552 * PPS 106, 107, 108, 109 - reserved
557 * PPS 110, 111, 112, 113 - reserved
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| /linux/net/netfilter/ |
| H A D | xt_rateest.c | 26 pps1 = info->pps1 >= sample.pps ? info->pps1 - sample.pps : 0; in xt_rateest_mt()
29 pps1 = sample.pps; in xt_rateest_mt()
40 pps2 = info->pps2 >= sample.pps ? info->pps2 - sample.pps : 0; in xt_rateest_mt()
43 pps2 = sample.pps; in xt_rateest_mt()
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| /linux/drivers/net/ethernet/netronome/nfp/flower/ |
| H A D | qos_conf.c | 57 * [15] p(pps) 1 for pps, 0 for bps
87 bool pps, u32 id, u32 rate, u32 burst) in nfp_flower_offload_one_police() argument
99 if (pps) in nfp_flower_offload_one_police()
180 bool pps; in nfp_flower_install_rate_limiter() local
244 "unsupported offload: FW does not support PPS action"); in nfp_flower_install_rate_limiter()
249 "unsupported offload: qos rate limit offload only support one PPS action"); in nfp_flower_install_rate_limiter()
266 "unsupported offload: qos rate limit is not BPS or PPS"); in nfp_flower_install_rate_limiter()
271 pps = false; in nfp_flower_install_rate_limiter()
273 pps = true; in nfp_flower_install_rate_limiter()
275 pps, netdev_port_id, in nfp_flower_install_rate_limiter()
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| /linux/arch/mips/pic32/pic32mzda/ |
| H A D | early_pin.h | 10 * This is a complete, yet overly simplistic and unoptimized, PIC32MZDA PPS
14 /* Input PPS Functions */
69 /* Input PPS Pins */
124 /* Output PPS Pins */
181 /* Output PPS Functions */
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| /linux/drivers/gpu/drm/display/ |
| H A D | drm_dsc_helper.c | 35 * drm_dsc_dp_pps_header_init() - Initializes the PPS Header
82 * drm_dsc_pps_payload_pack() - Populates the DSC PPS
91 * DSC source device sends a picture parameter set (PPS) containing the
93 * populates the DSC PPS struct using the DSC configuration parameters in
95 * device expects the PPS payload in big endian format for fields
109 /* PPS 0 */ in drm_dsc_pps_payload_pack()
114 /* PPS 1, 2 is 0 */ in drm_dsc_pps_payload_pack()
116 /* PPS 3 */ in drm_dsc_pps_payload_pack()
121 /* PPS 4 */ in drm_dsc_pps_payload_pack()
130 /* PPS 5 */ in drm_dsc_pps_payload_pack()
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