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/linux/drivers/scsi/
H A Dppa.c192 unsigned short ppb = dev->base; in ppa_wait() local
197 for (r = r_str(ppb); ((r & 0xc0) != 0xc0) && (k); k--) { in ppa_wait()
199 r = r_str(ppb); in ppa_wait()
221 static inline void epp_reset(unsigned short ppb) in epp_reset() argument
225 i = r_str(ppb); in epp_reset()
226 w_str(ppb, i); in epp_reset()
227 w_str(ppb, i & 0xfe); in epp_reset()
290 unsigned short ppb = dev->base; in ppa_out() local
302 r = ppa_byte_out(ppb, buffer, len); in ppa_out()
308 epp_reset(ppb); in ppa_out()
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H A Dimm.c181 unsigned short ppb = dev->base; in imm_wait() local
184 w_ctr(ppb, 0x0c); in imm_wait()
188 r = r_str(ppb); in imm_wait()
213 w_ctr(ppb, 0x04); in imm_wait()
274 static inline void epp_reset(unsigned short ppb) in epp_reset() argument
278 i = r_str(ppb); in epp_reset()
279 w_str(ppb, i); in epp_reset()
280 w_str(ppb, i & 0xfe); in epp_reset()
355 unsigned short ppb = dev->base; in imm_out() local
372 epp_reset(ppb); in imm_out()
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/linux/drivers/net/wireless/ath/
H A Ddfs_pattern_detector.c36 /* percentage on ppb threshold to trigger detection */
38 #define PPB_THRESH_RATE(PPB, RATE) ((PPB * RATE + 100 - RATE) / 100) argument
39 #define PPB_THRESH(PPB) PPB_THRESH_RATE(PPB, MIN_PPB_THRESH) argument
46 #define ETSI_PATTERN(ID, WMIN, WMAX, PMIN, PMAX, PRF, PPB, CHIRP) \ argument
50 (PRF2PRI(PMIN) * PRF + PRI_TOLERANCE), PRF, PPB * PRF, \
51 PPB_THRESH(PPB), PRI_TOLERANCE, CHIRP \
71 #define FCC_PATTERN(ID, WMIN, WMAX, PMIN, PMAX, PRF, PPB, CHIRP) \ argument
75 PMAX * PRF + PRI_TOLERANCE, PRF, PPB * PRF, \
76 PPB_THRESH(PPB), PRI_TOLERANCE, CHIRP \
103 #define JP_PATTERN(ID, WMIN, WMAX, PMIN, PMAX, PRF, PPB, RATE, CHIRP) \ argument
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H A Ddfs_pattern_detector.h66 * @ppb: pulses per bursts for this type
78 u8 ppb; member
H A Ddfs_pri_detector.c250 ps.dur = ps.pri * (pde->rs->ppb - 1) in pseq_handler_create_sequences()
430 de->window_size = rs->pri_max * rs->ppb * rs->num_pri; in pri_detector_init()
431 de->max_count = rs->ppb * 2; in pri_detector_init()
/linux/drivers/net/ethernet/qlogic/qed/
H A Dqed_ptp.c247 /* Adjust the HW clock by a rate given in parts-per-billion (ppb) units.
252 * The routine translates ppb into the adjustment triplet in an optimal manner.
254 static int qed_ptp_hw_adjfreq(struct qed_dev *cdev, s32 ppb) in qed_ptp_hw_adjfreq() argument
262 if (ppb < 0) { in qed_ptp_hw_adjfreq()
263 ppb = -ppb; in qed_ptp_hw_adjfreq()
267 if (ppb > 1) { in qed_ptp_hw_adjfreq()
268 s64 best_dif = ppb, best_approx_dev = 1; in qed_ptp_hw_adjfreq()
274 period = div_s64(val * 1000000000, ppb); in qed_ptp_hw_adjfreq()
284 dif = ppb * approx_dev - val * 1000000000; in qed_ptp_hw_adjfreq()
285 dif2 = dif + 16 * ppb; in qed_ptp_hw_adjfreq()
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/linux/drivers/ptp/
H A Dptp_dte.c37 #define DTE_PPB_ADJ(ppb) (u32)(div64_u64((((u64)abs(ppb) * BIT(28)) +\ argument
139 s32 ppb = scaled_ppm_to_ppb(scaled_ppm); in ptp_dte_adjfine() local
144 if (abs(ppb) > ptp_dte->caps.max_adj) { in ptp_dte_adjfine()
145 dev_err(ptp_dte->dev, "ppb adj too big\n"); in ptp_dte_adjfine()
149 if (ppb < 0) in ptp_dte_adjfine()
150 nco_incr = DTE_NCO_INC_DEFAULT - DTE_PPB_ADJ(ppb); in ptp_dte_adjfine()
152 nco_incr = DTE_NCO_INC_DEFAULT + DTE_PPB_ADJ(ppb); in ptp_dte_adjfine()
H A Dptp_dfl_tod.c132 u64 ppb; in dfl_tod_adjust_fine() local
137 /* add GIGA as nominal ppb */ in dfl_tod_adjust_fine()
138 ppb = scaled_ppm_to_ppb(scaled_ppm) + GIGA; in dfl_tod_adjust_fine()
140 tod_period = div_u64_rem(ppb << PERIOD_FRAC_OFFSET, rate, &tod_rem); in dfl_tod_adjust_fine()
/linux/drivers/rtc/
H A Drtc-renesas-rtca3.c105 * struct rtca3_ppb_per_cycle - PPB per cycle
106 * @ten_sec: PPB per cycle in 10 seconds adjutment mode
107 * @sixty_sec: PPB per cycle in 60 seconds adjustment mode
122 * @ppb: ppb per cycle for each the available adjustment modes
132 struct rtca3_ppb_per_cycle ppb; member
485 ppb_per_cycle = priv->ppb.ten_sec; in rtca3_read_offset()
487 ppb_per_cycle = priv->ppb.sixty_sec; in rtca3_read_offset()
508 cycles10 = DIV_ROUND_CLOSEST(offset, priv->ppb.ten_sec); in rtca3_set_offset()
509 cycles60 = DIV_ROUND_CLOSEST(offset, priv->ppb.sixty_sec); in rtca3_set_offset()
580 priv->ppb.ten_sec = DIV_ROUND_CLOSEST_ULL(1000000000ULL, (osc32k_rate * 10)); in rtca3_initial_setup()
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H A Drtc-armada38x.c388 * Armada 38x supports two modes, fine mode (954ppb) and coarse mode (3815ppb).
390 static long armada38x_ppb_convert(long ppb) in armada38x_ppb_convert() argument
392 long div = ppb + 1000000000L; in armada38x_ppb_convert()
H A Drtc-tps65910.c44 /* Multiplier for ppb conversions */
289 /* Convert from RTC calibration register format to ppb format */ in tps65910_read_offset()
313 /* Convert from ppb format to RTC calibration register format */ in tps65910_set_offset()
H A Drtc-tps6594.c42 // Multiplier for ppb conversions
275 // Convert from RTC calibration register format to ppb format. in tps6594_rtc_read_offset()
308 // Convert from ppb format to RTC calibration register format. in tps6594_rtc_set_offset()
/linux/drivers/net/ethernet/chelsio/cxgb4/
H A Dcxgb4_ptp.c210 s32 ppb = scaled_ppm_to_ppb(scaled_ppm); in cxgb4_ptp_adjfine() local
221 c.u.ts.sign = (ppb < 0) ? 1 : 0; in cxgb4_ptp_adjfine()
222 if (ppb < 0) in cxgb4_ptp_adjfine()
223 ppb = -ppb; in cxgb4_ptp_adjfine()
224 c.u.ts.ppb = cpu_to_be32(ppb); in cxgb4_ptp_adjfine()
/linux/drivers/net/ethernet/marvell/octeontx2/af/
H A Dptp.c317 s64 ppb; in ptp_adjfine() local
338 /* convert scaled_ppm to ppb */ in ptp_adjfine()
339 ppb = 1 + scaled_ppm; in ptp_adjfine()
340 ppb *= 125; in ptp_adjfine()
341 ppb >>= 13; in ptp_adjfine()
344 /* calculate the new frequency based on ppb */ in ptp_adjfine()
345 freq_adj = (ptp->clock_rate * ppb) / 1000000000ULL; in ptp_adjfine()
350 adj = comp * ppb; in ptp_adjfine()
/linux/drivers/media/platform/nvidia/tegra-vde/
H A Dvde.h101 void __iomem *ppb; member
226 if (vde->ppb == base) in tegra_vde_reg_base_name()
227 return "PPB"; in tegra_vde_reg_base_name()
H A Dvde.c263 vde->ppb = devm_platform_ioremap_resource_byname(pdev, "ppb"); in tegra_vde_probe()
264 if (IS_ERR(vde->ppb)) in tegra_vde_probe()
265 return PTR_ERR(vde->ppb); in tegra_vde_probe()
/linux/fs/ext2/
H A Dsuper.c749 unsigned int ppb = 1 << (bits-2); in ext2_max_size() local
769 meta_blocks += 1 + ppb; in ext2_max_size()
770 meta_blocks += 1 + ppb + ppb * ppb; in ext2_max_size()
780 upper_limit -= ppb; in ext2_max_size()
782 if (upper_limit < ppb * ppb) { in ext2_max_size()
783 meta_blocks += 1 + DIV_ROUND_UP(upper_limit, ppb); in ext2_max_size()
787 meta_blocks += 1 + ppb; in ext2_max_size()
788 upper_limit -= ppb * ppb; in ext2_max_size()
790 meta_blocks += 1 + DIV_ROUND_UP(upper_limit, ppb) + in ext2_max_size()
791 DIV_ROUND_UP(upper_limit, ppb*ppb); in ext2_max_size()
/linux/Documentation/devicetree/bindings/media/
H A Dnvidia,tegra-vde.yaml39 - const: ppb
107 "tfe", "ppb", "vdma", "frameid";
/linux/tools/testing/selftests/ptp/
H A Dtestptp.c95 static long ppb_to_scaled_ppm(int ppb) in ppb_to_scaled_ppm() argument
102 * scaled_ppm = (ppb / 1000) << 16 [1] in ppb_to_scaled_ppm()
103 * scaled_ppm = (ppb << 16) / 1000 [2] in ppb_to_scaled_ppm()
108 return (long) (ppb * 65.536); in ppb_to_scaled_ppm()
124 " -f val adjust the ptp clock frequency by 'val' ppb\n" in usage()
340 " %d maximum frequency adjustment (ppb)\n" in main()
/linux/drivers/pci/hotplug/
H A Dibmphp_pci.c111 * | |___________|=> 1=PPB bridge, 0=normal device, 2=CardBus Bridge in ibmphp_configure_card()
182 err("was not able to hot-add PPB properly.\n"); in ibmphp_configure_card()
183 func->bus = 1; /* To indicate to the unconfigure function that this is a PPB */ in ibmphp_configure_card()
211 func->bus = 1; /* To indicate to the unconfigure function that this is a PPB */ in ibmphp_configure_card()
251 func->bus = 1; /* To indicate to the unconfigure function that this is a PPB */ in ibmphp_configure_card()
252 err("was not able to hot-add PPB properly.\n"); in ibmphp_configure_card()
284 func->bus = 1; /* To indicate to the unconfigure function that this is a PPB */ in ibmphp_configure_card()
524 func->bus = 0; /* To indicate that this is not a PPB */ in configure_device()
1004 func->bus = 1; /* For unconfiguring, to indicate it's PPB */ in configure_bridge()
1041 * This function adds up the amount of resources needed behind the PPB bridge
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/linux/drivers/net/ethernet/freescale/
H A Dfec_ptp.c352 s32 ppb = scaled_ppm_to_ppb(scaled_ppm); in fec_ptp_adjfine() local
363 if (ppb == 0) in fec_ptp_adjfine()
366 if (ppb < 0) { in fec_ptp_adjfine()
367 ppb = -ppb; in fec_ptp_adjfine()
371 /* In theory, corr_inc/corr_period = ppb/NSEC_PER_SEC; in fec_ptp_adjfine()
376 rhs = (u64)ppb * (u64)fep->ptp_inc; in fec_ptp_adjfine()
/linux/Documentation/ABI/testing/
H A Dsysfs-firmware-sgi_uv145 PPB
156 object type is 'PPB'.
/linux/drivers/net/ethernet/ti/
H A Dam65-cpts.c439 s32 ppb = scaled_ppm_to_ppb(scaled_ppm); in am65_cpts_ptp_adjfine() local
446 if (ppb < 0) { in am65_cpts_ptp_adjfine()
448 ppb = -ppb; in am65_cpts_ptp_adjfine()
452 * ppb_norm = ppb * base_freq / clock_freq; in am65_cpts_ptp_adjfine()
456 * adj_period = 1 000 000 000 / (ppb * base_freq / clock_freq) in am65_cpts_ptp_adjfine()
457 * adj_period = (1 000 000 000 * clock_freq) / (ppb * base_freq) in am65_cpts_ptp_adjfine()
458 * adj_period = clock_freq / ppb in am65_cpts_ptp_adjfine()
460 adj_period = div_u64(cpts->refclk_freq, ppb); in am65_cpts_ptp_adjfine()
/linux/drivers/net/ethernet/intel/e1000e/
H A De1000.h385 #define MAX_PPB_96MHZ 23999900 /* 23,999,900 ppb */
390 #define MAX_PPB_25MHZ 599999900 /* 599,999,900 ppb */
395 #define MAX_PPB_24MHZ 999999999 /* 999,999,999 ppb */
400 #define MAX_PPB_38400KHZ 230769100 /* 230,769,100 ppb */
/linux/Documentation/devicetree/bindings/clock/
H A Dfixed-clock.yaml32 description: accuracy of clock in ppb (parts per billion).

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