Home
last modified time | relevance | path

Searched +full:power +full:- +full:up +full:- +full:frequency (Results 1 – 25 of 756) sorted by relevance

12345678910>>...31

/linux/Documentation/admin-guide/pm/
H A Dintel_uncore_frequency_scaling.rst1 .. SPDX-License-Identifier: GPL-2.0
5 Intel Uncore Frequency Scaling
8 :Copyright: |copy| 2022-2023 Intel Corporation
13 ------------
15 The uncore can consume significant amount of power in Intel's Xeon servers based
16 on the workload characteristics. To optimize the total power and improve overall
17 performance, SoCs have internal algorithms for scaling uncore frequency. These
18 algorithms monitor workload usage of uncore and set a desirable frequency.
24 change to uncore frequency. Also, users may have workloads which require
26 use both cpufreq and the uncore scaling interface to distribute power and
[all …]
H A Dcpufreq.rst1 .. SPDX-License-Identifier: GPL-2.0
19 different clock frequency and voltage configurations, often referred to as
20 Operating Performance Points or P-states (in ACPI terminology). As a rule,
21 the higher the clock frequency and the higher the voltage, the more instructions
23 frequency and the higher the voltage, the more energy is consumed over a unit of
24 time (or the more power is drawn) by the CPU in the given P-state. Therefore
26 that can be executed over a unit of time) and the power drawn by the CPU.
29 as possible and then there is no reason to use any P-states different from the
30 highest one (i.e. the highest-performance frequency/voltage configuration
35 long for thermal or power supply capacity reasons or similar. To cover those
[all …]
H A Dintel-speed-select.rst1 .. SPDX-License-Identifier: GPL-2.0
9 With Intel(R) SST, one server can be configured for power and performance for a
14 - https://www.intel.com/content/www/us/en/architecture-and-technology/speed-select-technology-artic…
15 - https://builders.intel.com/docs/networkbuilders/intel-speed-select-technology-base-frequency-enha…
19 dynamically without pre-configuring via BIOS setup options. This dynamic
25 how these commands change the power and performance profile of the system under
29 intel-speed-select configuration tool
32 Most Linux distribution packages may include the "intel-speed-select" tool. If not,
38 # cd tools/power/x86/intel-speed-select/
43 ------------
[all …]
/linux/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/
H A Dsmu_v13_0_4_ppsmc.h27 /*! @mainpage PMFW-PPS (PPLib) Message Interface
59 #define PPSMC_MSG_PowerDownVcn 0x06 ///< Power down VCN
60 #define PPSMC_MSG_PowerUpVcn 0x07 ///< Power up VCN; VCN is power gated by defau…
62 …MC_MSG_SetSoftMinGfxclk 0x09 ///< Set SoftMin for GFXCLK, argument is frequency in MHz
78 #define PPSMC_MSG_GetGfxclkFrequency 0x17 ///< Get GFX clock frequency
79 #define PPSMC_MSG_GetFclkFrequency 0x18 ///< Get FCLK frequency
88 #define PPSMC_MSG_SetPowerLimitPercentage 0x20 ///< Set power limit percentage
89 #define PPSMC_MSG_PowerDownJpeg 0x21 ///< Power down Jpeg
90 #define PPSMC_MSG_PowerUpJpeg 0x22 ///< Power up Jpeg; VCN is power gated by defa…
98 #define PPSMC_MSG_PowerDownIspByTile 0x29 ///< ISP is power gated by default
[all …]
/linux/arch/arm64/boot/dts/xilinx/
H A Dzynqmp-zc1751-xm015-dc1.dts1 // SPDX-License-Identifier: GPL-2.0+
3 * dts file for Xilinx ZynqMP zc1751-xm015-dc1
5 * (C) Copyright 2015 - 2022, Xilinx, Inc.
6 * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc.
11 /dts-v1/;
14 #include "zynqmp-clk-ccf.dtsi"
15 #include <dt-bindings/phy/phy.h>
16 #include <dt-bindings/gpio/gpio.h>
17 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h>
20 model = "ZynqMP zc1751-xm015-dc1 RevA";
[all …]
/linux/arch/arm/boot/dts/xilinx/
H A Dzynq-zc706.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2011 - 2014 Xilinx
6 /dts-v1/;
7 #include "zynq-7000.dtsi"
11 compatible = "xlnx,zynq-zc706", "xlnx,zynq-7000";
30 stdout-path = "serial0:115200n8";
34 compatible = "usb-nop-xceiv";
35 #phy-cells = <0>;
40 ps-clk-frequency = <33333333>;
45 phy-mode = "rgmii-id";
[all …]
H A Dzynq-zc702.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2011 - 2014 Xilinx
6 /dts-v1/;
7 #include "zynq-7000.dtsi"
8 #include <dt-bindings/gpio/gpio.h>
12 compatible = "xlnx,zynq-zc702", "xlnx,zynq-7000";
31 stdout-path = "serial0:115200n8";
34 gpio-keys {
35 compatible = "gpio-keys";
37 switch-14 {
[all …]
/linux/Documentation/devicetree/bindings/iio/frequency/
H A Dadi,adf4350.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/frequency/adi,adf4350.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Michael Hennerich <michael.hennerich@analog.com>
15 - adi,adf4350
16 - adi,adf4351
21 spi-max-frequency:
28 clock-names:
31 '#clock-cells':
[all …]
/linux/tools/power/cpupower/man/
H A Dcpupower-monitor.11 .TH CPUPOWER\-MONITOR "1" "22/02/2011" "" "cpupower Manual"
3 cpupower\-monitor \- Report processor frequency and idle statistics
7 .RB "\-l"
10 .RB [ -c ] [ "\-m <mon1>," [ "<mon2>,..." ] ]
11 .RB [ "\-i seconds" ]
14 .RB [ -c ][ "\-m <mon1>," [ "<mon2>,..." ] ]
18 \fBcpupower-monitor \fP reports processor topology, frequency and idle power
22 \fBcpupower-monitor \fP implements independent processor sleep state and
23 frequency counters. Some are retrieved from kernel statistics, some are
24 directly reading out hardware registers. Use \-l to get an overview which are
[all …]
/linux/Documentation/scheduler/
H A Dsched-util-clamp.rst1 .. SPDX-License-Identifier: GPL-2.0
18 used, util clamp will influence the CPU frequency selection as well.
45 dropped. It can also dynamically 'prime' up these tasks if it knows in the
57 foreground, top-app, etc. Util clamp can be used to constrain how much
60 the ones belonging to the currently active app (top-app group). Beside this
61 helps in limiting how much power they consume. This can be more obvious in
65 1. The big cores are free to run top-app tasks immediately. top-app
68 2. They don't run on a power hungry core and drain battery even if they
82 Another use case is to help with **overcoming the ramp up latency inherit in
89 higher frequency required for the tasks to finish their work in time. Setting
[all …]
/linux/drivers/cpufreq/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
2 menu "CPU Frequency scaling"
5 bool "CPU Frequency scaling"
7 CPU Frequency scaling allows you to change the clock speed of
8 CPUs on the fly. This is a nice method to save power, because
9 the lower the CPU clock speed, the less power the CPU consumes.
16 <file:Documentation/admin-guide/pm/cpufreq.rst>.
31 bool "CPU frequency transition statistics"
33 Export CPU frequency statistics information through sysfs.
52 the frequency statically to the highest frequency supported by
[all …]
/linux/Documentation/driver-api/thermal/
H A Dcpu-idle-cooling.rst1 .. SPDX-License-Identifier: GPL-2.0
8 ----------
13 act on a cooling device to mitigate the dissipated power. When the
20 to the static leakage. The only solution is to power down the
24 Last but not least, the system can ask for a specific power budget but
25 because of the OPP density, we can only choose an OPP with a power
26 budget lower than the requested one and under-utilize the CPU, thus
27 losing performance. In other words, one OPP under-utilizes the CPU
28 with a power less than the requested power budget and the next OPP
29 exceeds the power budget. An intermediate OPP could have been used if
[all …]
/linux/Documentation/devicetree/bindings/net/can/
H A Dnxp,sja1000.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Wolfgang Grandegger <wg@grandegger.com>
15 - enum:
16 - nxp,sja1000
17 - technologic,sja1000
18 - items:
19 - const: renesas,r9a06g032-sja1000 # RZ/N1D
20 - const: renesas,rzn1-sja1000 # RZ/N1
[all …]
/linux/arch/arm/boot/dts/qcom/
H A Dqcom-apq8060-dragonboard.dts1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2 #include <dt-bindings/input/input.h>
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/leds/common.h>
5 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
6 #include <dt-bindings/pinctrl/qcom,pmic-mpp.h>
7 #include "qcom-msm8660.dtsi"
12 compatible = "qcom,apq8060-dragonboard", "qcom,msm8660";
19 stdout-path = "serial0:115200n8";
22 /* Main power of the board: 3.7V */
[all …]
/linux/drivers/media/radio/si4713/
H A Dsi4713.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * drivers/media/radio/si4713-i2c.c
19 #include <media/v4l2-device.h>
20 #include <media/v4l2-ioctl.h>
21 #include <media/v4l2-common.h>
28 MODULE_PARM_DESC(debug, "Debug level (0 - 2)");
46 #define DEFAULT_ACOMP_THRESHOLD (-0x28)
55 /* frequency domain transformation (using times 10 to avoid floats) */
160 int rval = -EINVAL; in usecs_to_dev()
176 v4l2_dbg(2, debug, &sdev->sd, in si4713_handler()
[all …]
/linux/Documentation/devicetree/bindings/timer/
H A Darm,arch_timer_mmio.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Marc Zyngier <marc.zyngier@arm.com>
11 - Mark Rutland <mark.rutland@arm.com>
14 ARM cores may have a memory mapped architected timer, which provides up to 8
22 - enum:
23 - arm,armv7-timer-mem
29 '#address-cells':
32 '#size-cells':
[all …]
/linux/arch/arm64/boot/dts/mediatek/
H A Dmt8192-asurada.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/spmi/spmi.h>
25 stdout-path = "serial0:115200n8";
33 backlight_lcd0: backlight-lcd0 {
34 compatible = "pwm-backlight";
36 power-supply = <&ppvar_sys>;
37 enable-gpios = <&pio 152 0>;
38 brightness-levels = <0 1023>;
[all …]
H A Dmt8173-elm.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
6 #include <dt-bindings/input/input.h>
7 #include <dt-bindings/input/linux-event-codes.h>
8 #include <dt-bindings/regulator/dlg,da9211-regulator.h>
9 #include <dt-bindings/gpio/gpio.h>
25 compatible = "pwm-backlight";
27 power-supply = <&bl_fixed_reg>;
28 enable-gpios = <&pio 95 GPIO_ACTIVE_HIGH>;
30 pinctrl-names = "default";
31 pinctrl-0 = <&panel_backlight_en_pins>;
[all …]
H A Dmt8390-genio-common.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
4 * Author: Chris Chen <chris-qj.chen@mediatek.com>
9 * Louis-Alexis Eyraud <louisalexis.eyraud@collabora.com>
14 #include <dt-bindings/gpio/gpio.h>
15 #include <dt-bindings/input/input.h>
16 #include <dt-bindings/interrupt-controller/irq.h>
17 #include <dt-bindings/pinctrl/mediatek,mt8188-pinfunc.h>
18 #include <dt-bindings/regulator/mediatek,mt6360-regulator.h>
19 #include <dt-bindings/spmi/spmi.h>
20 #include <dt-bindings/usb/pd.h>
[all …]
/linux/arch/riscv/boot/dts/sophgo/
H A Dsg2042-milkv-pioneer.dts1 // SPDX-License-Identifier: GPL-2.0 OR MIT
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
12 model = "Milk-V Pioneer";
16 stdout-path = "serial0";
19 gpio-power {
20 compatible = "gpio-keys";
22 key-power {
23 label = "Power Key";
26 linux,input-type = <EV_KEY>;
[all …]
H A Dsg2042-evb-v1.dts1 // SPDX-License-Identifier: GPL-2.0 OR MIT
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
13 compatible = "sophgo,sg2042-evb-v1", "sophgo,sg2042";
16 stdout-path = "serial0";
19 gpio-power {
20 compatible = "gpio-keys";
22 key-power {
23 label = "Power Key";
26 linux,input-type = <EV_KEY>;
[all …]
/linux/tools/perf/pmu-events/arch/x86/jaketown/
H A Duncore-power.json88 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion",
97 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion",
106 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion",
115 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion",
124 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion",
133 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion",
142 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion",
151 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion",
155 "BriefDescription": "Frequency Residency",
160 …frequency greater than or equal to the frequency that is configured in the filter. One can use al…
[all …]
/linux/arch/arm64/boot/dts/qcom/
H A Dsc7280-idp-ec-h1.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
11 pinctrl-0 = <&qup_spi10_data_clk>, <&qup_spi10_cs_gpio_init_high>, <&qup_spi10_cs_gpio>;
12 cs-gpios = <&tlmm 43 GPIO_ACTIVE_LOW>;
15 compatible = "google,cros-ec-spi";
17 interrupt-parent = <&tlmm>;
19 pinctrl-names = "default";
20 pinctrl-0 = <&ap_ec_int_l>;
21 spi-max-frequency = <3000000>;
22 wakeup-source;
25 compatible = "google,cros-ec-pwm";
[all …]
/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx6q-skov-reve-mi1010ait-1cp1.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
5 /dts-v1/;
7 #include "imx6qdl-skov-cpu.dtsi"
11 compatible = "skov,imx6q-skov-reve-mi1010ait-1cp1", "fsl,imx6q";
14 compatible = "pwm-backlight";
15 pinctrl-names = "default";
16 pinctrl-0 = <&pinctrl_backlight>;
17 enable-gpios = <&gpio6 23 GPIO_ACTIVE_LOW>;
19 brightness-levels = <0 255>;
20 num-interpolated-steps = <17>;
[all …]
/linux/Documentation/devicetree/bindings/mmc/
H A Dmmc-controller-common.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mmc/mmc-controller-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Ulf Hansson <ulf.hansson@linaro.org>
14 possible slots or ports for multi-slot controllers.
17 "#address-cells":
22 "#size-cells":
29 broken-cd:
34 cd-gpios:
[all …]

12345678910>>...31