| /freebsd/sys/contrib/device-tree/Bindings/display/panel/ |
| H A D | panel-edp.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/panel/panel-edp.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Douglas Anderson <dianders@chromium.org>
14 to a Embedded DisplayPort AUX bus (see display/dp-aux-bus.yaml) without
17 board, either for second-sourcing purposes or to support multiple SKUs
18 with different LCDs that hook up to a common board.
27 provided anywhere on the DP AUX bus is the power sequencing timings.
30 power on timings for any panels expected to be connected to a board are
[all …]
|
| /freebsd/sys/contrib/device-tree/Bindings/sound/ |
| H A D | cs35l33.txt | 5 - compatible : "cirrus,cs35l33"
7 - reg : the I2C address of the device for I2C
9 - VA-supply, VP-supply : power supplies for the device,
15 - reset-gpios : gpio used to reset the amplifier
17 - interrupts : IRQ line info CS35L33.
18 (See Documentation/devicetree/bindings/interrupt-controller/interrupts.txt
21 - cirrus,boost-ctl : Booster voltage use to supply the amp. If the value is
26 - cirrus,ramp-rate : On power up, it affects the time from when the power
27 up sequence begins to the time the audio reaches a full-scale output.
28 On power down, it affects the time from when the power-down sequence
[all …]
|
| H A D | rt1015.txt | 7 - compatible : "realtek,rt1015".
9 - reg : The I2C address of the device.
13 - realtek,power-up-delay-ms
14 Set a delay time for flush work to be completed,
22 realtek,power-up-delay-ms = <50>;
|
| H A D | realtek,rt1015.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jack Yu <jack.yu@realtek.com>
15 - realtek,rt1015
20 realtek,power-up-delay-ms:
21 description: Set a delay time for flush work to be completed,
26 - compatible
27 - reg
32 - |
[all …]
|
| H A D | adi,adau7002.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Analog Devices ADAU7002 Stereo PDM-to-I2S/TDM Converter
10 - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
13 - $ref: dai-common.yaml#
19 IOVDD-supply:
21 IOVDD power supply, if skipped then it is assumed that the supply pin is
24 wakeup-delay-ms:
26 Delay after power up needed for device to settle.
[all …]
|
| /freebsd/sys/contrib/device-tree/Bindings/mmc/ |
| H A D | mmc-pwrseq-simple.txt | 1 * The simple MMC power sequence provider
3 The purpose of the simple MMC power sequence provider is to supports a set of
8 - compatible : contains "mmc-pwrseq-simple".
11 - reset-gpios : contains a list of GPIO specifiers. The reset GPIOs are asserted
12 at initialization and prior we start the power up procedure of the card.
13 They will be de-asserted right after the power has been provided to the
15 - clocks : Must contain an entry for the entry in clock-names.
16 See ../clocks/clock-bindings.txt for details.
17 - clock-names : Must include the following entry:
19 - post-power-on-delay-ms : Delay in ms after powering the card and
[all …]
|
| H A D | mmc-pwrseq-simple.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mmc/mmc-pwrseq-simple.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Simple MMC power sequence provider
10 - Ulf Hansson <ulf.hansson@linaro.org>
13 The purpose of the simple MMC power sequence provider is to supports a set
19 const: mmc-pwrseq-simple
21 reset-gpios:
27 at initialization and prior we start the power up procedure of the card.
[all …]
|
| H A D | mmc-controller.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mmc/mmc-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Ulf Hansson <ulf.hansson@linaro.org>
25 "#address-cell
[all...] |
| /freebsd/sys/contrib/device-tree/Bindings/mfd/ |
| H A D | rohm,bd71847-pmic.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/mfd/rohm,bd71847-pmi
[all...] |
| H A D | rohm,bd71837-pmic.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/mfd/rohm,bd71837-pmic.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ROHM BD71837 Power Management Integrated Circuit
10 - Matti Vaittinen <mazziesaccount@gmail.com>
13 BD71837MWV is programmable Power Management ICs for powering single-core,
14 dual-core, and quad-core SoCs such as NXP-i.MX 8M. It is optimized for low
18 …s://www.rohm.com/products/power-management/power-management-ic-for-system/industrial-consumer-appl…
35 clock-names:
[all …]
|
| /freebsd/sys/contrib/device-tree/src/arm64/qcom/ |
| H A D | sc7280-crd.dts | 1 // SPDX-License-Identifier: BSD-3-Clause
8 /dts-v1/;
10 #include "sc7280-idp.dtsi"
11 #include "sc7280-idp-ec-h1.dtsi"
15 compatible = "qcom,sc7280-crd", "google,hoglin", "qcom,sc7280";
22 stdout-path = "serial0:115200n8";
27 pmg1110-regulators {
28 compatible = "qcom,pmg1110-rpmh-regulators";
29 qcom,pmic-id = "k";
32 regulator-min-microvolt = <1010000>;
[all …]
|
| H A D | sdm670-google-sargo.dts | 1 // SPDX-License-Identifier: GPL-2.0
3 * Device tree for Google Pixel 3a, adapted from google-blueline device tree,
4 * xiaomi-lavender device tree, and oneplus-common device tree.
9 /dts-v1/;
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
14 #include <dt-bindings/power/qcom-rpmpd.h>
19 /delete-node/ &mpss_region;
20 /delete-node/ &venus_mem;
[all …]
|
| H A D | sc7280-crd-r3.dts | 1 // SPDX-License-Identifier: BSD-3-Clause
8 /dts-v1/;
10 #include "sc7280-idp.dtsi"
11 #include "sc7280-idp-ec-h1.dtsi"
14 model = "Qualcomm Technologies, Inc. sc7280 CRD platform (rev3 -
[all...] |
| H A D | sc7280-herobrine-crd.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
10 #include "sc7280-herobrine.dtsi"
11 #include "sc7280-herobrine-audio-wcd9385.dtsi"
12 #include "sc7280-herobrine-lte-sku.dtsi"
27 vreg_edp_bl_crd: vreg-edp-bl-crd-regulator {
28 compatible = "regulator-fixed";
29 regulator-name = "vreg_edp_bl_crd";
32 enable-active-high;
33 pinctrl-names = "default";
[all …]
|
| H A D | sdm630-sony-xperia-nile.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/input/input.h>
12 #include <dt-bindings/input/gpio-keys.h>
13 #include <dt-bindings/leds/common.h>
17 qcom,msm-id = <318 0>;
18 qcom,board-id = <8 1>;
19 qcom,pmic-id = <0x1001b 0x101011a 0x00 0x00 0x1001b 0x201011a 0x00 0x00>;
21 /* This part enables graphical output via bootloader-enabled display */
25 #address-cells = <2>;
[all …]
|
| /freebsd/sys/contrib/device-tree/Bindings/arm/ |
| H A D | idle-states.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/arm/idle-states.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
14 1 - Introduction
17 ARM systems contain HW capable of managing power consumption dynamically,
18 where cores can be put in different low-power states (ranging from simple wfi
19 to power gating) according to OS PM policies. The CPU states representing the
20 range of dynamic idle states that a processor can enter at run-time, can be
[all …]
|
| /freebsd/sys/dev/iicbus/ |
| H A D | iic_recover_bus.c | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
32 * Helper code to recover a hung i2c bus by bit-banging a recovery sequence.
35 * The most common cause is a partially-completed transaction such as rebooting
38 * data line until power is removed, or the clock cycles enough times to
67 pins->setsda(pins->ctx, 1); in iic_recover_bus()
68 pins->setscl(pins->ctx, 1); in iic_recover_bus()
72 * bus is doing clock-stretching and we should wait a while. If that in iic_recover_bus()
73 * slave is completely locked up there may be no way to recover at all. in iic_recover_bus()
74 * We wait up to 40 milliseconds, a seriously pessimistic time (even a in iic_recover_bus()
[all …]
|
| /freebsd/sys/contrib/device-tree/src/arm64/allwinner/ |
| H A D | sun50i-a64-pine64-plus.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 #include "sun50i-a64-pine64.dts"
8 compatible = "pine64,pine64-plus", "allwinner,sun50i-a64";
14 pinctrl-names = "default";
15 pinctrl-0 = <&rgmii_pins>;
16 phy-mode = "rgmii-txid";
17 phy-handle = <&ext_rgmii_phy>;
22 ext_rgmii_phy: ethernet-phy@1 {
23 compatible = "ethernet-phy-ieee802.3-c22";
30 * Ethernet PHY needs 30ms to properly power up and some more
[all …]
|
| /freebsd/sys/contrib/openzfs/man/man4/ |
| H A D | zfs.4 | 9 .\" usr/src/OPENSOLARIS.LICENSE or https://opensource.org/licenses/CDDL-1.0.
31 .Bl -tag -width Ds
79 dnode slots allocated in a single operation as a power of 2.
102 Turbo L2ARC warm-up.
179 Percent of ARC size allowed for L2ARC-only headers.
252 before moving on to the next top-level vdev.
255 Enable metaslab group biasing based on their vdevs' over- or under-utilization
271 Default BRT ZAP data block size as a power of 2. Note that changing this after
276 Default BRT ZAP indirect block size as a power of 2. Note that changing this
281 Default DDT ZAP data block size as a power of 2. Note that changing this after
[all …]
|
| /freebsd/sys/contrib/device-tree/Bindings/cpu/ |
| H A D | idle-states.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/cpu/idle-states.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
11 - Anup Patel <anup@brainfault.org>
15 1 - Introduction
18 ARM and RISC-V systems contain HW capable of managing power consumption
19 dynamically, where cores can be put in different low-power states (ranging
20 from simple wfi to power gating) according to OS PM policies. The CPU states
[all …]
|
| /freebsd/sys/contrib/device-tree/src/arm64/rockchip/ |
| H A D | rk3399-gru-chromebook.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Google Gru-Chromebook shared properties
8 #include "rk3399-gru.dtsi"
11 pp900_ap: pp900-ap {
12 compatible = "regulator-fixed";
13 regulator-name = "pp900_ap";
16 regulator-always-o
[all...] |
| /freebsd/sys/dev/pccbb/ |
| H A D | pccbb.c | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 2000-2001 Jonathan Chen All rights reserved.
5 * Copyright (c) 2002-2004 M. Warner Losh <imp@FreeBSD.org>
30 /*-
65 * http://www-s.ti.com/cgi-bin/sc/generic2.cgi?family=PCI+CARDBUS+CONTROLLERS
137 "Starting ioport for 16-bit cards");
142 "Starting ioport for 32-bit cards");
178 SLIST_FOREACH(rle, &sc->rl, link) { in cbb_remove_res()
179 if (rle->res == res) { in cbb_remove_res()
[all …]
|
| /freebsd/sys/contrib/device-tree/src/arm64/mediatek/ |
| H A D | mt8195-cherry.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/spmi/spmi.h>
25 backlight_lcd0: backlight-lcd0 {
26 compatible = "pwm-backlight";
27 brightness-levels = <0 1023>;
28 default-brightness-level = <576>;
29 enable-gpios = <&pio 82 GPIO_ACTIVE_HIGH>;
30 num-interpolated-steps = <1023>;
32 power-supply = <&ppvar_sys>;
[all …]
|
| H A D | mt8186-corsola-krabby.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 /dts-v1/;
7 #include "mt8186-corsola.dtsi"
8 #include <dt-bindings/gpio/gpio.h>
17 remote-endpoint = <&ps8640_in>;
21 clock-frequency = <400000>;
23 edp-bridge@8 {
26 pinctrl-names = "default";
27 pinctrl-0 = <&ps8640_pins>;
28 powerdown-gpios = <&pio 96 GPIO_ACTIVE_LOW>;
[all …]
|
| H A D | mt8186-corsola.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
5 /dts-v1/;
7 #include <dt-bindings/pinctrl/mt8186-pinfunc.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/input/gpio-keys.h>
11 #include <dt-bindings/regulator/mediatek,mt6397-regulator.h>
26 stdout-path = "serial0:115200n8";
35 backlight_lcd0: backlight-lcd0 {
36 compatible = "pwm-backlight";
[all …]
|