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/linux/Documentation/devicetree/bindings/soc/tegra/
H A Dnvidia,tegra20-pmc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/tegra/nvidia,tegra20-pmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Tegra Power Management Controller (PMC)
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jonathan Hunter <jonathanh@nvidia.com>
16 - nvidia,tegra20-pmc
17 - nvidia,tegra30-pmc
18 - nvidia,tegra114-pmc
[all …]
/linux/arch/arm/mach-omap2/
H A Domap-mpuss-lowpower.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * OMAP MPUSS low power code
8 * OMAP4430 MPUSS mainly consists of dual Cortex-A9 with per-CPU
11 * CPU0, CPU1 and MPUSS each have there own power domain and
12 * hence multiple low power combinations of MPUSS are possible.
17 * to the Cortex-A9 processor must be asserted by the external
18 * power controller.
21 * below modes are supported from power gain vs latency point of view.
24 * ----------------------------------------------
26 * ON(Inactive) OFF ON(Inactive)
[all …]
H A Dsleep44xx.S1 /* SPDX-License-Identifier: GPL-2.0-only */
13 #include <asm/hardware/cache-l2x0.h>
15 #include "omap-secure.h"
19 #include "omap4-sar-layout.h"
21 .arch armv7-a
42 * power down sequence. Calling WFI effectively changes the CPU
43 * power domains states to the desired target power state.
46 * 0 - No context lost
47 * 1 - CPUx L1 and logic lost: MPUSS CSWR
48 * 2 - CPUx L1 and logic lost + GIC lost: MPUSS OSWR
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/linux/Documentation/networking/device_drivers/wifi/intel/
H A Dipw2100.rst1 .. SPDX-License-Identifier: GPL-2.0
10 - Intel(R) PRO/Wireless 2100 Network Connection
12 Copyright |copy| 2003-2006, Intel Corporation
16 :Version: git-1.1.5
23 2. Release git-1.1.5 Current Features
28 7. Power Management
51 parameters include, without limitation, RF power, spectrum usage,
64 the warranty and/or issues arising from regulatory non-compliance, and
69 modules, and accordingly, condition system-level regulatory approval
72 non-compliant.
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/linux/arch/arm/boot/dts/microchip/
H A Dat91sam9g25-gardena-smart-gateway.dts1 // SPDX-License-Identifier: GPL-2.0+
8 /dts-v1/;
12 #include <dt-bindings/input/input.h>
16 compatible = "gardena,smart-gateway-at91sam", "atmel,at91sam9g25", "atmel,at91sam9x5",
23 gpio-keys {
24 compatible = "gpio-keys";
38 compatible = "gpio-leds";
40 led-power-blue {
41 label = "smartgw:power:blue";
43 default-state = "off";
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/linux/Documentation/devicetree/bindings/power/reset/
H A Dgpio-poweroff.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/power/reset/gpio-poweroff.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: GPIO controlled power off
10 - Sebastian Reichel <sre@kernel.org>
13 System power off support via a GPIO line. When a shutdown is
15 from inactive to active. After a delay (active-delay-ms) it
17 delay (inactive-delay-ms) it is configured as active again.
18 Finally the operating system assumes the power off failed if
[all …]
H A Dqnap-poweroff.txt1 * QNAP Power Off
3 QNAP NAS devices have a microcontroller controlling the main power
6 microcontroller to turn the power off.
12 - compatible: Should be "qnap,power-off" or "synology,power-off"
14 - reg: Address and length of the register set for UART1
15 - clocks: tclk clock
H A Dqcom,pshold.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/power/reset/qcom,pshold.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm SoC restart and power off
10 - Bjorn Andersson <bjorn.andersson@linaro.org>
13 A power supply hold (ps-hold) bit is set to power the Qualcomm chipsets.
14 Clearing that bit allows us to restart/power off. The difference between
15 power off and restart is determined by unique power manager IC settings.
25 - compatible
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/linux/include/linux/
H A Dlcd.h1 /* SPDX-License-Identifier: GPL-2.0 */
5 * Copyright (C) 2003,2004 Hewlett-Packard Company
22 * lcd_device->ops_lock is an internal backlight lock protecting the ops
38 /* The maximum value for contrast (read-only) */
43 /* Get the LCD panel power status (0: full on, 1..3: controller
44 power on, flat panel power off, 4: full off), see FB_BLANK_XXX */
46 /* Enable or disable power to the LCD (0: on; 4: off, see FB_BLANK_XXX) */
47 int (*set_power)(struct lcd_device *, int power);
48 /* Get the current contrast setting (0-max_contrast) */
93 /* on or off to lcd panel. if 'enable' is 0 then
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/linux/Documentation/driver-api/usb/
H A Dpower-management.rst1 .. _usb-power-management:
3 Power Management for USB
7 :Date: Last-updated: February 2014
11 ---------
12 * What is Power Management?
17 * Changing the default idle-delay time
19 * The driver interface for Power Management
25 * USB Port Power Control
26 * User Interface for Port Power Control
27 * Suggested Userspace Port Power Policy
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/linux/arch/mips/include/asm/
H A Dmips-cpc.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
8 # error Please include asm/mips-cps.h rather than asm/mips-cpc.h
21 * mips_cpc_default_phys_base - retrieve the default physical base address of
24 * Returns the default physical base address of the Cluster Power Controller
26 * implemented per-platform.
31 * mips_cpc_probe - probe for a Cluster Power Controller
33 * Attempt to detect the presence of a Cluster Power Controller. Returns 0 if
34 * a CPC is successfully detected, else -errno.
41 return -ENODEV; in mips_cpc_probe()
46 * mips_cpc_present - determine whether a Cluster Power Controller is present
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/linux/drivers/pci/hotplug/
H A Dpciehp_ctrl.c1 // SPDX-License-Identifier: GPL-2.0+
6 * Copyright (C) 2001 Greg Kroah-Hartman (greg@kroah.com)
8 * Copyright (C) 2003-2004 Intel Corporation
36 * Turn off slot, turn on attention indicator, turn off power in set_slot_off()
43 * After turning power off, we must wait for at least 1 second in set_slot_off()
44 * before taking any action that relies on power having been in set_slot_off()
55 * board_added - Called after a board has been added to the system.
58 * Turns power on for the board.
64 struct pci_bus *parent = ctrl->pcie->port->subordinate; in board_added()
67 /* Power on slot */ in board_added()
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H A Dshpchp_ctrl.c1 // SPDX-License-Identifier: GPL-2.0+
6 * Copyright (C) 2001 Greg Kroah-Hartman (greg@kroah.com)
8 * Copyright (C) 2003-2004 Intel Corporation
34 return -ENOMEM; in queue_interrupt_event()
36 info->event_type = event_type; in queue_interrupt_event()
37 info->p_slot = p_slot; in queue_interrupt_event()
38 INIT_WORK(&info->work, interrupt_event_handler); in queue_interrupt_event()
40 queue_work(p_slot->wq, &info->work); in queue_interrupt_event()
53 p_slot = shpchp_find_slot(ctrl, hp_slot + ctrl->slot_device_offset); in shpchp_handle_attention_button()
54 shpchp_get_adapter_status(p_slot, &p_slot->presence_save); in shpchp_handle_attention_button()
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/linux/drivers/video/backlight/
H A Dcorgi_lcd.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (c) 2004-2006 Richard Purdie
43 #define POWER1_GVSS_ON 0x02 /* GVSS(-8V) Power Supply ON */
44 #define POWER1_VDD_ON 0x04 /* VDD(8V),SVSS(-4V) Power Supply ON */
46 #define POWER1_VW_OFF 0x00 /* VW Supply FET OFF */
47 #define POWER1_GVSS_OFF 0x00 /* GVSS(-8V) Power Supply OFF */
48 #define POWER1_VDD_OFF 0x00 /* VDD(8V),SVSS(-4V) Power Supply OFF */
52 #define POWER0_DAC_ON 0x04 /* DAC Power Supply ON */
53 #define POWER0_COM_ON 0x08 /* COM Power Supply ON */
54 #define POWER0_VCC5_ON 0x10 /* VCC5 Power Supply ON */
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H A Dltv350qv.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Power control for Samsung LTV350QV Quarter VGA LCD Panel
22 int power; member
27 * The power-on and power-off sequences are taken from the
28 * LTV350QV-F04 data sheet from Samsung. The register definitions are
49 lcd->buffer[0] = LTV_OPC_INDEX; in ltv350qv_write_reg()
50 lcd->buffer[1] = 0x00; in ltv350qv_write_reg()
51 lcd->buffer[2] = reg & 0x7f; in ltv350qv_write_reg()
52 index_xfer.tx_buf = lcd->buffer; in ltv350qv_write_reg()
56 lcd->buffer[4] = LTV_OPC_DATA; in ltv350qv_write_reg()
[all …]
/linux/include/linux/mfd/
H A Ddb8500-prcmu.h1 /* SPDX-License-Identifier: GPL-2.0-only */
4 * Copyright (C) ST-Ericsson SA 2010
27 /* This portion previously known as <mach/prcmu-fw-defs_v1.h> */
30 * enum state - ON/OFF state definition
31 * @OFF: State is ON
32 * @ON: State is OFF
36 OFF = 0x0, enumerator
41 * enum ret_state - general purpose On/Off/Retention states
51 * enum clk_arm - ARM Cortex A9 clock schemes
67 * enum clk_gen - GEN#0/GEN#1 clock schemes
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/linux/arch/arm/mach-orion5x/
H A Dnet2big-setup.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * arch/arm/mach-orion5x/net2big-setup.c
23 #include <asm/mach-types.h>
25 #include <plat/orion-gpio.h>
46 * TODO: Check write support on flash MX29LV400CBTC-70G
68 + NET2BIG_NOR_BOOT_SIZE - 1,
72 .name = "physmap-flash",
126 err = gpio_request(NET2BIG_GPIO_SATA0_POWER, "SATA0 power status"); in net2big_sata_power_init()
133 pr_err("net2big: failed to setup SATA0 power GPIO\n"); in net2big_sata_power_init()
137 err = gpio_request(NET2BIG_GPIO_SATA1_POWER, "SATA1 power status"); in net2big_sata_power_init()
[all …]
H A Ddns323-setup.c2 * arch/arm/mach-orion5x/dns323-setup.c
33 #include <asm/mach-types.h>
37 #include <plat/orion-gpio.h>
80 * Check for devices with hard-wired IRQs. in dns323_pci_map_irq()
83 if (irq != -1) in dns323_pci_map_irq()
86 return -1; in dns323_pci_map_irq()
112 * Layout as used by D-Link:
113 * 0x00000000-0x00010000 : "MTD1"
114 * 0x00010000-0x00020000 : "MTD2"
115 * 0x00020000-0x001a0000 : "Linux Kernel"
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/linux/Documentation/devicetree/bindings/regulator/
H A Dsamsung,s5m8767.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Samsung S5M8767 Power Management IC regulators
10 - Krzysztof Kozlowski <krzk@kernel.org>
13 This is a part of device tree bindings for S2M and S5M family of Power
23 "^LDO([1-9]|1[0-9]|2[0-8])$":
36 Describes the different operating modes of the LDO's with power mode
38 0 - always off mode
39 1 - on in normal mode
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/linux/drivers/pmdomain/
H A Dgovernor.c1 // SPDX-License-Identifier: GPL-2.0
3 * drivers/base/power/domain_governor.c - Governors for device PM domains.
21 if (dev->power.subsys_data && dev->power.subsys_data->domain_data) { in dev_update_qos_constraint()
22 struct gpd_timing_data *td = dev_gpd_data(dev)->td; in dev_update_qos_constraint()
25 * Only take suspend-time QoS constraints of devices into in dev_update_qos_constraint()
31 constraint_ns = td ? td->effective_constraint_ns : in dev_update_qos_constraint()
51 * default_suspend_ok - Default PM domain governor routine to suspend devices.
58 struct gpd_timing_data *td = dev_gpd_data(dev)->td; in default_suspend_ok()
64 spin_lock_irqsave(&dev->power.lock, flags); in default_suspend_ok()
66 if (!td->constraint_changed) { in default_suspend_ok()
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/linux/Documentation/userspace-api/
H A Ddcdbas.rst10 management interrupts and host control actions (system power cycle or
11 power off after OS shutdown) on certain Dell systems.
29 buffer must reside in 32-bit address space, and the physical address of the
55 to perform a power cycle or power off of the system after the OS has finished
60 to schedule the driver to perform a power cycle or power off host control
67 Dell OpenManage performs the following steps to execute a power cycle or
68 power off host control action using this driver:
82 perform a power cycle or power off host control action:
/linux/drivers/power/reset/
H A Dqnap-poweroff.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * QNAP Turbo NAS Board power off. Can also be used on Synology devices.
39 { .compatible = "qnap,power-off",
42 { .compatible = "synology,power-off",
55 const unsigned divisor = ((tclk + (8 * cfg->baud)) / (16 * cfg->baud)); in qnap_power_off()
57 pr_err("%s: triggering power-off...\n", __func__); in qnap_power_off()
68 /* send the power-off command to PIC */ in qnap_power_off()
69 writel(cfg->cmd, UART1_REG(TX)); in qnap_power_off()
74 struct device_node *np = pdev->dev.of_node; in qnap_power_off_probe()
80 cfg = match->data; in qnap_power_off_probe()
[all …]
/linux/arch/arm/mach-sa1100/include/mach/
H A Dassabet.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * arch/arm/mach-sa1100/include/mach/assabet.h
8 * Only include this file from SA1100-specific files.
26 #define ASSABET_SCR_INIT -1
41 #define ASSABET_BCR_CF_PWR (1<<0) /* Compact Flash Power (1 = 3.3v, 0 = off) */
42 #define ASSABET_BCR_CF_RST (1<<1) /* Compact Flash Reset (1 = power up reset) */
46 #define ASSABET_BCR_IRDA_MD0 (1<<4) /* Range/Power select */
47 #define ASSABET_BCR_IRDA_MD1 (1<<5) /* Range/Power select */
49 #define ASSABET_BCR_CF_BUS_OFF (1<<7) /* Compact Flash bus (0 = on, 1 = off (float)) */
50 #define ASSABET_BCR_AUDIO_ON (1<<8) /* Audio power on */
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/linux/Documentation/ABI/testing/
H A Dsysfs-class-power-twl40309 "auto" draw power as appropriate for detected
10 power source and battery status.
11 "off" do not draw any power.
14 current is available and doesn't switch off
17 This is useful for unstable power sources
19 be taken that battery is not over-charged.
30 "auto" draw power as appropriate for detected
31 power source and battery status.
32 "off" do not draw any power.
/linux/Documentation/devicetree/bindings/mfd/
H A Dsamsung,s2mps11.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Samsung S2MPS11/13/14/15 and S2MPU02 Power Management IC
10 - Krzysztof Kozlowski <krzk@kernel.org>
13 This is a part of device tree bindings for S2M and S5M family of Power
16 The Samsung S2MPS11/13/14/15 and S2MPU02 is a family of Power Management IC
18 sub-blocks.
23 - samsung,s2mpg10-pmic
24 - samsung,s2mps11-pmic
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