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/linux/Documentation/driver-api/serial/
H A Ddriver.rst2 Low Level Serial API
10 The reference implementation is contained within amba-pl011.c.
14 Low Level Serial Hardware Driver
15 --------------------------------
17 The low level serial hardware driver is responsible for supplying port
19 by uart_ops) to the core serial driver. The low level driver is also
20 responsible for handling interrupts for the port, and providing any
25 ---------------
37 -------
39 It is the responsibility of the low level hardware driver to perform the
[all …]
/linux/drivers/s390/scsi/
H A Dzfcp_dbf.c1 // SPDX-License-Identifier: GPL-2.0
31 "log level for each debug feature area "
36 return sizeof(struct zfcp_dbf_pay) + offset - ZFCP_DBF_PAY_MAX_REC; in zfcp_dbf_plen()
43 struct zfcp_dbf_pay *pl = &dbf->pay_buf; in zfcp_dbf_pl_write()
46 spin_lock(&dbf->pay_lock); in zfcp_dbf_pl_write()
48 pl->fsf_req_id = req_id; in zfcp_dbf_pl_write()
49 memcpy(pl->area, area, ZFCP_DBF_TAG_LEN); in zfcp_dbf_pl_write()
53 (u16) (length - offset)); in zfcp_dbf_pl_write()
54 memcpy(pl->data, data + offset, rec_length); in zfcp_dbf_pl_write()
55 debug_event(dbf->pay, 1, pl, zfcp_dbf_plen(rec_length)); in zfcp_dbf_pl_write()
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/linux/drivers/net/fddi/skfp/
H A Dsmtdef.c1 // SPDX-License-Identifier: GPL-2.0-or-later
22 #define OEM_USER_DATA "SK-NET FDDI V2.0 Userdata"
67 void smt_reset_defaults(struct s_smc *smc, int level);
68 static void smt_init_mib(struct s_smc *smc, int level);
74 void smt_reset_defaults(struct s_smc *smc, int level) in smt_reset_defaults() argument
81 smt_init_mib(smc,level) ; in smt_reset_defaults()
83 smc->os.smc_version = SMC_VERSION ; in smt_reset_defaults()
86 smc->sm.last_tok_time[i] = smt_boot_time ; in smt_reset_defaults()
87 smt = &smc->s ; in smt_reset_defaults()
88 smt->attach_s = 0 ; in smt_reset_defaults()
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/linux/Documentation/devicetree/bindings/phy/
H A Dphy-stm32-usbphyc.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/phy/phy-stm32-usbphyc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 The STM32 USBPHYC block contains a dual port High Speed UTMI+ PHY and a UTMI
13 selects either OTG or HOST controller for the second PHY port. It also sets
19 |_ PHY port#1 _________________ HOST controller
22 |_ PHY port#2 ----| |________________
27 - Amelie Delaunay <amelie.delaunay@foss.st.com>
31 const: st,stm32mp1-usbphyc
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/linux/drivers/tty/serial/
H A Dsc16is7xx.c1 // SPDX-License-Identifier: GPL-2.0+
3 * SC16IS7xx tty serial driver - common code
50 #define SC16IS7XX_TXLVL_REG (0x08) /* TX FIFO level */
51 #define SC16IS7XX_RXLVL_REG (0x09) /* RX FIFO level */
53 * - only on 75x/76x
56 * - only on 75x/76x
59 * - only on 75x/76x
62 * - only on 75x/76x
68 #define SC16IS7XX_TLR_REG (0x07) /* Trigger level */
90 /* IER register bits - write only if (EFR[4] == 1) */
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/linux/Documentation/netlabel/
H A Ddraft-ietf-cipso-ipsecurity-01.txt12 This Internet Draft provides the high level specification for a Commercial
27 Please check the I-D abstract listing contained in each Internet Draft
46 mandatory access controls and multi-level security. These systems are
88 once in a datagram. All multi-octet fields in the option are defined to be
91 +----------+----------+------//------+-----------//---------+
93 +----------+----------+------//------+-----------//---------+
124 corresponding ASCII representations. Non-related groups of systems may
138 number 1 to represent that same security level. The DOI identifier is used
148 actual security information to be passed. All multi-octet fields in a tag
171 +----------+----------+--------//--------+
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/linux/Documentation/arch/m68k/
H A Dbuddha-driver.rst8 ------------------------------------------------------------------------
11 Buddha-part of the Catweasel Zorro-II version
21 product number: 0 (42 for Catweasel Z-II)
23 Rom-vector: $1000
25 The card should be a Z-II board, size 64K, not for freemem
26 list, Rom-Vektor is valid, no second Autoconfig-board on the
30 as the Amiga Kickstart does: The lower nibble of the 8-Bit
36 otherwise your chance is only 1:16 to find the board :-).
38 The local memory-map is even active when mapped to $e8:
41 $0-$7e Autokonfig-space, see Z-II docs.
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/linux/tools/testing/vsock/
H A Dutil.c1 // SPDX-License-Identifier: GPL-2.0-only
62 /* Parse a port in string representation */
65 return parse_uint(str, "port"); in parse_port()
75 if (epollfd == -1) { in vsock_wait_remote_close()
82 if (epoll_ctl(epollfd, EPOLL_CTL_ADD, fd, &ev) == -1) { in vsock_wait_remote_close()
88 if (nfds == -1) { in vsock_wait_remote_close()
140 /* Create socket <type>, bind to <cid, port>
143 vsock_bind_try(unsigned int cid,unsigned int port,int type) vsock_bind_try() argument
169 vsock_bind(unsigned int cid,unsigned int port,int type) vsock_bind() argument
182 vsock_connect_fd(int fd,unsigned int cid,unsigned int port) vsock_connect_fd() argument
202 vsock_bind_connect(unsigned int cid,unsigned int port,unsigned int bind_port,int type) vsock_bind_connect() argument
217 vsock_connect(unsigned int cid,unsigned int port,int type) vsock_connect() argument
240 vsock_stream_connect(unsigned int cid,unsigned int port) vsock_stream_connect() argument
245 vsock_seqpacket_connect(unsigned int cid,unsigned int port) vsock_seqpacket_connect() argument
251 vsock_listen(unsigned int cid,unsigned int port,int type) vsock_listen() argument
268 vsock_accept(unsigned int cid,unsigned int port,struct sockaddr_vm * clientaddrp,int type) vsock_accept() argument
312 vsock_stream_accept(unsigned int cid,unsigned int port,struct sockaddr_vm * clientaddrp) vsock_stream_accept() argument
318 vsock_stream_listen(unsigned int cid,unsigned int port) vsock_stream_listen() argument
323 vsock_seqpacket_accept(unsigned int cid,unsigned int port,struct sockaddr_vm * clientaddrp) vsock_seqpacket_accept() argument
720 setsockopt_ull_check(int fd,int level,int optname,unsigned long long val,char const * errmsg) setsockopt_ull_check() argument
763 setsockopt_int_check(int fd,int level,int optname,int val,char const * errmsg) setsockopt_int_check() argument
812 setsockopt_timeval_check(int fd,int level,int optname,struct timeval val,char const * errmsg) setsockopt_timeval_check() argument
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H A Dutil.h1 /* SPDX-License-Identifier: GPL-2.0-only */
21 TRANSPORT_##name = BIT(__COUNTER__ - TRANSPORT_COUNTER_BASE),
23 TRANSPORT_NUM = __COUNTER__ - TRANSPORT_COUNTER_BASE,
60 const char *name; /* human-readable name */
74 int vsock_connect_fd(int fd, unsigned int cid, unsigned int port);
75 int vsock_connect(unsigned int cid, unsigned int port, int type);
76 int vsock_accept(unsigned int cid, unsigned int port,
78 int vsock_stream_connect(unsigned int cid, unsigned int port);
79 int vsock_bind_try(unsigned int cid, unsigned int port, int type);
80 int vsock_bind(unsigned int cid, unsigned int port, int type);
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/linux/drivers/parisc/
H A Deisa.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * eisa.c - provide support for EISA adapters in PA-RISC machines
10 * Wax ASIC also includes a PS/2 and RS-232 controller, but those are
15 * -----
17 * set an edge trigger level. This may be done on the palo command line
38 #include <asm/parisc-device.h>
67 /* Port ops */
69 static inline unsigned long eisa_permute(unsigned short port) in eisa_permute() argument
71 if (port & 0x300) { in eisa_permute()
72 return 0xfc000000 | ((port & 0xfc00) >> 6) in eisa_permute()
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/linux/Documentation/scsi/
H A Dadvansys.rst1 .. SPDX-License-Identifier: GPL-2.0
8 RISC-based, Bus-Mastering, Fast (10 Mhz) and Ultra (20 Mhz) Narrow
9 (8-bit transfer) SCSI Host Adapters for the ISA, EISA, VL, and PCI
10 buses and RISC-based, Bus-Mastering, Ultra (20 Mhz) Wide (16-bit
21 - ABP-480 - Bus-Master CardBus (16 CDB)
24 - ABP510/5150 - Bus-Master ISA (240 CDB)
25 - ABP5140 - Bus-Master ISA PnP (16 CDB)
26 - ABP5142 - Bus-Master ISA PnP with floppy (16 CDB)
27 - ABP902/3902 - Bus-Master PCI (16 CDB)
28 - ABP3905 - Bus-Master PCI (16 CDB)
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/linux/arch/arm64/boot/dts/synaptics/
H A Dberlin4ct.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 interrupt-parent = <&gic>;
13 #address-cells = <2>;
14 #size-cells = <2>;
21 compatible = "arm,psci-1.0", "arm,psci-0.2";
26 #address-cells = <1>;
27 #size-cells = <0>;
30 compatible = "arm,cortex-a53";
33 enable-method = "psci";
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/linux/drivers/xen/events/
H A Devents_2l.c1 // SPDX-License-Identifier: GPL-2.0
3 * Xen event channels (2-level ABI)
19 #include <xen/xen-ops.h>
62 static void evtchn_2l_clear_pending(evtchn_port_t port) in evtchn_2l_clear_pending() argument
65 sync_clear_bit(port, BM(&s->evtchn_pending[0])); in evtchn_2l_clear_pending()
68 static void evtchn_2l_set_pending(evtchn_port_t port) in evtchn_2l_set_pending() argument
71 sync_set_bit(port, BM(&s->evtchn_pending[0])); in evtchn_2l_set_pending()
74 static bool evtchn_2l_is_pending(evtchn_port_t port) in evtchn_2l_is_pending() argument
77 return sync_test_bit(port, BM(&s->evtchn_pending[0])); in evtchn_2l_is_pending()
80 static void evtchn_2l_mask(evtchn_port_t port) in evtchn_2l_mask() argument
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/linux/sound/pci/lx6464es/
H A Dlx_core.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 /* -*- linux-c -*- *
5 * low-level interface
21 /* low-level register access */
59 unsigned long lx_dsp_reg_read(struct lx6464es *chip, int port);
60 void lx_dsp_reg_write(struct lx6464es *chip, int port, unsigned data);
82 unsigned long lx_plx_reg_read(struct lx6464es *chip, int port);
83 void lx_plx_reg_write(struct lx6464es *chip, int port, u32 data);
96 /* low-level dsp access */
104 /* low-level pipe handling */
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/linux/Documentation/admin-guide/
H A Dthunderbolt.rst1 .. SPDX-License-Identifier: GPL-2.0
7 some differences at the register level among other things. Connection
18 software connection manager in Linux also advertises security level
21 the software connection manager only supports ``user`` security level and
25 -----------------------------------
27 should be a userspace tool that handles all the low-level details, keeps
31 found in Documentation/ABI/testing/sysfs-bus-thunderbolt.
35 ``/etc/udev/rules.d/99-local.rules``::
44 security levels available. Intel Titan Ridge added one more security level
51 treated as another security level (nopcie).
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/linux/drivers/pci/pcie/
H A Daer.c1 // SPDX-License-Identifier: GPL-2.0
3 * Implement the AER root port service driver. The driver registers an IRQ
4 * handler. When a root port triggers an AER interrupt, the IRQ handler
5 * collects Root Port status and schedules work.
11 * (C) Copyright 2009 Hewlett-Packard Development Company, L.P.
22 #include <linux/pci-acpi.h>
40 #define aer_printk(level, pdev, fmt, arg...) \ argument
41 dev_printk(level, &(pdev)->dev, fmt, ##arg)
54 struct pci_dev *rpd; /* Root Port device */
65 * at its link partner (e.g. Root Port) because the errors will be
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/linux/Documentation/devicetree/bindings/net/
H A Dmarvell-orion-net.txt9 first level describes the ethernet controller itself and the second level
10 describes up to 3 ethernet port nodes within that controller. The reason for
11 the multiple levels is that the port registers are interleaved within a single
12 set of controller registers. Each port node describes port-specific properties.
16 only one port associated. Multiple ports are implemented as multiple single-port
23 - #address-cells: shall be 1.
24 - #size-cells: shall be 0.
25 - compatible: shall be one of "marvell,orion-eth", "marvell,kirkwood-eth".
26 - reg: address and length of the controller registers.
29 - clocks: phandle reference to the controller clock.
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/linux/sound/pcmcia/vx/
H A Dvxp_ops.c1 // SPDX-License-Identifier: GPL-2.0-or-later
41 return chip->port + vxp_reg_offset[reg]; in vxp_reg_addr()
45 * snd_vx_inb - read a byte from the register
54 * snd_vx_outb - write a byte on the register
73 * vx_check_magic - chec
358 long port = vxp_reg_addr(chip, VX_DMA); vxp_dma_write() local
398 long port = vxp_reg_addr(chip, VX_DMA); vxp_dma_read() local
485 vx_compute_mic_level(int level) vx_compute_mic_level() argument
501 vx_set_mic_level(struct vx_core * chip,int level) vx_set_mic_level() argument
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/linux/arch/arm64/boot/dts/hisilicon/
H A Dhip06.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 compatible = "hisilicon,hip06-d03";
12 interrupt-parent = <&gic>;
13 #address-cells = <2>;
14 #size-cells = <2>;
17 compatible = "arm,psci-0.2";
22 #address-cells = <1>;
23 #size-cells = <0>;
25 cpu-map {
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/linux/include/linux/
H A Dparport.h61 /* IBM PC-style virtual registers. */
86 size_t (*epp_write_data) (struct parport *port, const void *buf,
88 size_t (*epp_read_data) (struct parport *port, void *buf, size_t len,
90 size_t (*epp_write_addr) (struct parport *port, const void *buf,
92 size_t (*epp_read_addr) (struct parport *port, void *buf, size_t len,
95 size_t (*ecp_write_data) (struct parport *port, const void *buf,
97 size_t (*ecp_read_data) (struct parport *port, void *buf, size_t len,
99 size_t (*ecp_write_addr) (struct parport *port, const void *buf,
102 size_t (*compat_write_data) (struct parport *port, const void *buf,
104 size_t (*nibble_read_data) (struct parport *port, void *buf,
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/linux/drivers/staging/vc04_services/bcm2835-camera/
H A Dbcm2835-camera.h1 /* SPDX-License-Identifier: GPL-2.0 */
81 /* H264 level */
83 /* JPEG Q-factor */
95 struct vchiq_mmal_port *port; /* port being used for capture */ member
96 /* camera port being used for capture */
120 #define v4l2_dump_pix_format(level, debug, dev, pix_fmt, desc) \ argument
122 v4l2_dbg(level, debug, dev, \
125 (pix_fmt)->width, (pix_fmt)->height, (pix_fmt)->field, \
126 (pix_fmt)->pixelformat, (pix_fmt)->bytesperline, \
127 (pix_fmt)->sizeimage, (pix_fmt)->colorspace, (pix_fmt)->priv); \
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/linux/arch/m68k/coldfire/
H A Dintc-2.c2 * intc-2.c
5 * interrupt controllers with 63 interrupt sources, organized as 56 fully-
6 * programmable + 7 fixed-level interrupt sources. This includes the 523x
10 * The external 7 fixed interrupts are part of the Edge Port unit of these
11 * ColdFire parts. They can be configured as level or edge triggered.
13 * (C) Copyright 2009-2011, Greg Ungerer <gerg@snapgear.com>
33 #define MCFSIM_ICR_LEVEL(l) ((l)<<3) /* Level l intr */
37 * The EDGE Port interrupts are the fixed 7 external interrupts.
41 #define EINT1 65 /* EDGE Port interrupt 1 */
42 #define EINT7 71 /* EDGE Port interrupt 7 */
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/linux/tools/usb/usbip/
H A DREADME2 # README for usbip-utils
5 # 2005-2008 Takahiro Hirofuchi
15 - usbip-vhci
19 - usbip-host (stub driver)
23 - usbip-vudc
27 - usbip-utils
32 - USB/IP device drivers
35 - libudev >= 2.0
38 - libwrap0-dev
41 - gcc >= 4.0
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/linux/drivers/net/wwan/
H A Drpmsg_wwan_ctrl.c1 // SPDX-License-Identifier: GPL-2.0-only
11 /* Lower level is a rpmsg dev, upper level is a wwan port */
25 return -ENOMEM; in rpmsg_wwan_ctrl_callback()
28 wwan_port_rx(rpwwan->wwan_port, skb); in rpmsg_wwan_ctrl_callback()
32 static int rpmsg_wwan_ctrl_start(struct wwan_port *port) in rpmsg_wwan_ctrl_start() argument
34 struct rpmsg_wwan_dev *rpwwan = wwan_port_get_drvdata(port); in rpmsg_wwan_ctrl_start()
36 .src = rpwwan->rpdev->src, in rpmsg_wwan_ctrl_start()
40 strscpy(chinfo.name, rpwwan->rpdev->id.name, sizeof(chinfo.name)); in rpmsg_wwan_ctrl_start()
41 rpwwan->ept = rpmsg_create_ept(rpwwan->rpdev, rpmsg_wwan_ctrl_callback, in rpmsg_wwan_ctrl_start()
43 if (!rpwwan->ept) in rpmsg_wwan_ctrl_start()
[all …]
/linux/arch/arm64/boot/dts/qcom/
H A Dsdm660.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
13 compatible = "qcom,adreno-512.0", "qcom,adreno";
14 operating-points-v2 = <&gpu_sdm660_opp_table>;
16 gpu_sdm660_opp_table: opp-table {
17 compatible = "operating-points-v2";
23 * at the same opp-level
25 opp-750000000 {
26 opp-hz = /bits/ 64 <750000000>;
27 opp-level = <RPM_SMD_LEVEL_TURBO>;
28 opp-peak-kBps = <5412000>;
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