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Searched +full:polarfire +full:- +full:soc +full:- +full:sys +full:- +full:controller (Results 1 – 4 of 4) sorted by relevance

/freebsd/sys/contrib/device-tree/Bindings/soc/microchip/
H A Dmicrochip,polarfire-soc-sys-controller.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: "http://devicetree.org/schemas/soc/microchip/microchip,polarfire-soc-sys-controller.yaml#"
5 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
7 title: Microchip PolarFire SoC (MPFS) MSS (microprocessor subsystem) system controller
10 - Conor Dooley <conor.dooley@microchip.com>
13 The PolarFire SoC system controller is communicated with via a mailbox.
22 const: microchip,polarfire-soc-sys-controller
25 - compatible
26 - mboxes
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H A Dmicrochip,mpfs-sys-controller.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/microchi
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/freebsd/sys/contrib/device-tree/src/riscv/microchip/
H A Dmicrochip-mpfs.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
2 /* Copyright (c) 2020-2021 Microchip Technology Inc */
4 /dts-v1/;
5 #include "dt-bindings/clock/microchip,mpfs-clock.h"
6 #include "microchip-mpfs-fabric.dtsi"
9 #address-cells = <2>;
10 #size-cells = <2>;
11 model = "Microchip PolarFire SoC";
15 #address-cells = <1>;
16 #size-cells = <0>;
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H A Dmpfs.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
2 /* Copyright (c) 2020-2021 Microchip Technology Inc */
4 /dts-v1/;
5 #include "dt-bindings/clock/microchip,mpfs-clock.h"
8 #address-cells = <2>;
9 #size-cells = <2>;
10 model = "Microchip PolarFire SoC";
14 #address-cells = <1>;
15 #size-cells = <0>;
16 timebase-frequency = <1000000>;
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