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Searched full:pm_ctrl (Results 1 – 9 of 9) sorted by relevance

/linux/arch/arm/mach-omap2/
H A Dprm44xx.c48 .pm_ctrl = OMAP4_PRM_IO_PMCTRL_OFFSET,
61 unsigned long pm_ctrl; member
317 omap4_prcm_irq_setup.pm_ctrl); in omap44xx_prm_reconfigure_io_chain()
320 omap4_prcm_irq_setup.pm_ctrl) & in omap44xx_prm_reconfigure_io_chain()
330 omap4_prcm_irq_setup.pm_ctrl); in omap44xx_prm_reconfigure_io_chain()
333 omap4_prcm_irq_setup.pm_ctrl) & in omap44xx_prm_reconfigure_io_chain()
361 omap4_prcm_irq_setup.pm_ctrl); in omap44xx_prm_enable_io_wakeup()
754 omap_prm_context.pm_ctrl = in prm_save_context()
756 omap4_prcm_irq_setup.pm_ctrl); in prm_save_context()
765 omap4_prm_write_inst_reg(omap_prm_context.pm_ctrl, in prm_restore_context()
[all …]
H A Dprcm-common.h478 * @pm_ctrl: PRM register offset for the PRM_IO_PMCTRL register
501 u16 pm_ctrl; member
/linux/drivers/net/usb/
H A Dsmsc95xx.c275 ret = smsc95xx_read_reg(dev, PM_CTRL, &val); in smsc95xx_mdiobus_reset()
281 ret = smsc95xx_write_reg(dev, PM_CTRL, val); in smsc95xx_mdiobus_reset()
1374 ret = smsc95xx_read_reg(dev, PM_CTRL, &val); in smsc95xx_enter_suspend0()
1381 ret = smsc95xx_write_reg(dev, PM_CTRL, val); in smsc95xx_enter_suspend0()
1393 ret = smsc95xx_write_reg(dev, PM_CTRL, val); in smsc95xx_enter_suspend0()
1397 /* read back PM_CTRL */ in smsc95xx_enter_suspend0()
1398 ret = smsc95xx_read_reg(dev, PM_CTRL, &val); in smsc95xx_enter_suspend0()
1430 ret = smsc95xx_read_reg(dev, PM_CTRL, &val); in smsc95xx_enter_suspend1()
1437 ret = smsc95xx_write_reg(dev, PM_CTRL, val); in smsc95xx_enter_suspend1()
1445 ret = smsc95xx_write_reg(dev, PM_CTRL, val); in smsc95xx_enter_suspend1()
[all …]
H A Dsmsc95xx.h97 #define PM_CTRL (0x20) macro
/linux/drivers/soc/bcm/brcmstb/pm/
H A Dpm.h33 /* PM_CTRL bitfield (Method #0) */
42 /* PM_CTRL bitfield (Method #1) */
/linux/drivers/ps3/
H A Dps3-lpm.c511 u32 pm_ctrl; in ps3_get_ctr_size() local
519 pm_ctrl = ps3_read_pm(cpu, pm_control); in ps3_get_ctr_size()
520 return (pm_ctrl & CBE_PM_16BIT_CTR(phys_ctr)) ? 16 : 32; in ps3_get_ctr_size()
530 u32 pm_ctrl; in ps3_set_ctr_size() local
538 pm_ctrl = ps3_read_pm(cpu, pm_control); in ps3_set_ctr_size()
542 pm_ctrl |= CBE_PM_16BIT_CTR(phys_ctr); in ps3_set_ctr_size()
543 ps3_write_pm(cpu, pm_control, pm_ctrl); in ps3_set_ctr_size()
547 pm_ctrl &= ~CBE_PM_16BIT_CTR(phys_ctr); in ps3_set_ctr_size()
548 ps3_write_pm(cpu, pm_control, pm_ctrl); in ps3_set_ctr_size()
/linux/Documentation/devicetree/bindings/arm/hisilicon/controller/
H A Dhi6220-domain-ctrl.yaml63 pm_ctrl@f7032000 {
/linux/drivers/staging/media/ipu3/
H A Dipu3-css.c204 u32 pm_ctrl, state, val; in imgu_css_set_powerup() local
226 pm_ctrl = readl(base + IMGU_REG_PM_CTRL); in imgu_css_set_powerup()
229 dev_dbg(dev, "CSS pm_ctrl 0x%x state 0x%x (power %s)\n", in imgu_css_set_powerup()
230 pm_ctrl, state, str_down_up(state & IMGU_STATE_POWER_DOWN)); in imgu_css_set_powerup()
250 pm_ctrl = readl(base + IMGU_REG_PM_CTRL); in imgu_css_set_powerup()
251 val = pm_ctrl & ~(IMGU_PM_CTRL_CSS_PWRDN | IMGU_PM_CTRL_RST_AT_EOF); in imgu_css_set_powerup()
279 val = readl(base + IMGU_REG_PM_CTRL); /* get pm_ctrl */ in imgu_css_set_powerup()
281 val |= pm_ctrl & (IMGU_PM_CTRL_CSS_PWRDN | IMGU_PM_CTRL_RST_AT_EOF); in imgu_css_set_powerup()
/linux/drivers/net/wireless/realtek/rtlwifi/rtl8192se/
H A Dreg.h272 #define PM_CTRL 0x0502 macro