/freebsd/sys/contrib/device-tree/Bindings/power/ |
H A D | power_domain.txt | 1 * Generic PM domains 3 System on chip designs are often divided into multiple PM domains that can be 7 This device tree binding can be used to bind PM domain consumer devices with 8 their PM domains provided by PM domain providers. A PM domain provider can be 9 represented by any node in the device tree and can provide one or more PM 10 domains. A consumer node can refer to the provider by a phandle and a set of 11 phandle arguments (so called PM domain specifiers) of length specified by the 12 #power-domain-cells property in the PM domain provider node. 14 ==PM domain providers== 16 See power-domain.yaml. [all …]
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H A D | power-domain.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/power/power-domain.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Generic PM domains [all...] |
H A D | renesas,sysc-rmobile.txt | 1 DT bindings for the Renesas R-Mobile System Controller 5 The R-Mobile System Controller provides the following functions: 6 - Boot mode management, 7 - Reset generation, 8 - Power management. 11 - compatible: Should be "renesas,sysc-<soctype>", "renesas,sysc-rmobile" as 14 - "renesas,sysc-r8a73a4" (R-Mobile APE6) 15 - "renesas,sysc-r8a7740" (R-Mobile A1) 16 - "renesas,sysc-sh73a0" (SH-Mobile AG5) 17 - reg: Two address start and address range blocks for the device: [all …]
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H A D | renesas,sysc-rmobile.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/power/renesas,sysc-rmobil [all...] |
H A D | xlnx,zynqmp-genpd.txt | 1 ----------------------------------------------------------- 2 Device Tree Bindings for the Xilinx Zynq MPSoC PM domains 3 ----------------------------------------------------------- 4 The binding for zynqmp-power-controller follow the common 5 generic PM domain binding[1]. 7 [1] Documentation/devicetree/bindings/power/power-domain.yaml 9 == Zynq MPSoC Generic PM Domain Node == 12 - Below property should be in zynqmp-firmware node. 13 - #power-domain-cells: Number of cells in a PM domain specifier. Must be 1. 16 include/dt-bindings/power/xlnx-zynqmp-power.h. [all …]
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H A D | rockchip,power-controller.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/power/rockchip,power-controller.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Rockchip Power Domains 10 - Elaine Zhang <zhangqing@rock-chips.com> 11 - Heiko Stuebner <heiko@sntech.de> 14 Rockchip processors include support for multiple power domains 18 Power domains contained within power-controller node are 20 Documentation/devicetree/bindings/power/power-domain.yaml. [all …]
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H A D | mediatek,power-controller.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/power/mediatek,power-controlle [all...] |
/freebsd/sys/contrib/device-tree/Bindings/arm/ux500/ |
H A D | power_domain.txt | 1 * ST-Ericsson UX500 PM Domains 3 UX500 supports multiple PM domains which are used to gate power to one or 6 The implementation of PM domains for UX500 are based upon the generic PM domain 9 ==PM domain providers== 12 - compatible: Must be "stericsson,ux500-pm-domains". 13 - #power-domain-cells : Number of cells in a power domain specifier, must be 1. 17 compatible = "stericsson,ux500-pm-domains"; 18 #power-domain-cells = <1>; 21 ==PM domain consumers== 24 - power-domains: A phandle and PM domain specifier. Below are the list of [all …]
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/freebsd/sys/contrib/device-tree/Bindings/bus/ |
H A D | simple-pm-bus.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/bus/simple-pm-bus.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Simple Power-Managed Bus 10 - Geert Uytterhoeven <geert+renesas@glider.be> 13 A Simple Power-Managed Bus is a transparent bus that doesn't need a real 16 However, its bus controller is part of a PM domain, or under the control 17 of a functional clock. Hence, the bus controller's PM domain and/or 19 on-SoC or externally) to function. [all …]
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H A D | fsl,imx8qxp-pixel-link-msi-bus.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/bus/fsl,imx8qxp-pixe [all...] |
H A D | renesas,bsc.yaml | 2 --- 4 $schema: http://devicetree.org/meta-schemas/core.yaml# 9 - Geert Uytterhoeven <geert+renesas@glider.be> 18 While the BSC is a fairly simple memory-mapped bus, it may be part of a 19 PM domain, and may have a gateable functional clock. Before a device 20 connected to the BSC can be accessed, the PM domain containing the BSC 24 The bindings for the BSC extend the bindings for "simple-pm-bus". 27 - $ref: simple-pm-bus.yaml# 32 - enum: 33 - renesas,bsc-r8a73a4 # R-Mobile APE6 (r8a73a4) [all …]
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/freebsd/sys/contrib/device-tree/Bindings/soc/ti/ |
H A D | sci-pm-domain.txt | 1 Texas Instruments TI-SCI Generic Power Domain 2 --------------------------------------------- 7 controller happens through a protocol known as TI-SCI [1]. 11 PM Domain Node 13 The PM domain node represents the global PM domain managed by the PMMC, which 14 in this case is the implementation as documented by the generic PM domain 15 bindings in Documentation/devicetree/bindings/power/power-domain.yaml. Because 20 -------------------- 21 - compatible: should be "ti,sci-pm-domain" 22 - #power-domain-cells: Can be one of the following: [all …]
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/freebsd/sys/contrib/device-tree/Bindings/soc/bcm/ |
H A D | brcm,bcm2835-pm.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/soc/bcm/brcm,bcm2835-pm.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: BCM2835 PM (Power domains, watchdog) 10 The PM block controls power domains and some reset lines, and includes a 14 - Nicolas Saenz Julienne <nsaenz@kernel.org> 17 - $ref: /schemas/watchdog/watchdog.yaml# 22 - enum: 23 - brcm,bcm2835-pm [all …]
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H A D | brcm,bcm2835-pm.txt | 1 BCM2835 PM (Power domains, watchdog) 3 The PM block controls power domains and some reset lines, and includes 4 a watchdog timer. This binding supersedes the brcm,bcm2835-pm-wdt 5 binding which covered some of PM's register range and functionality. 9 - compatible: Should be "brcm,bcm2835-pm" 10 - reg: Specifies base physical address and size of the two 11 register ranges ("PM" and "ASYNC_BRIDGE" in that 13 - clocks: a) v3d: The V3D clock from CPRMAN 17 - #reset-cells: Should be 1. This property follows the reset controller 19 - #power-domain-cells: Should be 1. This property follows the power domain [all …]
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/freebsd/sys/contrib/device-tree/Bindings/arm/ |
H A D | arm,scpi.txt | 2 ---------------------------------------------------------- 10 - compatible : should be 12 * "arm,scpi-pre-1.0" : For implementations complying to all 14 - mboxes: List of phandle and mailbox channel specifiers 17 - shmem : List of phandle pointing to the shared memory(SHM) area between the 27 ------------------------------------------------------------ 34 - compatible : should be "arm,scpi-clocks" 36 protocol much be listed as sub-nodes under this node. 38 Sub-nodes 41 - compatible : shall include one of the following [all …]
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/freebsd/sys/contrib/device-tree/Bindings/dma/ |
H A D | ti-edma.txt | 8 ------------------------------------------------------------------------------ 12 -------------------- 13 - compatible: Should be: 14 - "ti,edma3-tpcc" for the channel controller(s) on OMAP, 16 - "ti,k2g-edma3-tpcc", "ti,edma3-tpcc" for the 18 - #dma-cells: Should be set to <2>. The first number is the DMA request 20 - reg: Memory map of eDMA CC 21 - reg-names: "edma3_cc" 22 - interrupts: Interrupt lines for CCINT, MPERR and CCERRINT. 23 - interrupt-names: "edma3_ccint", "edma3_mperr" and "edma3_ccerrint" [all …]
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/freebsd/sys/contrib/device-tree/Bindings/usb/ |
H A D | ti,am62-usb.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/usb/ti,am62-usb.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: TI's AM62 wrapper module for the Synopsys USBSS-DRD controller 10 - Aswath Govindraju <a-govindraju@ti.com> 14 const: ti,am62-usb 19 - description: USB CFG register space 20 - description: USB PHY2 register space 24 power-domains: [all …]
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H A D | ti,j721e-usb.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/usb/ti,j721e-usb.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: TI wrapper module for the Cadence USBSS-DRD controller 10 - Roger Quadros <rogerq@kernel.org> 15 - const: ti,j721e-usb 16 - items: 17 - const: ti,am64-usb 18 - const: ti,j721e-usb [all …]
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/freebsd/sys/contrib/device-tree/Bindings/ata/ |
H A D | ahci-mtk.txt | 4 - compatible : Must be "mediatek,<chip>-ahci", "mediatek,mtk-ahci". 5 When using "mediatek,mtk-ahci" compatible strings, you 7 - "mediatek,mt7622-ahci" 8 - reg : Physical base addresses and length of register sets. 9 - interrupts : Interrupt associated with the SATA device. 10 - interrupt-names : Associated name must be: "hostc". 11 - clocks : A list of phandle and clock specifier pairs, one for each 12 entry in clock-names. 13 - clock-names : Associated names must be: "ahb", "axi", "asic", "rbc", "pm". 14 - phys : A phandle and PHY specifier pair for the PHY port. [all …]
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H A D | mediatek,mtk-ahci.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/ata/mediatek,mtk-ahci.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Ryder Lee <ryder.lee@mediatek.com> 13 - $ref: ahci-common.yaml# 18 - enum: 19 - mediatek,mt7622-ahci 20 - const: mediatek,mtk-ahci 28 interrupt-names: [all …]
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/freebsd/sys/contrib/device-tree/src/arm/ti/omap/ |
H A D | omap4-l4.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 compatible = "ti,omap4-l4-cfg", "simple-pm-bus"; 4 power-domains [all...] |
H A D | am33xx-l4.dtsi | 2 compatible = "ti,am33xx-l4-wkup", "simple-pm-bus"; 3 power-domains = <&prm_wkup>; 5 clock-names = "fck"; 10 reg-names = "ap", "la", "ia0", "ia1"; 11 #address-cell [all...] |
H A D | omap5-l4.dtsi | 2 compatible = "ti,omap5-l4-cfg", "simple-pm-bus"; 3 power-domains = <&prm_core>; 5 clock-names = "fck"; 9 reg-names = "ap", "la", "ia0"; 10 #address-cells = <1>; 11 #size-cells = <1>; 21 compatible = "simple-pm-bus"; 22 #address-cells = <1>; 23 #size-cells = <1>; 55 target-module@2000 { /* 0x4a002000, ap 3 44.0 */ [all …]
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H A D | am437x-l4.dtsi | 2 compatible = "ti,am4-l4-wkup", "simple-pm-bus"; 3 power-domains = <&prm_wkup>; 5 clock-names = "fck"; 10 reg-names = "ap", "la", "ia0", "ia1"; 11 #address-cell [all...] |
/freebsd/sys/contrib/device-tree/Bindings/clock/ |
H A D | qcom,sm8350-videocc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/clock/qcom,sm8350-videocc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Konrad Dybcio <konradybcio@kernel.org> 14 domains on Qualcomm SoCs. 17 include/dt-bindings/clock/qcom,videocc-sm8350.h 18 include/dt-bindings/reset/qcom,videocc-sm8350.h 23 - qcom,sc8280xp-videocc 24 - qcom,sm8350-videocc [all …]
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