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/linux/Documentation/devicetree/bindings/clock/
H A Dstarfive,jh7110-syscrg.yaml63 - const: pll2_out
77 - const: pll2_out
115 "pll0_out", "pll1_out", "pll2_out";
/linux/drivers/clk/starfive/
H A Dclk-starfive-jh7110-sys.c461 pllclk = clk_get(priv->dev, "pll2_out"); in jh7110_syscrg_probe()
464 priv->pll[2] = devm_clk_hw_register_fixed_factor(priv->dev, "pll2_out", in jh7110_syscrg_probe()
515 parents[i].fw_name = "pll2_out"; in jh7110_syscrg_probe()
H A Dclk-starfive-jh7110-pll.c265 JH7110_PLL(JH7110_PLLCLK_PLL2_OUT, "pll2_out", jh7110_pll2_presets),
H A Dclk-starfive-jh7100.c310 priv->pll[2] = devm_clk_hw_register_fixed_factor(priv->dev, "pll2_out", in clk_starfive_jh7100_probe()
/linux/arch/riscv/boot/dts/starfive/
H A Djh7110.dtsi894 "pll0_out", "pll1_out", "pll2_out";