Home
last modified time | relevance | path

Searched full:pll1_out (Results 1 – 5 of 5) sorted by relevance

/linux/Documentation/devicetree/bindings/clock/
H A Dstarfive,jh7110-syscrg.yaml62 - const: pll1_out
76 - const: pll1_out
115 "pll0_out", "pll1_out", "pll2_out";
/linux/drivers/clk/starfive/
H A Dclk-starfive-jh7110-sys.c449 pllclk = clk_get(priv->dev, "pll1_out"); in jh7110_syscrg_probe()
452 priv->pll[1] = devm_clk_hw_register_fixed_factor(priv->dev, "pll1_out", in jh7110_syscrg_probe()
513 parents[i].fw_name = "pll1_out"; in jh7110_syscrg_probe()
H A Dclk-starfive-jh7110-pll.c264 JH7110_PLL(JH7110_PLLCLK_PLL1_OUT, "pll1_out", jh7110_pll1_presets),
H A Dclk-starfive-jh7100.c305 priv->pll[1] = devm_clk_hw_register_fixed_factor(priv->dev, "pll1_out", in clk_starfive_jh7100_probe()
/linux/arch/riscv/boot/dts/starfive/
H A Djh7110.dtsi894 "pll0_out", "pll1_out", "pll2_out";