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/linux/Documentation/sound/designs/
H A Dtimestamping.rst7 - Trigger_tstamp is the system time snapshot taken when the .trigger
11 estimate with a delay. In the latter two cases, the low-level driver
17 - tstamp is the current system timestamp updated during the last
19 The difference (tstamp - trigger_tstamp) defines the elapsed time.
29 - ``avail`` reports how much can be written in the ring buffer
30 - ``delay`` reports the time it will take to hear a new sample after all
43 ascii-art, this could be represented as follows (for the playback
47 --------------------------------------------------------------> time
50 analog link dma app FullBuffer
53 |< codec delay >|<--hw delay-->|<queued samples>|<---avail->|
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/linux/Documentation/devicetree/bindings/sound/
H A Dfsl,ssi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shengjiu Wang <shengjiu.wang@nxp.com>
13 Notes on fsl,playback-dma and fsl,capture-dma
14 On SOCs that have an SSI, specific DMA channels are hard-wired for playback
15 and capture. On the MPC8610, for example, SSI1 must use DMA channel 0 for
16 playback and DMA channel 1 for capture. SSI2 must use DMA channel 2 for
17 playback and DMA channel 3 for capture. The developer can choose which
18 DMA controller to use, but the channels themselves are hard-wired. The
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H A Dsamsung-i2s.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/sound/samsung-i2s.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzk@kernel.org>
11 - Sylwester Nawrocki <s.nawrocki@samsung.com>
14 - $ref: dai-common.yaml#
19 samsung,s3c6410-i2s: for 8/16/24bit stereo I2S.
21 samsung,s5pv210-i2s: for 8/16/24bit multichannel (5.1) I2S with
25 samsung,exynos5420-i2s: for 8/16/24bit multichannel (5.1) I2S for
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H A Drockchip-i2s.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/sound/rockchip-i2s.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 The I2S bus (Inter-IC sound bus) is a serial link for digital
14 - Heiko Stuebner <heiko@sntech.de>
17 - $ref: dai-common.yaml#
22 - const: rockchip,rk3066-i2s
23 - items:
24 - enum:
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/linux/sound/soc/amd/
H A Dacp.h1 /* SPDX-License-Identifier: GPL-2.0 */
13 /* Playback and Capture Offset for Stoney */
26 * playback and SRAM Bank 2 for capture where as in case of BT I2S
27 * Instance, Stoney uses SRAM Bank 3 for playback & SRAM Bank 4 will
29 * 1, 2, 3, 4 will be used for playback & SRAM Banks 5, 6, 7, 8 will be used
73 /* Playback DMA channels */
77 /* Capture DMA channels */
81 /* Playback DMA Channels for I2S BT instance */
85 /* Capture DMA Channels for I2S BT Instance */
89 /* Playback DMA channels for I2S MICSP instance */
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/linux/sound/soc/fsl/
H A Dmpc5200_dma.c1 // SPDX-License-Identifier: GPL-2.0-only
3 // Freescale MPC5200 PSC DMA
10 #include <linux/dma-mapping.h>
33 struct mpc52xx_psc __iomem *regs = psc_dma->psc_regs; in psc_dma_status_irq()
36 isr = in_be16(&regs->mpc52xx_psc_isr); in psc_dma_status_irq()
38 /* Playback underrun error */ in psc_dma_status_irq()
39 if (psc_dma->playback.active && (isr & MPC52xx_PSC_IMR_TXEMP)) in psc_dma_status_irq()
40 psc_dma->stats.underrun_count++; in psc_dma_status_irq()
43 if (psc_dma->capture.active && (isr & MPC52xx_PSC_IMR_ORERR)) in psc_dma_status_irq()
44 psc_dma->stats.overrun_count++; in psc_dma_status_irq()
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H A Dmpc5200_dma.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Freescale MPC5200 Audio DMA driver
12 * psc_ac97_stream - Data specific to a single stream (playback or capture)
17 * @period_end: physical address of end of DMA region
18 * @period_next_pt: physical address of next DMA buffer to enqueue
19 * @period_bytes: size of DMA period in bytes
39 * psc_dma - Private driver data
48 * @playback: Playback stream context data
65 /* per-stream data */
66 struct psc_dma_stream playback; member
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H A Dp1022_rdk.c1 // SPDX-License-Identifier: GPL-2.0
10 // to be enabled, because they control the clock. So for playback, for
28 /* P1022-specific PMUXCR and DMUXCR bit definitions */
37 #define CCSR_GUTS_DMUXCR_PAD 1 /* DMA controller/channel set to pad */
38 #define CCSR_GUTS_DMUXCR_SSI 2 /* DMA controller/channel set to SSI */
44 * channel on each DMA controller. Rather than have a bunch of repetitive
49 * co: The DMA controller (0 or 1)
50 * ch: The channel on the DMA controller (0, 1, 2, or 3)
56 unsigned int shift = 16 + (8 * (1 - co) + 2 * (3 - ch)); in guts_set_dmuxcr()
58 clrsetbits_be32(&guts->dmuxcr, 3 << shift, device << shift); in guts_set_dmuxcr()
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H A Dp1022_ds.c1 // SPDX-License-Identifier: GPL-2.0
21 /* P1022-specific PMUXCR and DMUXCR bit definitions */
30 #define CCSR_GUTS_DMUXCR_PAD 1 /* DMA controller/channel set to pad */
31 #define CCSR_GUTS_DMUXCR_SSI 2 /* DMA controller/channel set to SSI */
37 * channel on each DMA controller. Rather than have a bunch of repetitive
42 * co: The DMA controller (0 or 1)
43 * ch: The channel on the DMA controller (0, 1, 2, or 3)
49 unsigned int shift = 16 + (8 * (1 - co) + 2 * (3 - ch)); in guts_set_dmuxcr()
51 clrsetbits_be32(&guts->dmuxcr, 3 << shift, device << shift); in guts_set_dmuxcr()
58 * machine_data: machine-specific ASoC device data
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H A Dfsl_dma.c1 // SPDX-License-Identifier: GPL-2.0
3 // Freescale DMA ALSA SoC PCM driver
7 // Copyright 2007-2010 Freescale Semiconductor, Inc.
9 // This driver implements ASoC support for the Elo DMA controller, which is
10 // the DMA controller on Freescale 83xx, 85xx, and 86xx SOCs. In ALSA terms,
11 // the PCM driver is what handles the DMA buffer.
16 #include <linux/dma-mapping.h>
39 * The formats that the DMA controller supports, which is anything
67 * The number of DMA links to use. Two is the bare minimum, but if you
72 /** fsl_dma_private: p-substream DMA data
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H A Dfsl_rpmsg.c1 // SPDX-License-Identifier: GPL-2.0+
2 // Copyright 2018-2021 NXP
5 #include <linux/clk-provider.h>
18 #include "imx-pcm.h"
44 struct clk *p = rpmsg->mclk, *pll = NULL, *npll = NULL; in fsl_rpmsg_hw_params()
49 while (p && rpmsg->pll8k && rpmsg->pll11k) { in fsl_rpmsg_hw_params()
52 if (clk_is_match(pp, rpmsg->pll8k) || in fsl_rpmsg_hw_params()
53 clk_is_match(pp, rpmsg->pll11k)) { in fsl_rpmsg_hw_params()
62 npll = (do_div(rate, 8000) ? rpmsg->pll11k : rpmsg->pll8k); in fsl_rpmsg_hw_params()
66 dev_warn(dai->dev, "failed to set parent %s: %d\n", in fsl_rpmsg_hw_params()
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/linux/sound/pci/emu10k1/
H A Dp16v.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Copyright (c) by James Courtier-Dutton <James@superbug.demon.co.uk>
11 /* Audigy2 P16V pointer-offset register set, accessed through the PTR2 and DATA2 registers …
19 #define PLAYBACK_LIST_ADDR 0x00 /* Base DMA address of a list of pointers to each period/size */
20 /* One list entry: 4 bytes for DMA address,
25 #define PLAYBACK_LIST_SIZE 0x01 /* Size of list in bytes << 16. E.g. 8 periods -> 0x00380000 */
28 #define PLAYBACK_DMA_ADDR 0x04 /* Playback DMA address */
29 #define PLAYBACK_PERIOD_SIZE 0x05 /* Playback period size. win2000 uses 0x04000000 */
30 #define PLAYBACK_POINTER 0x06 /* Playback period pointer. Used with PLAYBACK_LIST_PTR to determine…
31 #define PLAYBACK_FIFO_END_ADDRESS 0x07 /* Playback FIFO end address */
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/linux/sound/ppc/
H A Dpmac.c1 // SPDX-License-Identifier: GPL-2.0-or-later
17 #include <linux/dma-mapping.h>
54 rec->space = dma_alloc_coherent(&chip->pdev->dev, rsize, in snd_pmac_dbdma_alloc()
55 &rec->dma_base, GFP_KERNEL); in snd_pmac_dbdma_alloc()
56 if (rec->space == NULL) in snd_pmac_dbdma_alloc()
57 return -ENOMEM; in snd_pmac_dbdma_alloc()
58 rec->size = size; in snd_pmac_dbdma_alloc()
59 memset(rec->space, 0, rsize); in snd_pmac_dbdma_alloc()
60 rec->cmds = (void __iomem *)DBDMA_ALIGN(rec->space); in snd_pmac_dbdma_alloc()
61 rec->addr = rec->dma_base + (unsigned long)((char *)rec->cmds - (char *)rec->space); in snd_pmac_dbdma_alloc()
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/linux/Documentation/devicetree/bindings/dma/
H A Dloongson,ls1b-apbdma.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dma/loongson,ls1b-apbdma.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Loongson-1 APB DMA Controller
10 - Keguang Zhang <keguang.zhang@gmail.com>
13 Loongson-1 APB DMA controller provides 3 independent channels for
14 peripherals such as NAND, audio playback and capture.
19 - const: loongson,ls1b-apbdma
20 - items:
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/linux/sound/pci/
H A Dazt3328.h1 /* SPDX-License-Identifier: GPL-2.0 */
5 /* "PU" == "power-up value", as tested on PCI168 PCI rev. 10
15 * from 0x00 (playback codec), from 0x20 (recording codec)
27 * 0x0001 is the only bit that's able to start the DMA counter */
29 /* 0x0002 *temporarily* set during DMA stopping. hmm
30 * both 0x0002 and 0x0004 set in playback setup. */
52 /* start address of 1st DMA transfer area, PU:0x00000000 */
54 /* start address of 2nd DMA transfer area, PU:0x00000000 */
56 /* both lengths of DMA transfer areas, PU:0x00000000
59 #define IDX_IO_CODEC_DMA_CURRPOS 0x10 /* current DMA position, PU:0x00000000 */
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H A Dsis7019.h1 /* SPDX-License-Identifier: GPL-2.0-only */
8 * Copyright (C) 2004-2007, David Dillow
10 * Inspired by the Trident 4D-WaveDX/NX driver.
48 /* DMA Control Register */
59 /* Playback Channel Start Registers */
63 /* Playback Channel Stop Registers */
73 /* Playback Interrupt Status Registers */
80 /* AC97 AC-link Playback Source Register */
90 /* AC97 AC-link Command Register */
104 /* AC97 AC-link Semaphore Register */
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H A Dcs4281.c1 // SPDX-License-Identifier: GPL-2.0-or-later
29 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
57 #define BA0_HISR_DMAI (1<<18) /* DMA interrupt (half or end) */
59 #define BA0_HISR_DMA(c) (1<<(8+(c))) /* DMA channel interrupt */
77 #define BA0_HDSR0 0x00f0 /* Host DMA Engine 0 Status Register */
78 #define BA0_HDSR1 0x00f4 /* Host DMA Engine 1 Status Register */
79 #define BA0_HDSR2 0x00f8 /* Host DMA Engine 2 Status Register */
80 #define BA0_HDSR3 0x00fc /* Host DMA Engine 3 Status Register */
84 #define BA0_HDSR_DHTC (1<<17) /* DMA Half Terminal Count */
85 #define BA0_HDSR_DTC (1<<16) /* DMA Terminal Count */
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/linux/sound/pci/ice1712/
H A Denvy24ht.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
39 #define ICEREG1724(ice, x) ((ice)->port + VT1724_REG_##x)
49 #define VT1724_REG_SYS_CFG 0x04 /* byte - system configuration PCI60 on Envy24*/
60 #define VT1724_CFG_AC97_PACKED 0x01 /* split or packed mode - AC'97 */
65 #define VT1724_CFG_I2S_RESMASK 0x30 /* resolution mask, 16,18,20,24-bit */
106 bit3 - during reset used for Eeprom power-on strapping
114 * Professional multi-track direct control registers
117 #define ICEMT1724(ice, x) ((ice)->profi_port + VT1724_MT_##x)
119 #define VT1724_MT_IRQ 0x00 /* byte - interrupt mask */
124 #define VT1724_MULTI_FIFO_ERR 0x08 /* DMA FIFO underrun/overrun. */
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/linux/sound/isa/
H A Dsc6000.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Driver for Gallant SC-6000 soundcard. This card is also known as
5 * These cards use CompuMedia ASC-9308 chip + AD1848 codec.
6 * SC-6600 and SC-7000 cards are also supported. They are based on
7 * CompuMedia ASC-9408 chip and CS4231 codec.
19 #include <asm/dma.h>
30 MODULE_DESCRIPTION("Gallant SC-6000");
33 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
42 static int dma[SNDRV_CARDS] = SNDRV_DEFAULT_DMA; /* 0, 1, 3 */ variable
43 static bool joystick[SNDRV_CARDS] = { [0 ... (SNDRV_CARDS-1)] = false };
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H A Dcmi8330.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Driver for C-Media's CMI8330 and CMI8329 soundcards.
19 * modprobe -a snd-cmi8330 sbport=0x220 sbirq=5 sbdma8=1
23 * that recording and playback can be done through the same device.
25 * and playback to the SB16 codec. This allows for full-duplex mode
27 * The utilities in alsa-utils are aware of both devices, so passing
52 MODULE_DESCRIPTION("C-Media CMI8330/CMI8329");
59 static bool isapnp[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 1};
87 module_param_hw_array(sbdma8, int, dma, NULL, 0444);
89 module_param_hw_array(sbdma16, int, dma, NULL, 0444);
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H A Dcmi8328.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Driver for C-Media CMI8328-based soundcards, such as AudioExcel AV500
7 * - CMI8328 - main chip (SB Pro emulation, gameport, OPL3, MPU401, CD-ROM)
8 * - CS4231A - WSS codec
9 * - Dream SAM9233+GMS950400+RAM+ROM: Wavetable MIDI, connected to MPU401
16 #include <asm/dma.h>
26 MODULE_AUTHOR("Ondrej Zary <linux@rainbow-software.org>");
27 MODULE_DESCRIPTION("C-Media CMI8328");
38 static int index[CMI8328_MAX] = {[0 ... (CMI8328_MAX-1)] = -1};
39 static char *id[CMI8328_MAX] = {[0 ... (CMI8328_MAX-1)] = NULL};
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/linux/sound/isa/gus/
H A Dgusextreme.c1 // SPDX-License-Identifier: GPL-2.0-or-later
13 #include <asm/dma.h>
31 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
35 static long gf1_port[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS) - 1] = -1}; /* 0x210,0x220,0x230,0x240,0x…
36 static long mpu_port[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS) - 1] = -1}; /* 0x300,0x310,0x320 */
42 static int joystick_dac[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 29};
43 /* 0 to 31, (0.59V-4.52V or 0.389V-2.98V) */
44 static int channels[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 24};
45 static int pcm_channels[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 2};
58 MODULE_PARM_DESC(mpu_port, "MPU-401 port # for " CRD_NAME " driver.");
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H A Dgusmax.c1 // SPDX-License-Identifier: GPL-2.0-or-later
13 #include <asm/dma.h>
25 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
32 static int joystick_dac[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 29};
33 /* 0 to 31, (0.59V-4.52V or 0.389V-2.98V) */
34 static int channels[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 24};
35 static int pcm_channels[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 2};
47 module_param_hw_array(dma1, int, dma, NULL, 0444);
49 module_param_hw_array(dma2, int, dma, NULL, 0444);
52 MODULE_PARM_DESC(joystick_dac, "Joystick DAC level 0.59V-4.52V or 0.389V-2.98V for GUS MAX driver."…
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/linux/sound/usb/misc/
H A Dua101.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Edirol UA-101/UA-1000 driver
19 MODULE_DESCRIPTION("Edirol UA-101/1000 driver");
32 * This magic value optimizes memory usage efficiency for the UA-101's packet
55 __stringify(MIN_QUEUE_LENGTH)"-"__stringify(MAX_QUEUE_LENGTH));
92 /* FIFO to synchronize playback rate to capture rate */
119 dma_addr_t dma; member
121 } capture, playback; member
134 case -ENODEV: in usb_error_string()
136 case -ENOENT: in usb_error_string()
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/linux/sound/pci/ca0106/
H A Dca0106.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Copyright (c) 2004 James Courtier-Dutton <James@superbug.demon.co.uk>
15 * Use separate card based DMA buffer for periods table list.
24 …* Enable playback 48000 and 96000 rates. (Rates other that these do not work, even with "plug:f…
28 …* Correct interrupt timing. interrupt at end of period, instead of in the middle of a playback …
34 * playback periods_min=2, periods_max=8
36 * playback hw constraints require period_size = n * 64 bytes.
50 * Implement support for Line-in capture on SB Live 24bit.
73 #define IPR_MIDI_RX_B 0x00020000 /* MIDI UART-B Receive buffer non-empty */
74 #define IPR_MIDI_TX_B 0x00010000 /* MIDI UART-B Transmit buffer empty */
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