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/freebsd/sys/contrib/device-tree/Bindings/sound/
H A Dfsl,ssi.txt4 be programmed in AC97, I2S, left-justified, or right-justified modes.
7 - compatible: Compatible list, should contain one of the following
9 fsl,mpc8610-ssi
10 fsl,imx51-ssi
11 fsl,imx35-ssi
12 fsl,imx21-ssi
13 - cell-index: The SSI, <0> = SSI1, <1> = SSI2, and so on.
14 - reg: Offset and length of the register set for the device.
15 - interrupts: <a b> where a is the interrupt number and b is a
21 - fsl,fifo-depth: The number of elements in the transmit and receive FIFOs.
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H A Dfsl,ssi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shengjiu Wang <shengjiu.wang@nxp.com>
13 Notes on fsl,playback-dma and fsl,capture-dma
14 On SOCs that have an SSI, specific DMA channels are hard-wired for playback
15 and capture. On the MPC8610, for example, SSI1 must use DMA channel 0 for
16 playback and DMA channel 1 for capture. SSI2 must use DMA channel 2 for
17 playback and DMA channel 3 for capture. The developer can choose which
18 DMA controller to use, but the channels themselves are hard-wired. The
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H A Dsamsung-i2s.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/sound/samsung-i2s.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzk@kernel.org>
11 - Sylweste
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H A Drenesas,rsnd.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas R-Car Sound Driver
10 - Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
17 - items:
18 - enum:
19 - renesas,rcar_sound-r8a7778 # R-Car M1A
20 - renesas,rcar_sound-r8a7779 # R-Car H1
21 - const: renesas,rcar_sound-gen1
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H A Drockchip-i2s.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/sound/rockchip-i2s.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 The I2S bus (Inter-IC sound bus) is a serial link for digital
14 - Heiko Stuebner <heiko@sntech.de>
17 - $ref: dai-common.yaml#
22 - const: rockchip,rk3066-i2s
23 - items:
24 - enum:
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H A Ddavinci-mcasp-audio.txt4 - compatible :
5 "ti,dm646x-mcasp-audio" : for DM646x platforms
6 "ti,da830-mcasp-audio" : for both DA830 & DA850 platforms
7 "ti,am33xx-mcasp-audio" : for AM33xx platforms (AM33xx, AM43xx, TI81xx)
8 "ti,dra7-mcasp-audio" : for DRA7xx platforms
9 "ti,omap4-mcasp-audio" : for OMAP4
11 - reg : Should contain reg specifiers for the entries in the reg-names property.
12 - reg-names : Should contain:
16 - op-mode : I2S/DIT ops mode. 0 for I2S mode. 1 for DIT mode used for S/PDIF,
17 IEC60958-1, and AES-3 formats.
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H A Dst,stm32-sai.txt4 as I2S standards, LSB or MSB-justified, PCM/DSP, TDM, and AC'97.
5 The SAI contains two independent audio sub-blocks. Each sub-block has
9 - compatible: Should be "st,stm32f4-sai" or "st,stm32h7-sai"
10 - reg: Base address and size of SAI common register set.
11 - clocks: Must contain phandle and clock specifier pairs for each entry
12 in clock-names.
13 - clock-names: Must contain "pclk" "x8k" and "x11k"
15 Mandatory for "st,stm32h7-sai" compatible.
16 Not used for "st,stm32f4-sai" compatible.
19 - interrupts: cpu DAI interrupt line shared by SAI sub-blocks
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H A Drenesas,rsnd.txt1 Renesas R-Car sound
7 Renesas R-Car and RZ/G sound is constructed from below modules
11 - SRC : Sampling Rate Converter
12 - CMD
13 - CTU : Channel Transfer Unit
14 - MIX : Mixer
15 - DVC : Digital Volume and Mute Function
25 Multi channel is supported by Multi-SSI, or TDM-SSI.
27 Multi-SS
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H A Dqcom,lpass-cpu.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/qcom,lpass-cpu.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
11 - Rohit kumar <quic_rohkumar@quicinc.com>
14 Qualcomm Technologies Inc. SOC Low-Power Audio SubSystem (LPASS) that consist
16 is a module to configure Low-Power Audio Interface(LPAIF) core registers
22 - qcom,lpass-cpu
23 - qcom,apq8016-lpass-cpu
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H A Dadi,axi-i2s.txt1 ADI AXI-I2S controller
3 The core can be generated with transmit (playback), only receive
7 - compatible : Must be "adi,axi-i2s-1.00.a"
8 - reg : Must contain I2S core's registers location and length
9 - clocks : Pairs of phandle and specifier referencing the controller's clocks.
12 - clock-names : "axi" for the clock to the AXI interface, "ref" for the sample
14 - dmas: Pairs of phandle and specifier for the DMA channels that are used by
15 the core. The core expects two dma channels if both transmit and receive are
17 - dma-names : "tx" for the transmit channel, "rx" for the receive channel.
19 For more details on the 'dma', 'dma-names', 'clock' and 'clock-names' properties
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H A Dst,stm32-sai.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/st,stm32-sai.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Olivier Moysan <olivier.moysan@foss.st.com>
14 protocols as I2S standards, LSB or MSB-justified, PCM/DSP, TDM, and AC'97.
15 The SAI contains two independent audio sub-blocks. Each sub-block has
21 - st,stm32f4-sai
22 - st,stm32h7-sai
26 - description: Base address and size of SAI common register set.
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H A Dst,stm32-i2s.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/st,stm32-i2s.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Olivier Moysan <olivier.moysan@foss.st.com>
17 - $ref: dai-common.yaml#
22 - st,stm32h7-i2s
24 "#sound-dai-cells":
32 - description: clock feeding the peripheral bus interface.
33 - description: clock feeding the internal clock generator.
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H A Dst,sti-asoc-card.txt3 The sti ASoC Sound Card can be used, for all sti SoCs using internal sti-sas
8 Documentation/devicetree/bindings/sound/simple-card.yaml.
10 1) sti-uniperiph-dai: audio dai device.
11 ---------------------------------------
14 - compatible: "st,stih407-uni-player-hdmi", "st,stih407-uni-player-pcm-out",
15 "st,stih407-uni-player-dac", "st,stih407-uni-player-spdif",
16 "st,stih407-uni-reader-pcm_in", "st,stih407-uni-reader-hdmi",
18 - st,syscfg: phandle to boot-device system configuration registers
20 - clock-names: name of the clocks listed in clocks property in the same order
22 - reg: CPU DAI IP Base address and size entries, listed in same
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/freebsd/sys/dev/sound/pci/
H A Denvy24.h1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
29 /* -------------------------------------------------------------------- */
39 #define PCIR_DS 0x18 /* DMA Path Registers I/O Base Address */
40 #define PCIR_MT 0x1c /* Professional Multi-Track I/O Base Address */
44 #define PCIM_LAC_SBDMA0 0x0000 /* SB DMA Channel Select: 0 */
45 #define PCIM_LAC_SBDMA1 0x0040 /* SB DMA Channel Select: 1 */
46 #define PCIM_LAC_SBDMA3 0x00c0 /* SB DMA Channel Select: 3 */
48 #define PCIM_LAC_MPU401 0x0008 /* MPU-401 I/O enable */
60 #define PCIM_LCC_MPUBASE 0x0006 /* MPU-401 base 300h-330h */
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H A Denvy24ht.h1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
30 /* -------------------------------------------------------------------- */
37 #define ENVY24HT_PCIR_MT 0x14 /* Multi-Track I/O Base Address */
45 #define ENVY24HT_CCS_IMASK_PMT 0x10 /* Professional Multi-track */
65 #define ENVY24HT_CCSM_SCFG_MPU 0x20 /* 0(not implemented)/1(1) MPU-401 UART */
66 #define ENVY24HT_CCSM_SCFG_ADC 0x0c /* 1-2 stereo ADC connected, S/PDIF receiver connected */
67 #define ENVY24HT_CCSM_SCFG_DAC 0x03 /* 1-4 stereo DAC connected */
69 #define ENVY24HT_CCS_ACL 0x05 /* AC-Link Configuration Register */
70 #define ENVY24HT_CCSM_ACL_MTC 0x80 /* Multi-track converter type: 0:AC'97 1:I2S */
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H A Dhdsp-pcm.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 2012-2021 Ruslan Bukin <br@bsdpad.com>
5 * Copyright (c) 2023-2024 Florian Walpen <dev@submerge.ch>
31 * RME HDSP driver for FreeBSD (pcm-part).
130 return (slots & (~(slots - 1))); /* Extract first bit set. */ in hdsp_slot_first()
141 return (slots & (ends ^ (ends - 1))); in hdsp_slot_first_row()
150 --n; in hdsp_slot_first_n()
166 return (hdsp_slot_count(hdsp_slot_first(slots) - 1)); in hdsp_slot_offset()
177 preceding = slots & (hdsp_slot_first(subset) - 1); in hdsp_slot_channel_offset()
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H A Datiixp.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
33 * * 16bit playback / recording
34 * * 32bit native playback - yay!
54 * Takashi Iwai (ALSA snd-atiixp), for register definitions and some
79 #define ATI_IXP_BLK_ALIGN (~(ATI_IXP_BLK_MIN - 1))
138 bus_space_read_4((_sc)->st, (_sc)->sh, _reg)
140 bus_space_write_4((_sc)->st, (_sc)->sh, _reg, _val)
142 #define atiixp_lock(_sc) snd_mtxlock((_sc)->lock)
143 #define atiixp_unlock(_sc) snd_mtxunlock((_sc)->lock)
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H A Dcsapcm.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
9 * Copyright (c) 1996-1998 Crystal Semiconductor Corp.
45 /* Buffer size on dma transfer. Fixed for CS416x. */
59 int dma; member
65 bus_dma_tag_t parent_dmat; /* DMA tag */
80 /* -------------------------------------------------------------------- */
118 /* -------------------------------------------------------------------- */
125 old = csa->active; in csa_active()
126 csa->active += run; in csa_active()
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/freebsd/sys/contrib/device-tree/Bindings/dma/
H A Dloongson,ls1b-apbdma.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dma/loongson,ls1b-apbdma.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Loongson-1 APB DMA Controller
10 - Keguang Zhang <keguang.zhang@gmail.com>
13 Loongson-1 APB DMA controller provides 3 independent channels for
14 peripherals such as NAND, audio playback and capture.
19 - const: loongson,ls1b-apbdma
20 - items:
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/freebsd/sys/contrib/device-tree/src/arm/rockchip/
H A Drk3066a.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/pinctrl/rockchip.h>
9 #include <dt-bindings/clock/rk3066a-cru.h>
10 #include <dt-bindings/power/rk3066-power.h>
22 #address-cells = <1>;
23 #size-cells = <0>;
24 enable-method = "rockchip,rk3066-smp";
28 compatible = "arm,cortex-a9";
29 next-level-cache = <&L2>;
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/freebsd/sys/contrib/device-tree/src/arm/st/
H A Dstm32mp157c-phycore-stm32mp15-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) 2022-2023 Steffen Trumtrar <kernel@pengutronix.de>
4 * Copyright (C) Phytec GmbH 2019-2020 - All Rights Reserved
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-binding
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/freebsd/share/man/man4/
H A Dpcm.42 .\" Copyright (c) 2009-2011 Joel Dahl <joel@FreeBSD.org>
39 .Bd -ragged -offset indent
49 and provides PCM audio record and playback once it attaches.
60 driver are: multichannel audio, per-application
74 .Bl -bullet -compact
118 .Xr snd_uaudio 4 (auto-loaded on device plug)
145 .Bl -tag -widt
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H A Dsnd_hda.41 .\" Copyright (c) 2006-2008 Joel Dahl <joel@FreeBSD.org>
35 .Bd -ragged -offset indent
43 .Bd -literal -offset indent
50 support for several logical audio devices, and general purpose DMA channels.
90 .Ss Boot-time Configuration
91 The following variables are available at boot-time through the
94 .Bl -tag -width ".Va hint.hdac.%d.config"-offset indent
145 denies mono playback/recording.
162 May be specified as a set of space-separated
184 May be specified as a 32-bit hexadecimal value with a leading
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/freebsd/sys/contrib/device-tree/src/powerpc/fsl/
H A Dp1022si-post.dtsi36 #address-cells = <2>;
37 #size-cells = <1>;
39 * The localbus on the P1022 is not a simple-bus because of the eLBC
42 compatible = "fsl,p1022-elbc", "fsl,elbc";
49 compatible = "fsl,mpc8548-pcie";
51 #size-cells = <2>;
52 #address-cells = <3>;
53 bus-range = <0 255>;
54 clock-frequency = <33333333>;
59 #interrupt-cells = <1>;
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/freebsd/sys/contrib/device-tree/src/powerpc/
H A Dmpc8610_hpcd.dts1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright 2007-2008 Freescale Semiconductor Inc.
8 /dts-v1/;
13 #address-cells = <1>;
14 #size-cells = <1>;
25 #address-cells = <1>;
26 #size-cells = <0>;
31 d-cache-line-size = <32>;
32 i-cache-line-size = <32>;
33 d-cache-size = <32768>; // L1
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