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Searched full:plane (Results 1 – 25 of 447) sorted by relevance

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/linux/drivers/gpu/drm/
H A Ddrm_plane.c42 * A plane represents an image source that can be blended with or overlaid on
44 * &drm_framebuffer object. The plane itself specifies the cropping and scaling
46 * pipeline, represented by &drm_crtc. A plane can also have additional
52 * which are not covered by a plane will be black, and alpha blending of any
55 * To create a plane, a KMS drivers allocates and zeroes an instances of
59 * Each plane has a type, see enum drm_plane_type. A plane can be compatible
62 * Each CRTC must have a unique primary plane userspace can attach to enable
64 * primary plane to each CRTC at the same time. Primary planes can still be
69 * relies on the driver to set the primary and optionally the cursor plane used
71 * drivers must provide one primary plane per CRTC to avoid surprising legacy
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H A Ddrm_gem_atomic_helper.c22 * synchronization helpers, and plane state and framebuffer BO mappings
25 * Before scanout, a plane's framebuffer needs to be synchronized with
28 * struct &drm_plane_helper.prepare_fb . It sets the plane's fence from
49 * and provide struct drm_shadow_plane_state, which stores the plane's mapping
54 * These macros set up the plane and plane-helper callbacks to point to the
72 * from the plane state. Use to_drm_shadow_plane_state() to upcast from
77 * void driver_plane_atomic_update(struct drm_plane *plane,
80 * struct drm_plane_state *plane_state = plane->state;
115 * Plane Helpers
120 * @plane: Plane
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H A Ddrm_atomic_state_helper.c239 * __drm_atomic_helper_plane_state_reset - resets plane state to default values
240 * @plane_state: atomic plane state, must not be NULL
241 * @plane: plane object, must not be NULL
247 struct drm_plane *plane) in __drm_atomic_helper_plane_state_reset() argument
251 plane_state->plane = plane; in __drm_atomic_helper_plane_state_reset()
257 if (plane->color_encoding_property) { in __drm_atomic_helper_plane_state_reset()
258 if (!drm_object_property_get_default_value(&plane->base, in __drm_atomic_helper_plane_state_reset()
259 plane->color_encoding_property, in __drm_atomic_helper_plane_state_reset()
264 if (plane->color_range_property) { in __drm_atomic_helper_plane_state_reset()
265 if (!drm_object_property_get_default_value(&plane->base, in __drm_atomic_helper_plane_state_reset()
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H A Ddrm_atomic_uapi.c176 * drm_atomic_set_crtc_for_plane - set CRTC for plane
177 * @plane_state: the plane whose incoming state to update
178 * @crtc: CRTC to use for the plane
180 * Changing the assigned CRTC for a plane requires us to grab the lock and state
193 struct drm_plane *plane = plane_state->plane; in drm_atomic_set_crtc_for_plane() local
204 crtc_state->plane_mask &= ~drm_plane_mask(plane); in drm_atomic_set_crtc_for_plane()
214 crtc_state->plane_mask |= drm_plane_mask(plane); in drm_atomic_set_crtc_for_plane()
218 drm_dbg_atomic(plane->dev, in drm_atomic_set_crtc_for_plane()
219 "Link [PLANE:%d:%s] state %p to [CRTC:%d:%s]\n", in drm_atomic_set_crtc_for_plane()
220 plane->base.id, plane->name, plane_state, in drm_atomic_set_crtc_for_plane()
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/linux/drivers/gpu/drm/i915/display/
H A Dintel_plane.c25 * DOC: atomic plane helpers
27 * The functions here are used by the atomic plane helper functions to
28 * implement legacy plane updates (i.e., drm_plane->update_plane() and
29 * drm_plane->disable_plane()). This allows plane updates to use the
30 * atomic state infrastructure and perform plane updates as separate
67 struct intel_plane *plane) in intel_plane_state_reset() argument
71 __drm_atomic_helper_plane_state_reset(&plane_state->uapi, &plane->base); in intel_plane_state_reset()
79 struct intel_plane *plane; in intel_plane_alloc() local
81 plane = kzalloc(sizeof(*plane), GFP_KERNEL); in intel_plane_alloc()
82 if (!plane) in intel_plane_alloc()
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H A Dskl_universal_plane_regs.h11 #define _SKL_PLANE(pipe, plane, reg_1_a, reg_1_b, reg_2_a, reg_2_b) \ argument
12 _PLANE((plane), _PIPE((pipe), (reg_1_a), (reg_1_b)), _PIPE((pipe), (reg_2_a), (reg_2_b)))
13 #define _SKL_PLANE_DW(pipe, plane, dw, reg_1_a, reg_1_b, reg_2_a, reg_2_b) \ argument
14 (_SKL_PLANE((pipe), (plane), (reg_1_a), (reg_1_b), (reg_2_a), (reg_2_b)) + (dw) * 4)
15 #define _MMIO_SKL_PLANE(pipe, plane, reg_1_a, reg_1_b, reg_2_a, reg_2_b) \ argument
16 _MMIO(_SKL_PLANE((pipe), (plane), (reg_1_a), (reg_1_b), (reg_2_a), (reg_2_b)))
17 #define _MMIO_SKL_PLANE_DW(pipe, plane, dw, reg_1_a, reg_1_b, reg_2_a, reg_2_b) \ argument
18 _MMIO(_SKL_PLANE_DW((pipe), (plane), (dw), (reg_1_a), (reg_1_b), (reg_2_a), (reg_2_b)))
20 #define _SEL_FETCH(pipe, plane, reg_1_a, reg_1_b, reg_2_a, reg_2_b, reg_5_a, reg_5_b, reg_6_a, reg_… argument
21 _PICK_EVEN_2RANGES((plane), PLANE_5, \
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H A Di9xx_plane_regs.h12 #define DSPADDR_VLV(dev_priv, plane) _MMIO_PIPE2(dev_priv, plane, _DSPAADDR_VLV) argument
15 #define DSPCNTR(dev_priv, plane) _MMIO_PIPE2(dev_priv, plane, _DSPACNTR) argument
41 #define DISP_ALPHA_TRANS_ENABLE REG_BIT(15) /* pre-g4x plane B */
46 #define DISP_SPRITE_ABOVE_OVERLAY REG_BIT(0) /* pre-g4x plane B/C */
49 #define DSPADDR(dev_priv, plane) _MMIO_PIPE2(dev_priv, plane, _DSPAADDR) argument
52 #define DSPLINOFF(dev_priv, plane) _MMIO_PIPE2(dev_priv, plane, _DSPALINOFF) argument
55 #define DSPSTRIDE(dev_priv, plane) _MMIO_PIPE2(dev_priv, plane, _DSPASTRIDE) argument
58 #define DSPPOS(dev_priv, plane) _MMIO_PIPE2(dev_priv, plane, _DSPAPOS) argument
65 #define DSPSIZE(dev_priv, plane) _MMIO_PIPE2(dev_priv, plane, _DSPASIZE) argument
72 #define DSPSURF(dev_priv, plane) _MMIO_PIPE2(dev_priv, plane, _DSPASURF) argument
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H A Dskl_universal_plane.c346 * - pipe and plane scaling (TODO verify this) in skl_plane_max_width()
354 /* FIXME AUX plane? */ in skl_plane_max_width()
382 /* FIXME AUX plane? */ in glk_plane_max_width()
469 plane_max_stride(struct intel_plane *plane, in plane_max_stride() argument
484 adl_plane_max_stride(struct intel_plane *plane, in adl_plane_max_stride() argument
491 return plane_max_stride(plane, info, in adl_plane_max_stride()
497 skl_plane_max_stride(struct intel_plane *plane, in skl_plane_max_stride() argument
504 return plane_max_stride(plane, info, in skl_plane_max_stride()
582 static u32 tgl_plane_min_alignment(struct intel_plane *plane, in tgl_plane_min_alignment() argument
586 struct intel_display *display = to_intel_display(plane); in tgl_plane_min_alignment()
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/linux/drivers/gpu/drm/nouveau/dispnv04/
H A Doverlay.c113 nv10_update_plane(struct drm_plane *plane, struct drm_crtc *crtc, in nv10_update_plane() argument
120 struct nouveau_drm *drm = nouveau_drm(plane->dev); in nv10_update_plane()
123 container_of(plane, struct nouveau_plane, base); in nv10_update_plane()
192 nv10_disable_plane(struct drm_plane *plane, in nv10_disable_plane() argument
195 struct nvif_object *dev = &nouveau_drm(plane->dev)->client.device.object; in nv10_disable_plane()
197 container_of(plane, struct nouveau_plane, base); in nv10_disable_plane()
209 nv_destroy_plane(struct drm_plane *plane) in nv_destroy_plane() argument
211 drm_plane_force_disable(plane); in nv_destroy_plane()
212 drm_plane_cleanup(plane); in nv_destroy_plane()
213 kfree(plane); in nv_destroy_plane()
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/linux/include/drm/
H A Ddrm_plane.h46 * struct drm_plane_state - mutable plane state
55 /** @plane: backpointer to the plane */
56 struct drm_plane *plane; member
90 * Left position of visible portion of plane on crtc, signed dest
98 * Upper position of visible portion of plane on crtc, signed dest
103 /** @crtc_w: width of visible portion of plane on crtc */
104 /** @crtc_h: height of visible portion of plane on crtc */
108 * @src_x: left position of visible portion of plane within plane (in
113 * @src_y: upper position of visible portion of plane within plane (in
117 /** @src_w: width of visible portion of plane (in 16.16) */
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H A Ddrm_gem_atomic_helper.h15 * Plane Helpers
18 int drm_gem_plane_helper_prepare_fb(struct drm_plane *plane, struct drm_plane_state *state);
25 * DRM_SHADOW_PLANE_MAX_WIDTH - Maximum width of a plane's shadow buffer in pixels
34 * DRM_SHADOW_PLANE_MAX_HEIGHT - Maximum height of a plane's shadow buffer in scanlines
43 * struct drm_shadow_plane_state - plane state for planes with shadow buffers
46 * provides the regular plane state plus mappings of the shadow buffer
50 /** @base: plane state */
56 * Per-plane state for format conversion.
65 * @map: Mappings of the plane's framebuffer BOs in to kernel address space
67 * The memory mappings stored in map should be established in the plane's
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/linux/drivers/gpu/drm/mediatek/
H A Dmtk_plane.c28 static void mtk_plane_reset(struct drm_plane *plane) in mtk_plane_reset() argument
32 if (plane->state) { in mtk_plane_reset()
33 __drm_atomic_helper_plane_destroy_state(plane->state); in mtk_plane_reset()
35 state = to_mtk_plane_state(plane->state); in mtk_plane_reset()
43 __drm_atomic_helper_plane_reset(plane, &state->base); in mtk_plane_reset()
45 state->base.plane = plane; in mtk_plane_reset()
50 static struct drm_plane_state *mtk_plane_duplicate_state(struct drm_plane *plane) in mtk_plane_duplicate_state() argument
52 struct mtk_plane_state *old_state = to_mtk_plane_state(plane->state); in mtk_plane_duplicate_state()
59 __drm_atomic_helper_plane_duplicate_state(plane, &state->base); in mtk_plane_duplicate_state()
61 WARN_ON(state->base.plane != plane); in mtk_plane_duplicate_state()
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/linux/drivers/gpu/drm/arm/display/komeda/
H A Dkomeda_plane.c20 struct komeda_plane *kplane = to_kplane(st->plane); in komeda_plane_init_data_flow()
32 st->plane->name, st->normalized_zpos, in komeda_plane_init_data_flow()
64 * @plane: DRM plane
65 * @state: the plane state object
71 komeda_plane_atomic_check(struct drm_plane *plane, in komeda_plane_atomic_check() argument
75 plane); in komeda_plane_atomic_check()
76 struct komeda_plane *kplane = to_kplane(plane); in komeda_plane_atomic_check()
90 DRM_DEBUG_ATOMIC("Cannot update plane on a disabled CRTC.\n"); in komeda_plane_atomic_check()
114 /* plane doesn't represent a real HW, so there is no HW update for plane.
118 komeda_plane_atomic_update(struct drm_plane *plane, in komeda_plane_atomic_update() argument
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/linux/drivers/gpu/drm/omapdrm/dss/
H A Ddispc.h342 static inline u16 DISPC_OVL_BASE(enum omap_plane_id plane) in DISPC_OVL_BASE() argument
344 switch (plane) { in DISPC_OVL_BASE()
362 static inline u16 DISPC_BA0_OFFSET(enum omap_plane_id plane) in DISPC_BA0_OFFSET() argument
364 switch (plane) { in DISPC_BA0_OFFSET()
378 static inline u16 DISPC_BA1_OFFSET(enum omap_plane_id plane) in DISPC_BA1_OFFSET() argument
380 switch (plane) { in DISPC_BA1_OFFSET()
394 static inline u16 DISPC_BA0_UV_OFFSET(enum omap_plane_id plane) in DISPC_BA0_UV_OFFSET() argument
396 switch (plane) { in DISPC_BA0_UV_OFFSET()
414 static inline u16 DISPC_BA1_UV_OFFSET(enum omap_plane_id plane) in DISPC_BA1_UV_OFFSET() argument
416 switch (plane) { in DISPC_BA1_UV_OFFSET()
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/linux/drivers/video/fbdev/omap2/omapfb/dss/
H A Ddispc.h339 static inline u16 DISPC_OVL_BASE(enum omap_plane plane) in DISPC_OVL_BASE() argument
341 switch (plane) { in DISPC_OVL_BASE()
359 static inline u16 DISPC_BA0_OFFSET(enum omap_plane plane) in DISPC_BA0_OFFSET() argument
361 switch (plane) { in DISPC_BA0_OFFSET()
375 static inline u16 DISPC_BA1_OFFSET(enum omap_plane plane) in DISPC_BA1_OFFSET() argument
377 switch (plane) { in DISPC_BA1_OFFSET()
391 static inline u16 DISPC_BA0_UV_OFFSET(enum omap_plane plane) in DISPC_BA0_UV_OFFSET() argument
393 switch (plane) { in DISPC_BA0_UV_OFFSET()
411 static inline u16 DISPC_BA1_UV_OFFSET(enum omap_plane plane) in DISPC_BA1_UV_OFFSET() argument
413 switch (plane) { in DISPC_BA1_UV_OFFSET()
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/linux/drivers/gpu/drm/sun4i/
H A Dsun4i_layer.c19 static void sun4i_backend_layer_reset(struct drm_plane *plane) in sun4i_backend_layer_reset() argument
23 if (plane->state) { in sun4i_backend_layer_reset()
24 state = state_to_sun4i_layer_state(plane->state); in sun4i_backend_layer_reset()
29 plane->state = NULL; in sun4i_backend_layer_reset()
34 __drm_atomic_helper_plane_reset(plane, &state->state); in sun4i_backend_layer_reset()
38 sun4i_backend_layer_duplicate_state(struct drm_plane *plane) in sun4i_backend_layer_duplicate_state() argument
40 struct sun4i_layer_state *orig = state_to_sun4i_layer_state(plane->state); in sun4i_backend_layer_duplicate_state()
47 __drm_atomic_helper_plane_duplicate_state(plane, &copy->state); in sun4i_backend_layer_duplicate_state()
53 static void sun4i_backend_layer_destroy_state(struct drm_plane *plane, in sun4i_backend_layer_destroy_state() argument
63 static void sun4i_backend_layer_atomic_disable(struct drm_plane *plane, in sun4i_backend_layer_atomic_disable() argument
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/linux/drivers/gpu/drm/tegra/
H A Dplane.c17 #include "plane.h"
19 static void tegra_plane_destroy(struct drm_plane *plane) in tegra_plane_destroy() argument
21 struct tegra_plane *p = to_tegra_plane(plane); in tegra_plane_destroy()
23 drm_plane_cleanup(plane); in tegra_plane_destroy()
27 static void tegra_plane_reset(struct drm_plane *plane) in tegra_plane_reset() argument
29 struct tegra_plane *p = to_tegra_plane(plane); in tegra_plane_reset()
33 if (plane->state) in tegra_plane_reset()
34 __drm_atomic_helper_plane_destroy_state(plane->state); in tegra_plane_reset()
36 kfree(plane->state); in tegra_plane_reset()
37 plane->state = NULL; in tegra_plane_reset()
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/linux/drivers/gpu/drm/msm/disp/dpu1/
H A Ddpu_plane.c31 #define DPU_DEBUG_PLANE(pl, fmt, ...) DRM_DEBUG_ATOMIC("plane%d " fmt,\
34 #define DPU_ERROR_PLANE(pl, fmt, ...) DPU_ERROR("plane%d " fmt,\
74 * struct dpu_plane - local dpu plane structure
78 * @revalidate: force revalidation of all the plane properties
99 static struct dpu_kms *_dpu_plane_get_kms(struct drm_plane *plane) in _dpu_plane_get_kms() argument
101 struct msm_drm_private *priv = plane->dev->dev_private; in _dpu_plane_get_kms()
107 * _dpu_plane_calc_bw - calculate bandwidth required for a plane
112 * Result: Updates calculated bandwidth in the plane state.
159 * _dpu_plane_calc_clk - calculate clock required for a plane
162 * Result: Updates calculated clock in the plane state.
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/linux/Documentation/gpu/
H A Dafbc.rst87 Within each plane, the component ordering also follows the fourcc
94 * Plane 0:
102 * Plane 0:
106 * Plane 1:
127 - Plane 0: 4 components
135 - Plane 0: 4 components
143 - Plane 0: 3 components
150 - Plane 0: 3 components
157 - Plane 0: 4 components
164 - 8-bit per component YCbCr 444, single plane
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/linux/Documentation/gpu/amdgpu/display/
H A Dmpo-overview.rst17 * Plane independent page flips - No need to be tied to global compositor
31 * ``DRM_PLANE_TYPE_PRIMARY``: Primary planes represent a "main" plane for a
34 * ``DRM_PLANE_TYPE_CURSOR``: Cursor planes represent a "cursor" plane for a
45 * 1 Overlay plane (shared among CRTCs).
53 configuration for optimal single display output (e.g., 2 pipes per plane).
56 display - will see 4 pipes in use, 2 per plane.
58 At least 1 pipe must be used per plane (primary and overlay), so for this
65 Plane Restrictions
78 Not every property is available on every plane:
94 plane as it is being treated as part of the plane. Another consequence of that
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/linux/drivers/gpu/drm/renesas/rcar-du/
H A Drcar_du_vsp.c219 static void rcar_du_vsp_plane_setup(struct rcar_du_vsp_plane *plane) in rcar_du_vsp_plane_setup() argument
222 to_rcar_vsp_plane_state(plane->plane.state); in rcar_du_vsp_plane_setup()
224 struct drm_framebuffer *fb = plane->plane.state->fb; in rcar_du_vsp_plane_setup()
254 vsp1_du_atomic_update(plane->vsp->vsp, crtc->vsp_pipe, in rcar_du_vsp_plane_setup()
255 plane->index, &cfg); in rcar_du_vsp_plane_setup()
320 static int rcar_du_vsp_plane_prepare_fb(struct drm_plane *plane, in rcar_du_vsp_plane_prepare_fb() argument
324 struct rcar_du_vsp *vsp = to_rcar_vsp_plane(plane)->vsp; in rcar_du_vsp_plane_prepare_fb()
329 * plane is not visible, as it will not be displayed. in rcar_du_vsp_plane_prepare_fb()
338 return drm_gem_plane_helper_prepare_fb(plane, state); in rcar_du_vsp_plane_prepare_fb()
354 static void rcar_du_vsp_plane_cleanup_fb(struct drm_plane *plane, in rcar_du_vsp_plane_cleanup_fb() argument
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/linux/drivers/gpu/drm/vkms/
H A Dvkms_plane.c54 vkms_plane_duplicate_state(struct drm_plane *plane) in vkms_plane_duplicate_state() argument
72 __drm_gem_duplicate_shadow_plane_state(plane, &vkms_state->base); in vkms_plane_duplicate_state()
77 static void vkms_plane_destroy_state(struct drm_plane *plane, in vkms_plane_destroy_state() argument
98 static void vkms_plane_reset(struct drm_plane *plane) in vkms_plane_reset() argument
102 if (plane->state) { in vkms_plane_reset()
103 vkms_plane_destroy_state(plane, plane->state); in vkms_plane_reset()
104 plane->state = NULL; /* must be set to NULL here */ in vkms_plane_reset()
113 __drm_gem_reset_shadow_plane(plane, &vkms_state->base); in vkms_plane_reset()
124 static void vkms_plane_atomic_update(struct drm_plane *plane, in vkms_plane_atomic_update() argument
128 plane); in vkms_plane_atomic_update()
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/linux/drivers/gpu/drm/amd/display/amdgpu_dm/
H A Damdgpu_dm_plane.c47 * plane capabilities, or initialize this array to all formats, so internal drm
394 /* TODO: This seems wrong because there is no DCC plane on GFX12. */ in amdgpu_dm_plane_fill_gfx12_plane_attributes_from_modifiers()
780 static int amdgpu_dm_plane_get_plane_formats(const struct drm_plane *plane, in amdgpu_dm_plane_get_plane_formats() argument
788 * DC plane caps. This will require adding more formats to the in amdgpu_dm_plane_get_plane_formats()
792 if (plane->type == DRM_PLANE_TYPE_PRIMARY || in amdgpu_dm_plane_get_plane_formats()
793 …(plane_cap && plane_cap->type == DC_PLANE_TYPE_DCN_UNIVERSAL && plane->type != DRM_PLANE_TYPE_CURS… in amdgpu_dm_plane_get_plane_formats()
812 switch (plane->type) { in amdgpu_dm_plane_get_plane_formats()
925 static int amdgpu_dm_plane_helper_prepare_fb(struct drm_plane *plane, in amdgpu_dm_plane_helper_prepare_fb() argument
962 if (plane->type != DRM_PLANE_TYPE_CURSOR) in amdgpu_dm_plane_helper_prepare_fb()
981 r = drm_gem_plane_helper_prepare_fb(plane, new_state); in amdgpu_dm_plane_helper_prepare_fb()
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/linux/drivers/gpu/drm/sti/
H A Dsti_crtc.c146 /* perform plane actions */ in sti_crtc_atomic_flush()
148 struct sti_plane *plane = to_sti_plane(p); in sti_crtc_atomic_flush() local
150 switch (plane->status) { in sti_crtc_atomic_flush()
157 DRM_DEBUG_DRIVER("update plane %s\n", in sti_crtc_atomic_flush()
158 sti_plane_to_str(plane)); in sti_crtc_atomic_flush()
160 if (sti_mixer_set_plane_depth(mixer, plane)) { in sti_crtc_atomic_flush()
161 DRM_ERROR("Cannot set plane %s depth\n", in sti_crtc_atomic_flush()
162 sti_plane_to_str(plane)); in sti_crtc_atomic_flush()
166 if (sti_mixer_set_plane_status(mixer, plane, true)) { in sti_crtc_atomic_flush()
167 DRM_ERROR("Cannot enable plane %s at mixer\n", in sti_crtc_atomic_flush()
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/linux/drivers/media/common/videobuf2/
H A Dvideobuf2-core.c227 int plane; in __vb2_buf_mem_alloc() local
234 for (plane = 0; plane < vb->num_planes; ++plane) { in __vb2_buf_mem_alloc()
236 unsigned long size = PAGE_ALIGN(vb->planes[plane].length); in __vb2_buf_mem_alloc()
239 if (size < vb->planes[plane].length) in __vb2_buf_mem_alloc()
244 q->alloc_devs[plane] ? : q->dev, in __vb2_buf_mem_alloc()
252 /* Associate allocator private data with this plane */ in __vb2_buf_mem_alloc()
253 vb->planes[plane].mem_priv = mem_priv; in __vb2_buf_mem_alloc()
259 for (; plane > 0; --plane) { in __vb2_buf_mem_alloc()
260 call_void_memop(vb, put, vb->planes[plane - 1].mem_priv); in __vb2_buf_mem_alloc()
261 vb->planes[plane - 1].mem_priv = NULL; in __vb2_buf_mem_alloc()
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