1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/display/msm/dsi-controller-main.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Qualcomm Display DSI controller 8 9maintainers: 10 - Krishna Manikandan <quic_mkrishn@quicinc.com> 11 12properties: 13 compatible: 14 oneOf: 15 - items: 16 - enum: 17 - qcom,apq8064-dsi-ctrl 18 - qcom,msm8226-dsi-ctrl 19 - qcom,msm8916-dsi-ctrl 20 - qcom,msm8953-dsi-ctrl 21 - qcom,msm8974-dsi-ctrl 22 - qcom,msm8976-dsi-ctrl 23 - qcom,msm8996-dsi-ctrl 24 - qcom,msm8998-dsi-ctrl 25 - qcom,qcm2290-dsi-ctrl 26 - qcom,sc7180-dsi-ctrl 27 - qcom,sc7280-dsi-ctrl 28 - qcom,sdm660-dsi-ctrl 29 - qcom,sdm670-dsi-ctrl 30 - qcom,sdm845-dsi-ctrl 31 - qcom,sm6115-dsi-ctrl 32 - qcom,sm6125-dsi-ctrl 33 - qcom,sm6350-dsi-ctrl 34 - qcom,sm6375-dsi-ctrl 35 - qcom,sm7150-dsi-ctrl 36 - qcom,sm8150-dsi-ctrl 37 - qcom,sm8250-dsi-ctrl 38 - qcom,sm8350-dsi-ctrl 39 - qcom,sm8450-dsi-ctrl 40 - qcom,sm8550-dsi-ctrl 41 - qcom,sm8650-dsi-ctrl 42 - const: qcom,mdss-dsi-ctrl 43 - enum: 44 - qcom,dsi-ctrl-6g-qcm2290 45 - qcom,mdss-dsi-ctrl # This should always come with an SoC-specific compatible 46 deprecated: true 47 48 reg: 49 maxItems: 1 50 51 reg-names: 52 const: dsi_ctrl 53 54 interrupts: 55 maxItems: 1 56 57 clocks: 58 description: | 59 Several clocks are used, depending on the variant. Typical ones are:: 60 - bus:: Display AHB clock. 61 - byte:: Display byte clock. 62 - byte_intf:: Display byte interface clock. 63 - core:: Display core clock. 64 - core_mss:: Core MultiMedia SubSystem clock. 65 - iface:: Display AXI clock. 66 - mdp_core:: MDP Core clock. 67 - mnoc:: MNOC clock 68 - pixel:: Display pixel clock. 69 minItems: 3 70 maxItems: 9 71 72 clock-names: 73 minItems: 3 74 maxItems: 9 75 76 phys: 77 maxItems: 1 78 79 phy-names: 80 deprecated: true 81 const: dsi 82 83 syscon-sfpb: 84 description: A phandle to mmss_sfpb syscon node (only for DSIv2). 85 $ref: /schemas/types.yaml#/definitions/phandle 86 87 qcom,dual-dsi-mode: 88 type: boolean 89 description: | 90 Indicates if the DSI controller is driving a panel which needs 91 2 DSI links. 92 93 qcom,master-dsi: 94 type: boolean 95 description: | 96 Indicates if the DSI controller is the master DSI controller when 97 qcom,dual-dsi-mode enabled. 98 99 qcom,sync-dual-dsi: 100 type: boolean 101 description: | 102 Indicates if the DSI controller needs to sync the other DSI controller 103 with MIPI DCS commands when qcom,dual-dsi-mode enabled. 104 105 assigned-clocks: 106 minItems: 2 107 maxItems: 4 108 description: | 109 Parents of "byte" and "pixel" for the given platform. 110 For DSIv2 platforms this should contain "byte", "esc", "src" and 111 "pixel_src" clocks. 112 113 assigned-clock-parents: 114 minItems: 2 115 maxItems: 4 116 description: | 117 The Byte clock and Pixel clock PLL outputs provided by a DSI PHY block. 118 119 power-domains: 120 maxItems: 1 121 122 operating-points-v2: true 123 124 opp-table: 125 type: object 126 127 ports: 128 $ref: /schemas/graph.yaml#/properties/ports 129 description: | 130 Contains DSI controller input and output ports as children, each 131 containing one endpoint subnode. 132 133 properties: 134 port@0: 135 $ref: /schemas/graph.yaml#/$defs/port-base 136 unevaluatedProperties: false 137 description: | 138 Input endpoints of the controller. 139 properties: 140 endpoint: 141 $ref: /schemas/media/video-interfaces.yaml# 142 unevaluatedProperties: false 143 properties: 144 data-lanes: 145 maxItems: 4 146 minItems: 1 147 items: 148 enum: [ 0, 1, 2, 3 ] 149 150 port@1: 151 $ref: /schemas/graph.yaml#/$defs/port-base 152 unevaluatedProperties: false 153 description: | 154 Output endpoints of the controller. 155 properties: 156 endpoint: 157 $ref: /schemas/media/video-interfaces.yaml# 158 unevaluatedProperties: false 159 properties: 160 data-lanes: 161 maxItems: 4 162 minItems: 1 163 items: 164 enum: [ 0, 1, 2, 3 ] 165 166 qcom,te-source: 167 $ref: /schemas/types.yaml#/definitions/string 168 description: 169 Specifies the source of vsync signal from the panel used for 170 tearing elimination. 171 default: mdp_vsync_p 172 enum: 173 - mdp_vsync_p 174 - mdp_vsync_s 175 - mdp_vsync_e 176 - timer0 177 - timer1 178 - timer2 179 - timer3 180 - timer4 181 182 required: 183 - port@0 184 - port@1 185 186 avdd-supply: 187 description: 188 Phandle to vdd regulator device node 189 190 refgen-supply: 191 description: 192 Phandle to REFGEN regulator device node 193 194 vcca-supply: 195 description: 196 Phandle to vdd regulator device node 197 198 vdd-supply: 199 description: 200 VDD regulator 201 202 vddio-supply: 203 description: 204 VDD-IO regulator 205 206 vdda-supply: 207 description: 208 VDDA regulator 209 210required: 211 - compatible 212 - reg 213 - reg-names 214 - interrupts 215 - clocks 216 - clock-names 217 - phys 218 - assigned-clocks 219 - assigned-clock-parents 220 - ports 221 222allOf: 223 - $ref: ../dsi-controller.yaml# 224 - if: 225 properties: 226 compatible: 227 contains: 228 enum: 229 - qcom,apq8064-dsi-ctrl 230 then: 231 properties: 232 clocks: 233 maxItems: 7 234 clock-names: 235 items: 236 - const: iface 237 - const: bus 238 - const: core_mmss 239 - const: src 240 - const: byte 241 - const: pixel 242 - const: core 243 244 - if: 245 properties: 246 compatible: 247 contains: 248 enum: 249 - qcom,msm8916-dsi-ctrl 250 then: 251 properties: 252 clocks: 253 maxItems: 6 254 clock-names: 255 items: 256 - const: mdp_core 257 - const: iface 258 - const: bus 259 - const: byte 260 - const: pixel 261 - const: core 262 263 - if: 264 properties: 265 compatible: 266 contains: 267 enum: 268 - qcom,msm8953-dsi-ctrl 269 - qcom,msm8976-dsi-ctrl 270 then: 271 properties: 272 clocks: 273 maxItems: 6 274 clock-names: 275 items: 276 - const: mdp_core 277 - const: iface 278 - const: bus 279 - const: byte 280 - const: pixel 281 - const: core 282 283 - if: 284 properties: 285 compatible: 286 contains: 287 enum: 288 - qcom,msm8226-dsi-ctrl 289 - qcom,msm8974-dsi-ctrl 290 then: 291 properties: 292 clocks: 293 maxItems: 7 294 clock-names: 295 items: 296 - const: mdp_core 297 - const: iface 298 - const: bus 299 - const: byte 300 - const: pixel 301 - const: core 302 - const: core_mmss 303 304 - if: 305 properties: 306 compatible: 307 contains: 308 enum: 309 - qcom,msm8996-dsi-ctrl 310 then: 311 properties: 312 clocks: 313 maxItems: 7 314 clock-names: 315 items: 316 - const: mdp_core 317 - const: byte 318 - const: iface 319 - const: bus 320 - const: core_mmss 321 - const: pixel 322 - const: core 323 324 - if: 325 properties: 326 compatible: 327 contains: 328 enum: 329 - qcom,msm8998-dsi-ctrl 330 - qcom,sm6125-dsi-ctrl 331 - qcom,sm6350-dsi-ctrl 332 then: 333 properties: 334 clocks: 335 maxItems: 6 336 clock-names: 337 items: 338 - const: byte 339 - const: byte_intf 340 - const: pixel 341 - const: core 342 - const: iface 343 - const: bus 344 345 - if: 346 properties: 347 compatible: 348 contains: 349 enum: 350 - qcom,sc7180-dsi-ctrl 351 - qcom,sc7280-dsi-ctrl 352 - qcom,sm7150-dsi-ctrl 353 - qcom,sm8150-dsi-ctrl 354 - qcom,sm8250-dsi-ctrl 355 - qcom,sm8350-dsi-ctrl 356 - qcom,sm8450-dsi-ctrl 357 - qcom,sm8550-dsi-ctrl 358 - qcom,sm8650-dsi-ctrl 359 then: 360 properties: 361 clocks: 362 maxItems: 6 363 clock-names: 364 items: 365 - const: byte 366 - const: byte_intf 367 - const: pixel 368 - const: core 369 - const: iface 370 - const: bus 371 372 - if: 373 properties: 374 compatible: 375 contains: 376 enum: 377 - qcom,sdm660-dsi-ctrl 378 then: 379 properties: 380 clocks: 381 maxItems: 9 382 clock-names: 383 items: 384 - const: mdp_core 385 - const: byte 386 - const: byte_intf 387 - const: mnoc 388 - const: iface 389 - const: bus 390 - const: core_mmss 391 - const: pixel 392 - const: core 393 394 - if: 395 properties: 396 compatible: 397 contains: 398 enum: 399 - qcom,sdm845-dsi-ctrl 400 - qcom,sm6115-dsi-ctrl 401 - qcom,sm6375-dsi-ctrl 402 then: 403 properties: 404 clocks: 405 maxItems: 6 406 clock-names: 407 items: 408 - const: byte 409 - const: byte_intf 410 - const: pixel 411 - const: core 412 - const: iface 413 - const: bus 414 415unevaluatedProperties: false 416 417examples: 418 - | 419 #include <dt-bindings/interrupt-controller/arm-gic.h> 420 #include <dt-bindings/clock/qcom,dispcc-sdm845.h> 421 #include <dt-bindings/clock/qcom,gcc-sdm845.h> 422 #include <dt-bindings/power/qcom-rpmpd.h> 423 424 dsi@ae94000 { 425 compatible = "qcom,sc7180-dsi-ctrl", "qcom,mdss-dsi-ctrl"; 426 reg = <0x0ae94000 0x400>; 427 reg-names = "dsi_ctrl"; 428 429 #address-cells = <1>; 430 #size-cells = <0>; 431 432 interrupt-parent = <&mdss>; 433 interrupts = <4>; 434 435 clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK>, 436 <&dispcc DISP_CC_MDSS_BYTE0_INTF_CLK>, 437 <&dispcc DISP_CC_MDSS_PCLK0_CLK>, 438 <&dispcc DISP_CC_MDSS_ESC0_CLK>, 439 <&dispcc DISP_CC_MDSS_AHB_CLK>, 440 <&dispcc DISP_CC_MDSS_AXI_CLK>; 441 clock-names = "byte", 442 "byte_intf", 443 "pixel", 444 "core", 445 "iface", 446 "bus"; 447 448 phys = <&dsi0_phy>; 449 phy-names = "dsi"; 450 451 assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK_SRC>, <&dispcc DISP_CC_MDSS_PCLK0_CLK_SRC>; 452 assigned-clock-parents = <&dsi_phy 0>, <&dsi_phy 1>; 453 454 power-domains = <&rpmhpd SC7180_CX>; 455 operating-points-v2 = <&dsi_opp_table>; 456 457 ports { 458 #address-cells = <1>; 459 #size-cells = <0>; 460 461 port@0 { 462 reg = <0>; 463 dsi0_in: endpoint { 464 remote-endpoint = <&dpu_intf1_out>; 465 }; 466 }; 467 468 port@1 { 469 reg = <1>; 470 dsi0_out: endpoint { 471 remote-endpoint = <&sn65dsi86_in>; 472 data-lanes = <0 1 2 3>; 473 qcom,te-source = "mdp_vsync_e"; 474 }; 475 }; 476 }; 477 }; 478... 479