| /linux/drivers/platform/goldfish/ |
| H A D | goldfish_pipe.c | 126 /* pipe ID - index into goldfish_pipe_dev::pipes array */
143 /* doubly linked list of signalled pipes, protected by
176 * - pipes, pipes_capacity
177 * - [*pipes, *pipes + pipes_capacity) - array data
182 * in all allocated pipes
186 * the only operation that happens often is the signalled pipes array
194 * Array of the pipes of |pipes_capacity| elements,
197 struct goldfish_pipe **pipes; member
203 /* Head of a doubly linked list of signalled pipes */
521 pipe = dev->pipes[id]; in signalled_pipes_add_locked()
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| /linux/Documentation/gpu/amdgpu/display/ |
| H A D | mpo-overview.rst | 50 For this hardware example, we have 4 pipes (if you don't know what AMD pipe
53 configuration for optimal single display output (e.g., 2 pipes per plane).
56 display - will see 4 pipes in use, 2 per plane.
204 the two displays, we need to use 2 pipes. See the example below where we avoid
207 - 1 display (1 pipe) + MPO (1 pipe), we will use two pipes
208 - 2 displays (2 pipes) + MPO (1-2 pipes); we will use 4 pipes. MPO in the
209 middle of both displays needs 2 pipes.
210 - 3 Displays (3 pipes) + MPO (1-2 pipes), we need 5 pipes.
217 * When ASIC has 3 pipes, AMD hardware can NOT support 2 displays with MPO
218 * When ASIC has 4 pipes, AMD hardware can NOT support 3 displays with MPO
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| /linux/drivers/gpu/drm/amd/display/dc/dml/ |
| H A D | display_mode_vba.c | 46 const display_e2e_pipe_params_st *pipes,
54 const display_e2e_pipe_params_st *pipes, in dml_get_voltage_level() argument
60 || memcmp(pipes, mode_lib->vba.cache_pipes, in dml_get_voltage_level()
65 memcpy(mode_lib->vba.cache_pipes, pipes, sizeof(*pipes) * num_pipes); in dml_get_voltage_level()
68 if (need_recalculate && pipes[0].clks_cfg.dppclk_mhz != 0) in dml_get_voltage_level()
82 …attr(struct display_mode_lib *mode_lib, const display_e2e_pipe_params_st *pipes, unsigned int num_…
84 recalculate_params(mode_lib, pipes, num_pipes); \
130 …attr(struct display_mode_lib *mode_lib, const display_e2e_pipe_params_st *pipes, unsigned int num_…
133 recalculate_params(mode_lib, pipes, num_pipes); \
209 const display_e2e_pipe_params_st *pipes, in get_total_immediate_flip_bytes() argument
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| H A D | display_mode_lib.c | 145 case DML_FAIL_TOTAL_AVAILABLE_PIPES: return "Total available pipes"; in dml_get_status_message()
162 display_e2e_pipe_params_st *pipes, in dml_log_pipe_params() argument
174 pipe_src = &(pipes[i].pipe.src); in dml_log_pipe_params()
175 pipe_dest = &(pipes[i].pipe.dest); in dml_log_pipe_params()
176 scale_ratio_depth = &(pipes[i].pipe.scale_ratio_depth); in dml_log_pipe_params()
177 scale_taps = &(pipes[i].pipe.scale_taps); in dml_log_pipe_params()
178 dout = &(pipes[i].dout); in dml_log_pipe_params()
179 clks_cfg = &(pipes[i].clks_cfg); in dml_log_pipe_params()
306 …dml_print("DML SUPPORT: Total Available Pipes : [%s, %s]\n", mode_lib->vba.Total… in dml_log_mode_support_params()
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn351/ |
| H A D | dcn351_fpu.c | 472 display_e2e_pipe_params_st *pipes, in dcn351_populate_dml_pipes_from_context_fpu() argument
483 dcn31_populate_dml_pipes_from_context(dc, context, pipes, in dcn351_populate_dml_pipes_from_context_fpu()
503 pipes[pipe_cnt].pipe.dest.vtotal = in dcn351_populate_dml_pipes_from_context_fpu()
505 pipes[pipe_cnt].pipe.dest.vblank_nom = timing->v_total - in dcn351_populate_dml_pipes_from_context_fpu()
506 pipes[pipe_cnt].pipe.dest.vactive; in dcn351_populate_dml_pipes_from_context_fpu()
509 pipes[pipe_cnt].pipe.dest.vblank_nom = timing->v_total - pipes[pipe_cnt].pipe.dest.vactive; in dcn351_populate_dml_pipes_from_context_fpu()
510 pipes[pipe_cnt].pipe.dest.vblank_nom = min(pipes[pipe_cnt].pipe.dest.vblank_nom, num_lines); in dcn351_populate_dml_pipes_from_context_fpu()
515 pipes[pipe_cnt].pipe.dest.vblank_nom = in dcn351_populate_dml_pipes_from_context_fpu()
516 max(pipes[pipe_cnt].pipe.dest.vblank_nom, timing->v_sync_width + v_back_porch + 2); in dcn351_populate_dml_pipes_from_context_fpu()
517 …pipes[pipe_cnt].pipe.dest.vblank_nom = min(pipes[pipe_cnt].pipe.dest.vblank_nom, max_allowed_vblan… in dcn351_populate_dml_pipes_from_context_fpu()
[all …]
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn35/ |
| H A D | dcn35_fpu.c | 439 display_e2e_pipe_params_st *pipes, in dcn35_populate_dml_pipes_from_context_fpu() argument
450 dcn31_populate_dml_pipes_from_context(dc, context, pipes, in dcn35_populate_dml_pipes_from_context_fpu()
470 pipes[pipe_cnt].pipe.dest.vtotal = in dcn35_populate_dml_pipes_from_context_fpu()
472 pipes[pipe_cnt].pipe.dest.vblank_nom = timing->v_total - in dcn35_populate_dml_pipes_from_context_fpu()
473 pipes[pipe_cnt].pipe.dest.vactive; in dcn35_populate_dml_pipes_from_context_fpu()
476 pipes[pipe_cnt].pipe.dest.vblank_nom = timing->v_total - pipes[pipe_cnt].pipe.dest.vactive; in dcn35_populate_dml_pipes_from_context_fpu()
477 pipes[pipe_cnt].pipe.dest.vblank_nom = min(pipes[pipe_cnt].pipe.dest.vblank_nom, num_lines); in dcn35_populate_dml_pipes_from_context_fpu()
482 pipes[pipe_cnt].pipe.dest.vblank_nom = in dcn35_populate_dml_pipes_from_context_fpu()
483 max(pipes[pipe_cnt].pipe.dest.vblank_nom, timing->v_sync_width + v_back_porch + 2); in dcn35_populate_dml_pipes_from_context_fpu()
484 …pipes[pipe_cnt].pipe.dest.vblank_nom = min(pipes[pipe_cnt].pipe.dest.vblank_nom, max_allowed_vblan… in dcn35_populate_dml_pipes_from_context_fpu()
[all …]
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| /linux/Documentation/driver-api/ |
| H A D | xillybus.rst | 17 -- Seekable pipes
23 -- Channels, pipes, and the message channel
85 project to another (the number of data pipes needed in each direction and
90 Xillybus presents independent data streams, which resemble pipes or TCP/IP
125 possibly pressing CTRL-C as some stage, even though the xillybus_* pipes have
128 The driver and hardware are designed to behave sensibly as pipes, including:
138 device files are treated like two independent pipes (except for sharing a
144 Xillybus pipes are configured (on the IP core) to be either synchronous or
154 For FPGA to host pipes, asynchronous pipes allow data transfer from the FPGA
156 has been requested by a read() call. On synchronous pipes, only the amount
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn31/ |
| H A D | dcn31_fpu.c | 445 void dcn31_zero_pipe_dcc_fraction(display_e2e_pipe_params_st *pipes, in dcn31_zero_pipe_dcc_fraction() argument
450 pipes[pipe_cnt].pipe.src.dcc_fraction_of_zs_req_luma = 0; in dcn31_zero_pipe_dcc_fraction()
451 pipes[pipe_cnt].pipe.src.dcc_fraction_of_zs_req_chroma = 0; in dcn31_zero_pipe_dcc_fraction()
484 display_e2e_pipe_params_st *pipes, in dcn31_calculate_wm_and_dlg_fp() argument
506 pipes[0].clks_cfg.voltage = vlevel; in dcn31_calculate_wm_and_dlg_fp()
507 pipes[0].clks_cfg.dcfclk_mhz = dcfclk; in dcn31_calculate_wm_and_dlg_fp()
508 pipes[0].clks_cfg.socclk_mhz = context->bw_ctx.dml.soc.clock_limits[vlevel].socclk_mhz; in dcn31_calculate_wm_and_dlg_fp()
511 get_wm_z8_stutter_enter_exit(&context->bw_ctx.dml, pipes, pipe_cnt) * 1000; in dcn31_calculate_wm_and_dlg_fp()
513 …if (get_stutter_period(&context->bw_ctx.dml, pipes, pipe_cnt) < dc->debug.minimum_z8_residency_tim… in dcn31_calculate_wm_and_dlg_fp()
523 …context->bw_ctx.bw.dcn.watermarks.a.urgent_ns = get_wm_urgent(&context->bw_ctx.dml, pipes, pipe_cn… in dcn31_calculate_wm_and_dlg_fp()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn32/ |
| H A D | dcn32_resource_helpers.c | 112 /* merge pipes if necessary */ in dcn32_merge_pipes_for_subvp()
116 // For now merge all pipes for SubVP since pipe split case isn't supported yet in dcn32_merge_pipes_for_subvp()
118 /* if ODM merge we ignore mpc tree, mpo pipes will have their own flags */ in dcn32_merge_pipes_for_subvp()
295 * number of DET for that given plane will be split among the pipes driving that plane.
302 * among those pipes.
303 * 4. Assign the DET override to the DML pipes.
307 * @pipes: Array of DML pipes
313 display_e2e_pipe_params_st *pipes) in dcn32_determine_det_override() argument
342 /* Note: pipe_plane_count indicates the number of pipes to be used for a in dcn32_determine_det_override()
372 pipes[pipe_cnt].pipe.src.det_size_override = pipe_segments[i] * DCN3_2_DET_SEG_SIZE; in dcn32_determine_det_override()
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| /linux/drivers/gpu/drm/arm/display/komeda/ |
| H A D | komeda_event.c | 110 return (a->pipes[0] | a->pipes[1]) & in is_new_frame()
120 u64 evts_mask = evts->global | evts->pipes[0] | evts->pipes[1]; in komeda_print_events()
146 komeda_sprintf(&str, ", pipes[0]: "); in komeda_print_events()
147 evt_str(&str, evts->pipes[0]); in komeda_print_events()
148 komeda_sprintf(&str, ", pipes[1]: "); in komeda_print_events()
149 evt_str(&str, evts->pipes[1]); in komeda_print_events()
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| /linux/drivers/gpu/drm/msm/disp/mdp5/ |
| H A D | mdp5_smp.h | 25 * In some hw, some blocks are statically allocated for certain pipes
40 * for the newly assigned pipes, so we don't take away blocks
41 * assigned to pipes that are still scanning out
43 * released clients, since at that point old pipes are no longer
53 /* assigned pipes (hw updated at _prepare_commit()): */
56 /* released pipes (hw updated at _complete_commit()): */
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| /linux/sound/sparc/ |
| H A D | dbri.c | 31 * memory and a serial device (long pipes, no. 0-15) or between two serial
32 * devices (short pipes, no. 16-31), or simply send a fixed data to a serial
33 * device (short pipes).
36 * each serial device (NT,TE,CHI). A timeslot is associated to 1 or 2 pipes
313 struct dbri_pipe pipes[DBRI_NO_PIPES]; /* DBRI's 32 data pipes */ member
364 #define D_PAUSE 0x1 /* Flush long pipes */
421 #define D_TS_ANCHOR (7<<10) /* Starting short pipes */
575 * Short data pipes transmit LSB first. The CS4215 receives MSB first. Grrr.
766 /* Initialize pipes */ in dbri_initialize()
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| /linux/drivers/net/wireless/ath/ath6kl/ |
| H A D | usb.c | 29 /* tx/rx pipes for usb */
70 struct ath6kl_usb_pipe pipes[ATH6KL_USB_PIPE_MAX]; member
255 ath6kl_usb_free_pipe_resources(&ar_usb->pipes[i]); in ath6kl_usb_cleanup_pipe_resources()
313 ath6kl_dbg(ATH6KL_DBG_USB, "setting up USB Pipes using interface\n"); in ath6kl_usb_setup_pipe_resources()
315 /* walk descriptors and setup pipes */ in ath6kl_usb_setup_pipe_resources()
358 pipe = &ar_usb->pipes[pipe_num]; in ath6kl_usb_setup_pipe_resources()
474 if (ar_usb->pipes[i].ar_usb != NULL) in ath6kl_usb_flush_all()
475 usb_kill_anchored_urbs(&ar_usb->pipes[i].urb_submitted); in ath6kl_usb_flush_all()
489 * ar_usb->pipes[ATH6KL_USB_PIPE_RX_CTRL].urb_cnt_thresh = in ath6kl_usb_start_recv_pipes()
490 * ar_usb->pipes[ATH6KL_USB_PIPE_RX_CTRL].urb_alloc/2; in ath6kl_usb_start_recv_pipes()
[all …]
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn31/ |
| H A D | dcn31_resource.c | 1618 display_e2e_pipe_params_st *pipes, in dcn31x_populate_dml_pipes_from_context() argument
1626 pipe_cnt = dcn20_populate_dml_pipes_from_context(dc, context, pipes, validate_mode); in dcn31x_populate_dml_pipes_from_context()
1629 pipes[i].pipe.src.gpuvm = 1; in dcn31x_populate_dml_pipes_from_context()
1631 //pipes[pipe_cnt].pipe.src.hostvm = dc->res_pool->hubbub->riommu_active; in dcn31x_populate_dml_pipes_from_context()
1632 pipes[i].pipe.src.hostvm = dc->vm_pa_config.is_hvm_enabled; in dcn31x_populate_dml_pipes_from_context()
1634 pipes[i].pipe.src.hostvm = false; in dcn31x_populate_dml_pipes_from_context()
1636 pipes[i].pipe.src.hostvm = true; in dcn31x_populate_dml_pipes_from_context()
1643 display_e2e_pipe_params_st *pipes, in dcn31_populate_dml_pipes_from_context() argument
1652 dcn31x_populate_dml_pipes_from_context(dc, context, pipes, validate_mode); in dcn31_populate_dml_pipes_from_context()
1672 pipes[pipe_cnt].pipe.src.immediate_flip = true; in dcn31_populate_dml_pipes_from_context()
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| /linux/drivers/staging/media/atomisp/pci/ |
| H A D | ia_css_stream_public.h | 117 to system memory and run pipes in offline mode */
157 * create the internal structures and fill in the configuration data and pipes
162 * @param[in] num_pipes The number of pipes to incorporate in the stream.
163 * @param[in] pipes The pipes.
167 * This function will create a stream with a given configuration and given pipes.
172 struct ia_css_pipe *pipes[],
213 * NOTE: this function will send stop event to pipes belong to this
232 * Destroy the stream and all the pipes related to it.
462 * update all pipes in the stream.
466 * stream. For image pipes that do not execute any ISP filters, this
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| /linux/net/nfc/nci/ |
| H A D | hci.c | 116 hdev->pipes[i].gate = NCI_HCI_INVALID_GATE; in nci_hci_reset_pipes()
117 hdev->pipes[i].host = NCI_HCI_INVALID_HOST; in nci_hci_reset_pipes()
127 if (ndev->hci_dev->pipes[i].host == host) { in nci_hci_reset_pipes_per_host()
128 ndev->hci_dev->pipes[i].gate = NCI_HCI_INVALID_GATE; in nci_hci_reset_pipes_per_host()
129 ndev->hci_dev->pipes[i].host = NCI_HCI_INVALID_HOST; in nci_hci_reset_pipes_per_host()
284 u8 gate = ndev->hci_dev->pipes[pipe].gate; in nci_hci_cmd_received()
313 ndev->hci_dev->pipes[new_pipe].gate = dest_gate; in nci_hci_cmd_received()
314 ndev->hci_dev->pipes[new_pipe].host = in nci_hci_cmd_received()
335 ndev->hci_dev->pipes[delete_info->pipe].gate = in nci_hci_cmd_received()
337 ndev->hci_dev->pipes[delete_info->pipe].host = in nci_hci_cmd_received()
[all …]
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| /linux/drivers/gpu/drm/arm/display/komeda/d71/ |
| H A D | d71_dev.c | 189 evts->pipes[0] |= KOMEDA_EVENT_FLIP; in d71_irq_handler()
191 evts->pipes[1] |= KOMEDA_EVENT_FLIP; in d71_irq_handler()
205 evts->pipes[0] |= get_pipeline_event(d71->pipes[0], gcu_status); in d71_irq_handler()
208 evts->pipes[1] |= get_pipeline_event(d71->pipes[1], gcu_status); in d71_irq_handler()
228 pipe = d71->pipes[i]; in d71_enable_irq()
247 pipe = d71->pipes[i]; in d71_disable_irq()
261 struct d71_pipeline *pipe = d71->pipes[master_pipe]; in d71_on_off_vblank()
435 d71->pipes[i] = to_d71_pipeline(pipe); in d71_enum_resources()
578 malidp_write32_mask(d71->pipes[i]->lpu_addr, LPU_TBU_CONTROL, in d71_connect_iommu()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn315/ |
| H A D | dcn315_resource.c | 1666 display_e2e_pipe_params_st *pipes, in dcn315_populate_dml_pipes_from_context() argument
1677 dcn31x_populate_dml_pipes_from_context(dc, context, pipes, validate_mode); in dcn315_populate_dml_pipes_from_context()
1693 pipes[pipe_cnt].pipe.src.immediate_flip = true; in dcn315_populate_dml_pipes_from_context()
1695 pipes[pipe_cnt].pipe.src.unbounded_req_mode = false; in dcn315_populate_dml_pipes_from_context()
1696 pipes[pipe_cnt].pipe.dest.vfront_porch = timing->v_front_porch; in dcn315_populate_dml_pipes_from_context()
1697 pipes[pipe_cnt].pipe.src.dcc_rate = 3; in dcn315_populate_dml_pipes_from_context()
1698 pipes[pipe_cnt].dout.dsc_input_bpc = 0; in dcn315_populate_dml_pipes_from_context()
1700 dcn31_zero_pipe_dcc_fraction(pipes, pipe_cnt); in dcn315_populate_dml_pipes_from_context()
1702 int bpp = source_format_to_bpp(pipes[pipe_cnt].pipe.src.source_format); in dcn315_populate_dml_pipes_from_context()
1717 pipes[pipe_cnt].pipe.src.det_size_override = approx_det_segs_required_for_pstate; in dcn315_populate_dml_pipes_from_context()
[all …]
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| /linux/drivers/nfc/st-nci/ |
| H A D | se.c | 34 /* Pipes */
106 /* Secure element pipes are created by secure element host */
162 /* On ST_NCI device pipes number are dynamics in st_nci_hci_load_session()
163 * If pipes are already created, hci_dev_up will fail. in st_nci_hci_load_session()
230 ndev->hci_dev->pipes[pipe_info[2]].gate = in st_nci_hci_load_session()
232 ndev->hci_dev->pipes[pipe_info[2]].host = in st_nci_hci_load_session()
385 u8 gate = ndev->hci_dev->pipes[pipe].gate; in st_nci_hci_event_received()
386 u8 host = ndev->hci_dev->pipes[pipe].host; in st_nci_hci_event_received()
406 u8 gate = ndev->hci_dev->pipes[pipe].gate; in st_nci_hci_cmd_received()
413 ndev->hci_dev->pipes[pipe].host != ST_NCI_UICC_HOST_ID) in st_nci_hci_cmd_received()
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| /linux/Documentation/filesystems/ |
| H A D | splice.rst | 2 splice and pipes
13 pipes API
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| /linux/net/nfc/hci/ |
| H A D | core.c | 42 hdev->pipes[i].gate = NFC_HCI_INVALID_GATE; in nfc_hci_reset_pipes()
43 hdev->pipes[i].dest_host = NFC_HCI_INVALID_HOST; in nfc_hci_reset_pipes()
54 if (hdev->pipes[i].dest_host != host) in nfc_hci_reset_pipes_per_host()
57 hdev->pipes[i].gate = NFC_HCI_INVALID_GATE; in nfc_hci_reset_pipes_per_host()
58 hdev->pipes[i].dest_host = NFC_HCI_INVALID_HOST; in nfc_hci_reset_pipes_per_host()
197 gate = hdev->pipes[pipe].gate; in nfc_hci_cmd_received()
218 hdev->pipes[create_info->pipe].gate = create_info->dest_gate; in nfc_hci_cmd_received()
219 hdev->pipes[create_info->pipe].dest_host = in nfc_hci_cmd_received()
240 hdev->pipes[delete_info->pipe].gate = NFC_HCI_INVALID_GATE; in nfc_hci_cmd_received()
241 hdev->pipes[delete_info->pipe].dest_host = NFC_HCI_INVALID_HOST; in nfc_hci_cmd_received()
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| /linux/sound/pci/echoaudio/ |
| H A D | echoaudio_dsp.c | 635 Output pipes (vmixer cards only)
637 This function assumes there are no more than 16 in/out busses or pipes
855 /* start_transport starts transport for a set of pipes.
856 The bits 1 in channel_mask specify what pipes to start. Only the bit of the
873 /* Keep track of which pipes are transporting */ in start_transport()
879 dev_err(chip->card->dev, "start_transport: No pipes to start!\n"); in start_transport()
898 /* Keep track of which pipes are transporting */ in pause_transport()
905 dev_dbg(chip->card->dev, "pause_transport: No pipes to stop!\n"); in pause_transport()
924 /* Keep track of which pipes are transporting */ in stop_transport()
931 dev_dbg(chip->card->dev, "stop_transport: No pipes to stop!\n"); in stop_transport()
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| /linux/drivers/nfc/st21nfca/ |
| H A D | core.c | 88 /* Secure element pipes are created by secure element host */
117 /* On ST21NFCA device pipes number are dynamics in st21nfca_hci_load_session()
118 * A maximum of 16 pipes can be created at the same time in st21nfca_hci_load_session()
119 * If pipes are already created, hci_dev_up will fail. in st21nfca_hci_load_session()
185 hdev->pipes[pipe_info[2]].gate = in st21nfca_hci_load_session()
187 hdev->pipes[pipe_info[2]].dest_host = in st21nfca_hci_load_session()
836 u8 gate = hdev->pipes[pipe].gate; in st21nfca_hci_cmd_received()
843 hdev->pipes[pipe].dest_host != NFC_HCI_UICC_HOST_ID) in st21nfca_hci_cmd_received()
892 u8 gate = hdev->pipes[pipe].gate; in st21nfca_hci_event_received()
893 u8 host = hdev->pipes[pipe].dest_host; in st21nfca_hci_event_received()
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| /linux/drivers/gpu/drm/vc4/tests/ |
| H A D | vc4_mock.c | 41 const struct vc4_mock_pipe_desc *pipes; member
47 .pipes = (struct vc4_mock_pipe_desc[]) { __VA_ARGS__ }, \
144 const struct vc4_mock_pipe_desc *pipe = &mock->pipes[i]; in __build_mock()
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| /linux/drivers/gpu/drm/radeon/ |
| H A D | r420.c | 101 pr_warn("Failed to wait GUI idle while programming pipes. Bad things might happen.\n"); in r420_pipes_init()
103 /* get max number of pipes */ in r420_pipes_init()
137 pr_warn("Failed to wait GUI idle while programming pipes. Bad things might happen.\n"); in r420_pipes_init()
149 pr_warn("Failed to wait GUI idle while programming pipes. Bad things might happen.\n"); in r420_pipes_init()
161 DRM_INFO("radeon: %d quad pipes, %d z pipes initialized.\n", in r420_pipes_init()
|