| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn20/ |
| H A D | dcn20_fpu.c | 991 display_e2e_pipe_params_st *pipes) in dcn20_populate_dml_writeback_from_context() argument
1004 pipes[pipe_cnt].dout.wb_enable = (wb_info->wb_enabled == true) ? 1 : 0; in dcn20_populate_dml_writeback_from_context()
1005 pipes[pipe_cnt].dout.num_active_wb++; in dcn20_populate_dml_writeback_from_context()
1006 pipes[pipe_cnt].dout.wb.wb_src_height = wb_info->dwb_params.cnv_params.crop_height; in dcn20_populate_dml_writeback_from_context()
1007 pipes[pipe_cnt].dout.wb.wb_src_width = wb_info->dwb_params.cnv_params.crop_width; in dcn20_populate_dml_writeback_from_context()
1008 pipes[pipe_cnt].dout.wb.wb_dst_width = wb_info->dwb_params.dest_width; in dcn20_populate_dml_writeback_from_context()
1009 pipes[pipe_cnt].dout.wb.wb_dst_height = wb_info->dwb_params.dest_height; in dcn20_populate_dml_writeback_from_context()
1010 pipes[pipe_cnt].dout.wb.wb_htaps_luma = 1; in dcn20_populate_dml_writeback_from_context()
1011 pipes[pipe_cnt].dout.wb.wb_vtaps_luma = 1; in dcn20_populate_dml_writeback_from_context()
1012 pipes[pipe_cnt].dout.wb.wb_htaps_chroma = wb_info->dwb_params.scaler_taps.h_taps_c; in dcn20_populate_dml_writeback_from_context()
[all …]
|
| H A D | dcn20_fpu.h | 33 display_e2e_pipe_params_st *pipes);
37 display_e2e_pipe_params_st *pipes,
41 display_e2e_pipe_params_st *pipes,
46 display_e2e_pipe_params_st *pipes,
50 display_e2e_pipe_params_st *pipes,
65 enum dc_validate_mode validate_mode, display_e2e_pipe_params_st *pipes);
77 display_e2e_pipe_params_st *pipes,
80 dc_validate_mode, display_e2e_pipe_params_st *pipes);
87 display_e2e_pipe_params_st *pipes);
|
| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn32/ |
| H A D | dcn32_fpu.c | 277 display_e2e_pipe_params_st *pipes, in dcn32_find_dummy_latency_index_for_fw_based_mclk_switch() argument
293 …dcn32_internal_validate_bw(dc, context, pipes, &pipe_cnt, &vlevel, DC_VALIDATE_MODE_AND_PROGRAMMIN… in dcn32_find_dummy_latency_index_for_fw_based_mclk_switch()
295 /* for subvp + DRR case, if subvp pipes are still present we support pstate */ in dcn32_find_dummy_latency_index_for_fw_based_mclk_switch()
322 * dcn32_helper_populate_phantom_dlg_params - Get DLG params for phantom pipes
326 * @pipes: [in] DML pipe params array
329 * This function must be called AFTER the phantom pipes are added to context
330 * and run through DML (so that the DLG params for the phantom pipes can be
331 * populated), and BEFORE we program the timing for the phantom pipes.
335 display_e2e_pipe_params_st *pipes, in dcn32_helper_populate_phantom_dlg_params() argument
349 pipes[pipe_idx].pipe.dest.vstartup_start = in dcn32_helper_populate_phantom_dlg_params()
[all …]
|
| /linux/drivers/platform/goldfish/ |
| H A D | goldfish_pipe.c | 126 /* pipe ID - index into goldfish_pipe_dev::pipes array */
143 /* doubly linked list of signalled pipes, protected by
176 * - pipes, pipes_capacity
177 * - [*pipes, *pipes + pipes_capacity) - array data
182 * in all allocated pipes
186 * the only operation that happens often is the signalled pipes array
194 * Array of the pipes of |pipes_capacity| elements,
197 struct goldfish_pipe **pipes; member
203 /* Head of a doubly linked list of signalled pipes */
521 pipe = dev->pipes[id]; in signalled_pipes_add_locked()
[all …]
|
| /linux/Documentation/gpu/amdgpu/display/ |
| H A D | mpo-overview.rst | 50 For this hardware example, we have 4 pipes (if you don't know what AMD pipe
53 configuration for optimal single display output (e.g., 2 pipes per plane).
56 display - will see 4 pipes in use, 2 per plane.
204 the two displays, we need to use 2 pipes. See the example below where we avoid
207 - 1 display (1 pipe) + MPO (1 pipe), we will use two pipes
208 - 2 displays (2 pipes) + MPO (1-2 pipes); we will use 4 pipes. MPO in the
209 middle of both displays needs 2 pipes.
210 - 3 Displays (3 pipes) + MPO (1-2 pipes), we need 5 pipes.
217 * When ASIC has 3 pipes, AMD hardware can NOT support 2 displays with MPO
218 * When ASIC has 4 pipes, AMD hardware can NOT support 3 displays with MPO
[all …]
|
| /linux/drivers/gpu/drm/amd/display/dc/dml/ |
| H A D | display_mode_vba.c | 46 const display_e2e_pipe_params_st *pipes,
54 const display_e2e_pipe_params_st *pipes, in dml_get_voltage_level() argument
60 || memcmp(pipes, mode_lib->vba.cache_pipes, in dml_get_voltage_level()
65 memcpy(mode_lib->vba.cache_pipes, pipes, sizeof(*pipes) * num_pipes); in dml_get_voltage_level()
68 if (need_recalculate && pipes[0].clks_cfg.dppclk_mhz != 0) in dml_get_voltage_level()
82 …attr(struct display_mode_lib *mode_lib, const display_e2e_pipe_params_st *pipes, unsigned int num_…
84 recalculate_params(mode_lib, pipes, num_pipes); \
130 …attr(struct display_mode_lib *mode_lib, const display_e2e_pipe_params_st *pipes, unsigned int num_…
133 recalculate_params(mode_lib, pipes, num_pipes); \
209 const display_e2e_pipe_params_st *pipes, in get_total_immediate_flip_bytes() argument
[all …]
|
| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn31/ |
| H A D | dcn31_fpu.c | 445 void dcn31_zero_pipe_dcc_fraction(display_e2e_pipe_params_st *pipes, in dcn31_zero_pipe_dcc_fraction() argument
450 pipes[pipe_cnt].pipe.src.dcc_fraction_of_zs_req_luma = 0; in dcn31_zero_pipe_dcc_fraction()
451 pipes[pipe_cnt].pipe.src.dcc_fraction_of_zs_req_chroma = 0; in dcn31_zero_pipe_dcc_fraction()
484 display_e2e_pipe_params_st *pipes, in dcn31_calculate_wm_and_dlg_fp() argument
506 pipes[0].clks_cfg.voltage = vlevel; in dcn31_calculate_wm_and_dlg_fp()
507 pipes[0].clks_cfg.dcfclk_mhz = dcfclk; in dcn31_calculate_wm_and_dlg_fp()
508 pipes[0].clks_cfg.socclk_mhz = context->bw_ctx.dml.soc.clock_limits[vlevel].socclk_mhz; in dcn31_calculate_wm_and_dlg_fp()
511 get_wm_z8_stutter_enter_exit(&context->bw_ctx.dml, pipes, pipe_cnt) * 1000; in dcn31_calculate_wm_and_dlg_fp()
513 …if (get_stutter_period(&context->bw_ctx.dml, pipes, pipe_cnt) < dc->debug.minimum_z8_residency_tim… in dcn31_calculate_wm_and_dlg_fp()
523 …context->bw_ctx.bw.dcn.watermarks.a.urgent_ns = get_wm_urgent(&context->bw_ctx.dml, pipes, pipe_cn… in dcn31_calculate_wm_and_dlg_fp()
[all …]
|
| H A D | dcn31_fpu.h | 35 void dcn31_zero_pipe_dcc_fraction(display_e2e_pipe_params_st *pipes,
43 display_e2e_pipe_params_st *pipes,
57 display_e2e_pipe_params_st *pipes,
|
| /linux/Documentation/driver-api/ |
| H A D | xillybus.rst | 17 -- Seekable pipes
23 -- Channels, pipes, and the message channel
85 project to another (the number of data pipes needed in each direction and
90 Xillybus presents independent data streams, which resemble pipes or TCP/IP
125 possibly pressing CTRL-C as some stage, even though the xillybus_* pipes have
128 The driver and hardware are designed to behave sensibly as pipes, including:
138 device files are treated like two independent pipes (except for sharing a
144 Xillybus pipes are configured (on the IP core) to be either synchronous or
154 For FPGA to host pipes, asynchronous pipes allow data transfer from the FPGA
156 has been requested by a read() call. On synchronous pipes, only the amount
[all …]
|
| /linux/drivers/gpu/drm/arm/display/komeda/ |
| H A D | komeda_event.c | 110 return (a->pipes[0] | a->pipes[1]) & in is_new_frame()
120 u64 evts_mask = evts->global | evts->pipes[0] | evts->pipes[1]; in komeda_print_events()
146 komeda_sprintf(&str, ", pipes[0]: "); in komeda_print_events()
147 evt_str(&str, evts->pipes[0]); in komeda_print_events()
148 komeda_sprintf(&str, ", pipes[1]: "); in komeda_print_events()
149 evt_str(&str, evts->pipes[1]); in komeda_print_events()
|
| /linux/drivers/gpu/drm/msm/disp/mdp5/ |
| H A D | mdp5_smp.h | 25 * In some hw, some blocks are statically allocated for certain pipes
40 * for the newly assigned pipes, so we don't take away blocks
41 * assigned to pipes that are still scanning out
43 * released clients, since at that point old pipes are no longer
53 /* assigned pipes (hw updated at _prepare_commit()): */
56 /* released pipes (hw updated at _complete_commit()): */
|
| /linux/drivers/gpu/drm/amd/display/dc/dml2_0/ |
| H A D | dml2_dc_resource_mgmt.c | 142 struct dc_state *state, unsigned int plane_id, unsigned int *pipes) in find_pipes_assigned_to_plane() argument
163 pipes[num_found++] = mpc_pipe->pipe_idx; in find_pipes_assigned_to_plane()
203 // // Verify the number of pipes assigned matches in validate_pipe_assignment()
216 // // TODO: could also do additional verification that the pipes in tree are the same as in validate_pipe_assignment()
262 * However this condition comes with a caveat. We need to ignore pipes that will in find_preferred_pipe_candidates()
380 // We like to pair pipes starting from the higher order indicies for combining in find_more_pipes_for_stream()
382 // Ignore any pipes that are the preferred or last resort candidate in find_more_pipes_for_stream()
449 // We like to pair pipes starting from the higher order indicies for combining in find_more_free_pipes()
451 // Ignore any pipes that are the preferred or last resort candidate in find_more_free_pipes()
483 static void sort_pipes_for_splitting(struct dc_plane_pipe_pool *pipes) in sort_pipes_for_splitting() argument
[all …]
|
| /linux/sound/sparc/ |
| H A D | dbri.c | 31 * memory and a serial device (long pipes, no. 0-15) or between two serial
32 * devices (short pipes, no. 16-31), or simply send a fixed data to a serial
33 * device (short pipes).
36 * each serial device (NT,TE,CHI). A timeslot is associated to 1 or 2 pipes
313 struct dbri_pipe pipes[DBRI_NO_PIPES]; /* DBRI's 32 data pipes */ member
364 #define D_PAUSE 0x1 /* Flush long pipes */
421 #define D_TS_ANCHOR (7<<10) /* Starting short pipes */
575 * Short data pipes transmit LSB first. The CS4215 receives MSB first. Grrr.
767 /* Initialize pipes */ in dbri_initialize()
769 dbri->pipes[n].desc = dbri->pipes[n].first_desc = -1; in dbri_initialize()
[all …]
|
| /linux/drivers/gpu/drm/tidss/ |
| H A D | tidss_kms.c | 142 struct pipe pipes[TIDSS_MAX_PORTS]; in tidss_dispc_modeset_init() local
199 pipes[num_pipes].hw_videoport = i; in tidss_dispc_modeset_init()
200 pipes[num_pipes].bridge = bridge; in tidss_dispc_modeset_init()
201 pipes[num_pipes].enc_type = enc_type; in tidss_dispc_modeset_init()
226 tcrtc = tidss_crtc_create(tidss, pipes[i].hw_videoport, in tidss_dispc_modeset_init()
235 ret = tidss_encoder_create(tidss, pipes[i].bridge, in tidss_dispc_modeset_init()
236 pipes[i].enc_type, in tidss_dispc_modeset_init()
|
| /linux/drivers/staging/media/atomisp/pci/ |
| H A D | ia_css_stream_public.h | 117 to system memory and run pipes in offline mode */
157 * create the internal structures and fill in the configuration data and pipes
162 * @param[in] num_pipes The number of pipes to incorporate in the stream.
163 * @param[in] pipes The pipes.
167 * This function will create a stream with a given configuration and given pipes.
172 struct ia_css_pipe *pipes[],
213 * NOTE: this function will send stop event to pipes belong to this
232 * Destroy the stream and all the pipes related to it.
462 * update all pipes in the stream.
466 * stream. For image pipes that do not execute any ISP filters, this
[all …]
|
| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn31/ |
| H A D | dcn31_resource.c | 1650 display_e2e_pipe_params_st *pipes, in dcn31x_populate_dml_pipes_from_context() argument
1658 pipe_cnt = dcn20_populate_dml_pipes_from_context(dc, context, pipes, validate_mode); in dcn31x_populate_dml_pipes_from_context()
1661 pipes[i].pipe.src.gpuvm = 1; in dcn31x_populate_dml_pipes_from_context()
1663 //pipes[pipe_cnt].pipe.src.hostvm = dc->res_pool->hubbub->riommu_active; in dcn31x_populate_dml_pipes_from_context()
1664 pipes[i].pipe.src.hostvm = dc->vm_pa_config.is_hvm_enabled; in dcn31x_populate_dml_pipes_from_context()
1666 pipes[i].pipe.src.hostvm = false; in dcn31x_populate_dml_pipes_from_context()
1668 pipes[i].pipe.src.hostvm = true; in dcn31x_populate_dml_pipes_from_context()
1675 display_e2e_pipe_params_st *pipes, in dcn31_populate_dml_pipes_from_context() argument
1684 dcn31x_populate_dml_pipes_from_context(dc, context, pipes, validate_mode); in dcn31_populate_dml_pipes_from_context()
1704 pipes[pipe_cnt].pipe.src.immediate_flip = true; in dcn31_populate_dml_pipes_from_context()
[all …]
|
| /linux/net/nfc/nci/ |
| H A D | hci.c | 116 hdev->pipes[i].gate = NCI_HCI_INVALID_GATE; in nci_hci_reset_pipes()
117 hdev->pipes[i].host = NCI_HCI_INVALID_HOST; in nci_hci_reset_pipes()
127 if (ndev->hci_dev->pipes[i].host == host) { in nci_hci_reset_pipes_per_host()
128 ndev->hci_dev->pipes[i].gate = NCI_HCI_INVALID_GATE; in nci_hci_reset_pipes_per_host()
129 ndev->hci_dev->pipes[i].host = NCI_HCI_INVALID_HOST; in nci_hci_reset_pipes_per_host()
284 u8 gate = ndev->hci_dev->pipes[pipe].gate; in nci_hci_cmd_received()
313 ndev->hci_dev->pipes[new_pipe].gate = dest_gate; in nci_hci_cmd_received()
314 ndev->hci_dev->pipes[new_pipe].host = in nci_hci_cmd_received()
335 ndev->hci_dev->pipes[delete_info->pipe].gate = in nci_hci_cmd_received()
337 ndev->hci_dev->pipes[delete_info->pipe].host = in nci_hci_cmd_received()
[all …]
|
| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn32/ |
| H A D | dcn32_resource.c | 1726 display_e2e_pipe_params_st *pipes, in dcn32_enable_phantom_stream() argument
1742 …dcn32_set_phantom_stream_timing(dc, context, ref_pipe, phantom_stream, pipes, pipe_cnt, dc_pipe_id… in dcn32_enable_phantom_stream()
1753 display_e2e_pipe_params_st *pipes, in dcn32_add_phantom_pipes() argument
1763 phantom_stream = dcn32_enable_phantom_stream(dc, context, pipes, pipe_cnt, index); in dcn32_add_phantom_pipes()
1772 // Build scaling params for phantom pipes which were newly added. in dcn32_add_phantom_pipes()
1773 // We determine which phantom pipes were added by comparing with in dcn32_add_phantom_pipes()
1780 // Log / remove phantom pipes since failed to build scaling params in dcn32_add_phantom_pipes()
1794 display_e2e_pipe_params_st *pipes = kzalloc_objs(display_e2e_pipe_params_st, in dml1_validate() local
1807 if (!pipes) in dml1_validate()
1811 out = dcn32_internal_validate_bw(dc, context, pipes, &pipe_cnt, &vlevel, validate_mode); in dml1_validate()
[all …]
|
| /linux/tools/testing/selftests/kvm/lib/ |
| H A D | userfaultfd_util.c | 123 TEST_ASSERT(uffd_desc->pipefds, "Failed to alloc pipes"); in uffd_setup_demand_paging()
156 int pipes[2]; in uffd_setup_demand_paging() local
158 ret = pipe2((int *) &pipes, O_CLOEXEC | O_NONBLOCK); in uffd_setup_demand_paging()
162 uffd_desc->pipefds[i] = pipes[1]; in uffd_setup_demand_paging()
168 uffd_desc->reader_args[i].pipe = pipes[0]; in uffd_setup_demand_paging()
|
| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn315/ |
| H A D | dcn315_resource.c | 1699 display_e2e_pipe_params_st *pipes, in dcn315_populate_dml_pipes_from_context() argument
1710 dcn31x_populate_dml_pipes_from_context(dc, context, pipes, validate_mode); in dcn315_populate_dml_pipes_from_context()
1726 pipes[pipe_cnt].pipe.src.immediate_flip = true; in dcn315_populate_dml_pipes_from_context()
1728 pipes[pipe_cnt].pipe.src.unbounded_req_mode = false; in dcn315_populate_dml_pipes_from_context()
1729 pipes[pipe_cnt].pipe.dest.vfront_porch = timing->v_front_porch; in dcn315_populate_dml_pipes_from_context()
1730 pipes[pipe_cnt].pipe.src.dcc_rate = 3; in dcn315_populate_dml_pipes_from_context()
1731 pipes[pipe_cnt].dout.dsc_input_bpc = 0; in dcn315_populate_dml_pipes_from_context()
1733 dcn31_zero_pipe_dcc_fraction(pipes, pipe_cnt); in dcn315_populate_dml_pipes_from_context()
1735 int bpp = source_format_to_bpp(pipes[pipe_cnt].pipe.src.source_format); in dcn315_populate_dml_pipes_from_context()
1750 pipes[pipe_cnt].pipe.src.det_size_override = approx_det_segs_required_for_pstate; in dcn315_populate_dml_pipes_from_context()
[all …]
|
| /linux/drivers/nfc/st-nci/ |
| H A D | se.c | 34 /* Pipes */
106 /* Secure element pipes are created by secure element host */
162 /* On ST_NCI device pipes number are dynamics in st_nci_hci_load_session()
163 * If pipes are already created, hci_dev_up will fail. in st_nci_hci_load_session()
230 ndev->hci_dev->pipes[pipe_info[2]].gate = in st_nci_hci_load_session()
232 ndev->hci_dev->pipes[pipe_info[2]].host = in st_nci_hci_load_session()
385 u8 gate = ndev->hci_dev->pipes[pipe].gate; in st_nci_hci_event_received()
386 u8 host = ndev->hci_dev->pipes[pipe].host; in st_nci_hci_event_received()
406 u8 gate = ndev->hci_dev->pipes[pipe].gate; in st_nci_hci_cmd_received()
413 ndev->hci_dev->pipes[pipe].host != ST_NCI_UICC_HOST_ID) in st_nci_hci_cmd_received()
|
| /linux/Documentation/filesystems/ |
| H A D | splice.rst | 2 splice and pipes
13 pipes API
|
| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn30/ |
| H A D | dcn30_resource.c | 1355 display_e2e_pipe_params_st *pipes, in dcn30_populate_dml_pipes_from_context() argument
1362 dcn20_populate_dml_pipes_from_context(dc, context, pipes, validate_mode); in dcn30_populate_dml_pipes_from_context()
1369 pipes[pipe_cnt++].pipe.scale_ratio_depth.lb_depth = in dcn30_populate_dml_pipes_from_context()
1377 struct dc *dc, struct resource_context *res_ctx, display_e2e_pipe_params_st *pipes) in dcn30_populate_dml_writeback_from_context() argument
1380 dcn30_fpu_populate_dml_writeback_from_context(dc, res_ctx, pipes); in dcn30_populate_dml_writeback_from_context()
1410 display_e2e_pipe_params_st *pipes, in dcn30_set_mcif_arb_params() argument
1441 dcn30_fpu_set_mcif_arb_params(wb_arb_params, dml, pipes, pipe_cnt, j); in dcn30_set_mcif_arb_params()
1642 * May need to fix pipes getting tossed from 1 opp to another on flip in dcn30_find_split_pipe()
1661 display_e2e_pipe_params_st *pipes, in dcn30_internal_validate_bw() argument
1675 ASSERT(pipes); in dcn30_internal_validate_bw()
[all …]
|
| /linux/net/nfc/hci/ |
| H A D | core.c | 42 hdev->pipes[i].gate = NFC_HCI_INVALID_GATE; in nfc_hci_reset_pipes()
43 hdev->pipes[i].dest_host = NFC_HCI_INVALID_HOST; in nfc_hci_reset_pipes()
54 if (hdev->pipes[i].dest_host != host) in nfc_hci_reset_pipes_per_host()
57 hdev->pipes[i].gate = NFC_HCI_INVALID_GATE; in nfc_hci_reset_pipes_per_host()
58 hdev->pipes[i].dest_host = NFC_HCI_INVALID_HOST; in nfc_hci_reset_pipes_per_host()
197 gate = hdev->pipes[pipe].gate; in nfc_hci_cmd_received()
218 hdev->pipes[create_info->pipe].gate = create_info->dest_gate; in nfc_hci_cmd_received()
219 hdev->pipes[create_info->pipe].dest_host = in nfc_hci_cmd_received()
240 hdev->pipes[delete_info->pipe].gate = NFC_HCI_INVALID_GATE; in nfc_hci_cmd_received()
241 hdev->pipes[delete_info->pipe].dest_host = NFC_HCI_INVALID_HOST; in nfc_hci_cmd_received()
[all …]
|
| /linux/sound/pci/echoaudio/ |
| H A D | echoaudio_dsp.c | 620 Output pipes (vmixer cards only)
622 This function assumes there are no more than 16 in/out busses or pipes
840 /* start_transport starts transport for a set of pipes.
841 The bits 1 in channel_mask specify what pipes to start. Only the bit of the
858 /* Keep track of which pipes are transporting */ in start_transport()
864 dev_err(chip->card->dev, "start_transport: No pipes to start!\n"); in start_transport()
883 /* Keep track of which pipes are transporting */ in pause_transport()
890 dev_dbg(chip->card->dev, "pause_transport: No pipes to stop!\n"); in pause_transport()
909 /* Keep track of which pipes are transporting */ in stop_transport()
916 dev_dbg(chip->card->dev, "stop_transport: No pipes to stop!\n"); in stop_transport()
[all …]
|