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/freebsd/sys/contrib/device-tree/Bindings/phy/
H A Dphy-rockchip-naneng-combphy.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/phy-rockchip-naneng-combphy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Heiko Stuebner <heiko@sntech.de>
15 - rockchip,rk3562-naneng-combphy
16 - rockchip,rk3568-naneng-combphy
17 - rockchip,rk3576-naneng-combphy
18 - rockchip,rk3588-naneng-combphy
25 - description: reference clock
[all …]
H A Dphy-rockchip-typec.txt1 * ROCKCHIP type-c PHY
2 ---------------------
5 - compatible : must be "rockchip,rk3399-typec-phy"
6 - reg: Address and length of the usb phy control register set
7 - rockchip,grf : phandle to the syscon managing the "general
9 - clocks : phandle + clock specifier for the phy clocks
10 - clock-names : string, clock name, must be "tcpdcore", "tcpdphy-ref";
11 - assigned-clocks: main clock, should be <&cru SCLK_UPHY0_TCPDCORE> or
13 - assigned-clock-rates : the phy core clk frequency, shall be: 50000000
14 - resets : a list of phandle + reset specifier pairs
[all …]
H A Drockchip,rk3399-typec-phy.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/phy/rockchip,rk3399-typec-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip Type-C PHY
10 - Heiko Stuebner <heiko@sntech.de>
14 const: rockchip,rk3399-typec-phy
22 clock-names:
24 - const: tcpdcore
25 - const: tcpdphy-ref
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H A Drockchip,pcie3-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/rockchip,pcie3-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Heiko Stuebner <heiko@sntech.de>
15 - rockchip,rk3568-pcie3-phy
16 - rockchip,rk3588-pcie3-phy
25 clock-names:
29 data-lanes:
32 (controller-number +1 )
[all …]
/freebsd/sys/contrib/device-tree/Bindings/soc/rockchip/
H A Dgrf.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/soc/rockchip/grf.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip General Register Files (GRF)
10 - Heiko Stuebner <heiko@sntech.de>
15 - items:
16 - enum:
17 - rockchip,rk3288-sgrf
18 - rockchip,rk3528-ioc-grf
[all …]
/freebsd/sys/arm64/rockchip/
H A Drk_grf.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
44 {"rockchip,rk3288-grf", 1},
45 {"rockchip,rk3328-grf", 1},
46 {"rockchip,rk3399-grf", 1},
47 {"rockchip,rk3399-pmugrf", 1},
48 {"rockchip,rk3568-grf", 1},
49 {"rockchip,rk3568-pmugrf", 1},
50 {"rockchip,rk3568-usb2phy-grf", 1},
51 {"rockchip,rk3566-pipe-grf", 1},
[all …]
H A Drk3568_combphy.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
49 #include <contrib/device-tree/include/dt-bindings/phy/phy.h>
57 {"rockchip,rk3568-naneng-combphy", 1},
174 switch (sc->mode) { in rk3568_combphy_enable()
179 bus_write_4(sc->mem, PHYREG7, in rk3568_combphy_enable()
183 bus_write_4(sc->mem, PHYREG15, in rk3568_combphy_enable()
184 bus_read_4(sc->mem, PHYREG15) | PHYREG15_CTLE_EN); in rk3568_combphy_enable()
187 SYSCON_WRITE_4(sc->pipe_phy_grf, PIPE_PHY_GRF_PIPE_CON3, in rk3568_combphy_enable()
190 SYSCON_WRITE_4(sc->pipe_phy_grf, PIPE_PHY_GRF_PIPE_CON2, in rk3568_combphy_enable()
[all …]
H A Drk_typec_phy.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
112 { "rockchip,rk3399-typec-phy", 1 },
118 { -1, 0 }
124 struct syscon *grf; member
134 #define RK_TYPEC_PHY_READ(sc, reg) bus_read_4(sc->res, (reg))
135 #define RK_TYPEC_PHY_WRITE(sc, reg, val) bus_write_4(sc->res, (reg), (val))
164 reg = SYSCON_READ_4(sc->grf, GRF_USB3PHY_CON0(sc->phy_ctrl_id)); in rk_typec_phy_set_usb2_only()
171 SYSCON_WRITE_4(sc->grf, GRF_USB3PHY_CON0(sc->phy_ctrl_id), reg); in rk_typec_phy_set_usb2_only()
174 reg = SYSCON_READ_4(sc->grf, GRF_USB3OTG_CON1(sc->phy_ctrl_id)); in rk_typec_phy_set_usb2_only()
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/rockchip/
H A Drk3588-extra.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include "rk3588-base.dtsi"
7 #include "rk3588-extra-pinctrl.dtsi"
10 hdmi1_sound: hdmi1-sound {
11 compatible = "simple-audio-card";
12 simple-audio-card,format = "i2s";
13 simple-audio-card,mclk-fs = <128>;
14 simple-audio-card,name = "hdmi1";
17 simple-audio-card,codec {
18 sound-dai = <&hdmi1>;
[all …]
H A Drk3568.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include "rk356x-base.dtsi"
11 cpu0_opp_table: opp-table-0 {
12 compatible = "operating-points-v2";
13 opp-shared;
15 opp-408000000 {
16 opp-hz = /bits/ 64 <408000000>;
17 opp-microvolt = <850000 850000 1150000>;
18 clock-latency-ns = <40000>;
21 opp-600000000 {
[all …]
H A Drk356x.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/rk3568-cru.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/phy/phy.h>
10 #include <dt-bindings/pinctrl/rockchip.h>
11 #include <dt-bindings/power/rk3568-power.h>
12 #include <dt-bindings/soc/rockchip,boot-mode.h>
13 #include <dt-bindings/thermal/thermal.h>
16 interrupt-parent = <&gic>;
[all …]
H A Drk356x-base.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/rk3568-cru.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/phy/phy.h>
10 #include <dt-bindings/pinctrl/rockchip.h>
11 #include <dt-bindings/power/rk3568-power.h>
12 #include <dt-bindings/soc/rockchip,boot-mode.h>
13 #include <dt-bindings/thermal/thermal.h>
16 interrupt-parent = <&gic>;
[all …]
H A Drk3576.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/rockchip,rk3576-cru.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/phy/phy.h>
10 #include <dt-bindings/pinctrl/rockchip.h>
11 #include <dt-bindings/power/rockchip,rk3576-power.h>
12 #include <dt-bindings/reset/rockchip,rk3576-cru.h>
13 #include <dt-bindings/soc/rockchip,boot-mode.h>
18 interrupt-parent = <&gic>;
[all …]
H A Drk3588-base.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/rockchip,rk3588-cru.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/phy/phy.h>
10 #include <dt-bindings/power/rk3588-power.h>
11 #include <dt-bindings/reset/rockchip,rk3588-cru.h>
12 #include <dt-bindings/phy/phy.h>
13 #include <dt-bindings/ata/ahci.h>
14 #include <dt-bindings/thermal/thermal.h>
[all …]
H A Drk3566-base.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 #include "rk356x-base.dtsi"
10 compatible = "rockchip,rk3566-pipe-grf", "syscon";
14 power-domain@RK3568_PD_PIPE {
22 #power-domain-cells = <0>;
28 phy-names = "usb2-phy";
30 maximum-speed = "high-speed";
34 compatible = "rockchip,rk3566-vop";
H A Drk3562.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/rockchip,rk3562-cru.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/phy/phy.h>
10 #include <dt-bindings/power/rockchip,rk3562-power.h>
11 #include <dt-bindings/pinctrl/rockchip.h>
12 #include <dt-bindings/reset/rockchip,rk3562-cru.h>
13 #include <dt-bindings/soc/rockchip,boot-mode.h>
14 #include <dt-bindings/thermal/thermal.h>
[all …]
H A Drk3399-base.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/rk3399-cru.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/pinctrl/rockchip.h>
11 #include <dt-bindings/power/rk3399-power.h>
12 #include <dt-bindings/thermal/thermal.h>
17 interrupt-parent = <&gic>;
18 #address-cells = <2>;
[all …]
/freebsd/sys/contrib/device-tree/Bindings/usb/
H A Drockchip,dwc3.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Heiko Stuebner <heiko@sntech.de>
18 Documentation/devicetree/bindings/phy/rockchip,inno-usb2phy.yaml
20 Type-C PHY
21 Documentation/devicetree/bindings/phy/rockchip,rk3399-typec-phy.yaml
28 - rockchip,rk3328-dwc3
29 - rockchip,rk3562-dwc3
30 - rockchip,rk3568-dwc3
[all …]