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/linux/arch/arm64/boot/dts/mediatek/
H A Dmt7986a-bananapi-bpi-r3.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
5 * Frank Wunderlich <frank-w@public-files.de>
9 /dts-v1/;
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/input/input.h>
12 #include <dt-bindings/leds/common.h>
13 #include <dt-bindings/pinctrl/mt65xx.h>
18 model = "Bananapi BPI-R3";
19 chassis-type = "embedded";
20 compatible = "bananapi,bpi-r3", "mediatek,mt7986a";
[all …]
H A Dmt8186-corsola-steelix.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 /dts-v1/;
7 #include "mt8186-corsola.dtsi"
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
12 pp1000_edpbrdg: regulator-pp1000-edpbrdg {
13 compatible = "regulator-fixed";
14 regulator-name = "pp1000_edpbrdg";
15 pinctrl-names = "default";
16 pinctrl-0 = <&en_pp1000_edpbrdg>;
[all …]
H A Dmt6795-sony-xperia-m5.dts1 // SPDX-License-Identifier: GPL-2.0-only
7 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
14 compatible = "sony,xperia-m5", "mediatek,mt6795";
15 chassis-type = "handset";
26 compatible = "led-backlight";
29 default-brightness-level = <300>;
32 led-controller-display {
33 compatible = "pwm-leds";
35 disp_led_pwm: led-0 {
[all …]
H A Dmt8183-kukui-jacuzzi-pico6.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 /dts-v1/;
7 #include "mt8183-kukui-jacuzzi.dtsi"
8 #include "mt8183-kukui-audio-ts3a227e-max98357a.dtsi"
12 chassis-type = "convertible";
13 compatible = "google,pico-sku2", "google,pico", "mediatek,mt8183";
15 bt_wakeup: bt-wakeup {
16 compatible = "gpio-keys";
17 pinctrl-names = "default";
18 pinctrl-0 = <&bt_pins_wakeup>;
[all …]
H A Dmt7986a-bananapi-bpi-r3-mini.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
4 * Authors: Frank Wunderlich <frank-w@public-files.de>
9 /dts-v1/;
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/leds/common.h>
14 #include <dt-bindings/pinctrl/mt65xx.h>
19 model = "Bananapi BPI-R3 Mini";
20 chassis-type = "embedded";
21 compatible = "bananapi,bpi-r3mini", "mediatek,mt7986a";
[all …]
H A Dmt7622-bananapi-bpi-r64.dts5 * SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 /dts-v1/;
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/leds/common.h>
17 model = "Bananapi BPI-R64";
18 chassis-type = "embedded";
19 compatible = "bananapi,bpi-r64", "mediatek,mt7622";
26 stdout-path = "serial0:115200n8";
32 proc-supply = <&mt6380_vcpu_reg>;
[all …]
H A Dmt8192-asurada-hayato-r1.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
5 /dts-v1/;
6 #include "mt8192-asurada.dtsi"
10 chassis-type = "convertible";
11 compatible = "google,hayato-rev1", "google,hayato", "mediatek,mt8192";
15 function-row-physmap = <
43 &pio {
44 bt_pins: bt-pins {
45 pins-bt-kill {
47 output-low;
[all …]
H A Dmt8186-corsola-krabby.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 /dts-v1/;
7 #include "mt8186-corsola.dtsi"
8 #include <dt-bindings/gpio/gpio.h>
17 remote-endpoint = <&ps8640_in>;
21 clock-frequency = <400000>;
23 edp-bridge@8 {
26 pinctrl-names = "default";
27 pinctrl-0 = <&ps8640_pins>;
28 powerdown-gpios = <&pio 96 GPIO_ACTIVE_LOW>;
[all …]
H A Dmt7622-rfb1.dts6 * SPDX-License-Identifier: (GPL-2.0 OR MIT)
9 /dts-v1/;
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/gpio/gpio.h>
18 chassis-type = "embedded";
19 compatible = "mediatek,mt7622-rfb1", "mediatek,mt7622";
26 stdout-path = "serial0:115200n8";
32 proc-supply = <&mt6380_vcpu_reg>;
33 sram-supply = <&mt6380_vm_reg>;
37 proc-supply = <&mt6380_vcpu_reg>;
[all …]
H A Dmt7986b-rfb.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
7 /dts-v1/;
12 chassis-type = "embedded";
13 compatible = "mediatek,mt7986b-rfb", "mediatek,mt7986b";
20 stdout-path = "serial0:115200n8";
37 compatible = "mediatek,eth-mac";
39 phy-mode = "2500base-x";
41 fixed-link {
43 full-duplex;
49 compatible = "mediatek,eth-mac";
[all …]
/linux/drivers/pinctrl/
H A Dpinctrl-at91.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2011-2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
29 #include "pinctrl-at91.h"
42 * @pioc_hwirq: PIO bank interrupt identifier on AIC
43 * @pioc_virq: PIO bank Linux virtual interrupt
44 * @regbase: PIO bank virtual address
91 * from the corresponding device datasheet. This value is different for pins
114 * struct at91_pmx_func - describes AT91 pinmux functions
134 * struct at91_pmx_pin - describes an At91 pin mux
148 * struct at91_pin_group - describes an At91 pin group
[all …]
H A Dpinctrl-at91-pio4.c1 // SPDX-License-Identifier: GPL-2.0-only
9 #include <dt-bindings/pinctrl/at91.h>
21 #include <linux/pinctrl/pinconf-generic.h>
28 #include "pinctrl-utils.h"
32 * In order to not introduce confusion between Atmel PIO groups and pinctrl
33 * framework groups, Atmel PIO groups will be called banks, line is kept to
80 * struct atmel_pioctrl_data - Atmel PIO controller (pinmux + gpio) data struct
81 * @nbanks: number of PIO banks
107 * struct atmel_pioctrl - Atmel PIO controller (pinmux + gpio)
110 * @nbanks: number of PIO groups, it can vary depending on the SoC.
[all …]
/linux/Documentation/devicetree/bindings/pinctrl/
H A Dmediatek,mt8195-pinctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/mediatek,mt8195-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sean Wang <sean.wang@mediatek.com>
13 The MediaTek's MT8195 Pin controller is used to control SoC pins.
17 const: mediatek,mt8195-pinctrl
19 gpio-controller: true
21 '#gpio-cells':
28 gpio-ranges:
[all …]
H A Dmediatek,mt8186-pinctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/mediatek,mt8186-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sean Wang <sean.wang@mediatek.com>
13 The MediaTek's MT8186 Pin controller is used to control SoC pins.
17 const: mediatek,mt8186-pinctrl
19 gpio-controller: true
21 '#gpio-cells':
28 gpio-ranges:
[all …]
H A Dpinctrl-st.txt3 Each multi-function pin is controlled, driven and routed through the
4 PIO multiplexing block. Each pin supports GPIO functionality (ALT0)
5 and multiple alternate functions(ALT1 - ALTx) that directly connect
9 Pull Up (PU) are driven by the related PIO block.
11 ST pinctrl driver controls PIO multiplexing block and also interacts with
14 GPIO bank can have one of the two possible types of interrupt-wirings.
20 | |----> [gpio-bank (n) ]
21 | |----> [gpio-bank (n + 1)]
22 [irqN]-- | irq-mux |----> [gpio-bank (n + 2)]
23 | |----> [gpio-bank (... )]
[all …]
H A Dmediatek,mt8188-pinctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/mediatek,mt8188-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Hui Liu <hui.liu@mediatek.com>
13 The MediaTek's MT8188 Pin controller is used to control SoC pins.
17 const: mediatek,mt8188-pinctrl
19 gpio-controller: true
21 '#gpio-cells':
25 are defined in <dt-bindings/gpio/gpio.h>.
[all …]
H A Dmediatek,mt8192-pinctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/mediatek,mt8192-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sean Wang <sean.wang@mediatek.com>
13 The MediaTek's MT8192 Pin controller is used to control SoC pins.
17 const: mediatek,mt8192-pinctrl
19 gpio-controller: true
21 '#gpio-cells':
28 gpio-ranges:
[all …]
/linux/arch/arm/boot/dts/mediatek/
H A Dmt7629-rfb.dts1 // SPDX-License-Identifier: GPL-2.0
7 /dts-v1/;
8 #include <dt-bindings/input/input.h>
13 compatible = "mediatek,mt7629-rfb", "mediatek,mt7629";
20 stdout-path = "serial0:115200n8";
23 gpio-keys {
24 compatible = "gpio-keys";
26 button-reset {
29 gpios = <&pio 60 GPIO_ACTIVE_LOW>;
32 button-wps {
[all …]
/linux/arch/arm/boot/dts/st/
H A Dstih407-pinctrl.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
6 #include "st-pincfg.h"
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 /* 0-5: PIO_SBC */
18 /* 10-19: PIO_FRONT0 */
31 /* 30-35: PIO_REAR */
38 /* 40-42: PIO_FLASH */
45 pin-controller-sbc@961f080 {
46 #address-cells = <1>;
47 #size-cells = <1>;
[all …]
/linux/arch/arm/boot/dts/allwinner/
H A Dsun5i-a13-utoo-p66.dts4 * This file is dual-licensed: you can use it either under the terms
43 /dts-v1/;
44 #include "sun5i-a13.dtsi"
45 #include "sun5i-reference-design-tablet.dtsi"
46 #include <dt-bindings/interrupt-controller/irq.h>
50 compatible = "utoo,p66", "allwinner,sun5i-a13";
52 /* The P66 uses the uart pins as gpios */
54 /delete-property/serial0;
58 /delete-property/stdout-path;
63 compatible = "i2c-gpio";
[all …]
H A Dsun7i-a20-olinuxino-micro.dts4 * Maxime Ripard <maxime.ripard@free-electrons.com>
6 * This file is dual-licensed: you can use it either under the terms
45 /dts-v1/;
46 #include "sun7i-a20.dtsi"
47 #include "sunxi-common-regulators.dtsi"
49 #include <dt-bindings/gpio/gpio.h>
50 #include <dt-bindings/input/input.h>
51 #include <dt-bindings/interrupt-controller/irq.h>
54 model = "Olimex A20-Olinuxino Micro";
55 compatible = "olimex,a20-olinuxino-micro", "allwinner,sun7i-a20";
[all …]
H A Dsun7i-a20-olinuxino-lime.dts2 * This is based on sun4i-a10-olinuxino-lime.dts
4 * Copyright 2014 - Hans de Goede <hdegoede@redhat.com>
7 * This file is dual-licensed: you can use it either under the terms
46 /dts-v1/;
47 #include "sun7i-a20.dtsi"
48 #include "sunxi-common-regulators.dtsi"
50 #include <dt-bindings/gpio/gpio.h>
51 #include <dt-bindings/interrupt-controller/irq.h>
54 model = "Olimex A20-OLinuXino-LIME";
55 compatible = "olimex,a20-olinuxino-lime", "allwinner,sun7i-a20";
[all …]
H A Dsun7i-a20-itead-ibox.dts2 * Copyright 2015 - Marcus Cooper <codekipper@gmail.com>
4 * This file is dual-licensed: you can use it either under the terms
43 /dts-v1/;
44 #include "sun7i-a20.dtsi"
45 #include "sunxi-itead-core-common.dtsi"
49 compatible = "itead,itead-ibox-a20", "allwinner,sun7i-a20";
52 compatible = "gpio-leds";
53 pinctrl-names = "default";
54 pinctrl-0 = <&led_pins_itead_core>;
56 led-0 {
[all …]
H A Dsun8i-v3s-anbernic-rg-nano.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 /dts-v1/;
4 #include <dt-bindings/input/linux-event-codes.h>
5 #include "sun8i-v3s.dtsi"
6 #include "sunxi-common-regulators.dtsi"
10 compatible = "anbernic,rg-nano", "allwinner,sun8i-v3s";
19 compatible = "pwm-backlight";
20 brightness-levels = <0 1 2 3 8 14 21 32 46 60 80 100>;
21 default-brightness-level = <11>;
22 power-supply = <&reg_vcc5v0>;
[all …]
H A Dsun7i-a20-olinuxino-lime2.dts2 * Copyright 2014 - Iain Paton <ipaton0@gmail.com>
4 * This file is dual-licensed: you can use it either under the terms
43 /dts-v1/;
44 #include "sun7i-a20.dtsi"
45 #include "sunxi-common-regulators.dtsi"
47 #include <dt-bindings/gpio/gpio.h>
48 #include <dt-bindings/interrupt-controller/irq.h>
51 model = "Olimex A20-OLinuXino-LIME2";
52 compatible = "olimex,a20-olinuxino-lime2", "allwinner,sun7i-a20";
59 stdout-path = "serial0:115200n8";
[all …]

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