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/freebsd/sys/contrib/device-tree/src/arm64/exynos/
H A Dexynos2200-pinctrl.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
3 * Samsung's Exynos 2200 SoC pin-mux and pin-config device tree source
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include "exynos-pinctrl.h"
12 gpa0: gpa0-gpio-bank {
13 gpio-controller;
14 #gpio-cells = <2>;
16 interrupt-controller;
17 #interrupt-cells = <2>;
18 interrupt-parent = <&gic>;
[all …]
H A Dexynos8895-pinctrl.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
3 * Samsung's Exynos 8895 SoC pin-mux and pin-config device tree source
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include "exynos-pinctrl.h"
12 gph0: gph0-gpio-bank {
13 gpio-controller;
14 #gpio-cells = <2>;
16 interrupt-controller;
17 #interrupt-cells = <2>;
20 gph1: gph1-gpio-bank {
[all …]
H A Dexynos990-pinctrl.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
3 * Samsung Exynos 990 pin-mux and pin-config device tree source
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include "exynos-pinctrl.h"
12 gpa0: gpa0-gpio-bank {
13 gpio-controller;
14 #gpio-cells = <2>;
16 interrupt-controller;
17 #interrupt-cells = <2>;
18 interrupt-parent = <&gic>;
[all …]
H A Dexynosautov9-pinctrl.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Samsung's ExynosAutov9 SoC pin-mux and pin-config device tree source
7 * Samsung's ExynosAutov9 SoC pin-mux and pin-config options are listed as
11 #include "exynos-pinctrl.h"
14 gpa0: gpa0-gpio-bank {
15 gpio-controller;
16 #gpio-cells = <2>;
17 interrupt-controller;
18 #interrupt-cells = <2>;
19 interrupt-parent = <&gic>;
[all …]
H A Dexynos7885-pinctrl.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Samsung Exynos7885 SoC pin-mux and pin-config device tree source
8 * Samsung's Exynos7885 SoC pin-mux and pin-config options are listed as
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include "exynos-pinctrl.h"
16 etc0: etc0-gpio-bank {
17 gpio-controller;
18 #gpio-cells = <2>;
20 interrupt-controller;
21 #interrupt-cells = <2>;
[all …]
H A Dexynos5433-pinctrl.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Samsung's Exynos5433 SoC pin-mux and pin-config device tree source
8 * Samsung's Exynos5433 SoC pin-mux and pin-config options are listed as device
12 #include "exynos-pinctrl.h"
15 pin- ## _pin { \
16 samsung,pins = #_pin; \
17 samsung,pin-function = <EXYNOS_PIN_FUNC_ ##_func>; \
18 samsung,pin-pud = <EXYNOS_PIN_PULL_ ##_pull>; \
19 samsung,pin-drv = <EXYNOS5433_PIN_DRV_ ##_drv>; \
32 gpa0: gpa0-gpio-bank {
[all …]
H A Dexynos7870-pinctrl.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Samsung Exynos7870 SoC pin-mux and pin-config device tree source
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include "exynos-pinctrl.h"
13 etc0: etc0-gpio-bank {
14 gpio-controller;
15 #gpio-cells = <2>;
17 interrupt-controller;
18 #interrupt-cells = <2>;
21 etc1: etc1-gpio-bank {
[all …]
H A Dexynos7-pinctrl.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Samsung's Exynos7 SoC pin-mux and pin-config device tree source
8 * Samsung's Exynos7 SoC pin-mux and pin-config options are listed as
12 #include "exynos-pinctrl.h"
15 gpa0: gpa0-gpio-bank {
16 gpio-controller;
17 #gpio-cells = <2>;
19 interrupt-controller;
20 interrupt-parent = <&gic>;
21 #interrupt-cells = <2>;
[all …]
/freebsd/sys/contrib/device-tree/src/arm/samsung/
H A Dexynos5250-pinctrl.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Samsung's Exynos5250 SoC pin-mux and pin-config device tree source
8 * Samsung's Exynos5250 SoC pin-mux and pin-config options are listed as device
12 #include "exynos-pinctrl.h"
15 gpa0: gpa0-gpio-bank {
16 gpio-controller;
17 #gpio-cells = <2>;
19 interrupt-controller;
20 #interrupt-cells = <2>;
23 gpa1: gpa1-gpio-bank {
[all …]
H A Dexynos5260-pinctrl.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Samsung's Exynos5260 SoC pin-mux and pin-config device tree source
8 * Samsung's Exynos5260 SoC pin-mux and pin-config options are listed as device
12 #include "exynos-pinctrl.h"
15 gpa0: gpa0-gpio-bank {
16 gpio-controller;
17 #gpio-cells = <2>;
19 interrupt-controller;
20 #interrupt-cells = <2>;
23 gpa1: gpa1-gpio-bank {
[all …]
H A Dexynos5420-pinctrl.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Samsung's Exynos5420 SoC pin-mux and pin-config device tree source
8 * Samsung's Exynos5420 SoC pin-mux and pin-config options are listed as device
12 #include "exynos-pinctrl.h"
15 gpy7: gpy7-gpio-bank {
16 gpio-controller;
17 #gpio-cells = <2>;
19 interrupt-controller;
20 #interrupt-cells = <2>;
23 gpx0: gpx0-gpio-bank {
[all …]
H A Dexynos4210-pinctrl.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Samsung's Exynos4210 SoC pin-mux and pin-config device tree source
5 * Copyright (c) 2011-2012 Samsung Electronics Co., Ltd.
7 * Copyright (c) 2011-2012 Linaro Ltd.
10 * Samsung's Exynos4210 SoC pin-mux and pin-config options are listed as device
14 #include "exynos-pinctrl.h"
17 gpa0: gpa0-gpio-bank {
18 gpio-controller;
19 #gpio-cells = <2>;
21 interrupt-controller;
[all …]
H A Dexynos4x12-pinctrl.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Samsung's Exynos4x12 SoCs pin-mux and pin-config device tree source
8 * Samsung's Exynos4x12 SoCs pin-mux and pin-config options are listed as device
12 #include "exynos-pinctrl.h"
15 pin- ## _pin { \
16 samsung,pins = #_pin; \
17 samsung,pin-con-pdn = <EXYNOS_PIN_PDN_ ##_mode>; \
18 samsung,pin-pud-pdn = <EXYNOS_PIN_PULL_ ##_pull>; \
22 gpa0: gpa0-gpio-bank {
23 gpio-controller;
[all …]
H A Dexynos3250-pinctrl.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Samsung's Exynos3250 SoCs pin-mux and pin-config device tree source
8 * Samsung's Exynos3250 SoCs pin-mux and pin-config options are listed as device
12 #include "exynos-pinctrl.h"
15 pin- ## _pin { \
16 samsung,pins = #_pin; \
17 samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; \
18 samsung,pin-pud = <EXYNOS_PIN_PULL_ ##_pull>; \
19 samsung,pin-drv = <EXYNOS4_PIN_DRV_ ##_drv>; \
23 pin- ## _pin { \
[all …]
H A Ds5pv210-pinctrl.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Samsung's S5PV210 SoC device tree source - pin control-related
6 * Copyright (c) 2013-2014 Samsung Electronics, Co. Ltd.
11 * Samsung's S5PV210 SoC pin banks, pin-mux and pin-config options are
15 #include "s5pv210-pinctrl.h"
18 pin- ## _pi
[all...]
H A Dexynos5410-pinctrl.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Exynos5410 SoC pin-mux and pin-config device tree source
9 #include "exynos-pinctrl.h"
12 gpa0: gpa0-gpio-bank {
13 gpio-controller;
14 #gpio-cells = <2>;
16 interrupt-controller;
17 #interrupt-cells = <2>;
20 gpa1: gpa1-gpio-bank {
21 gpio-controller;
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/exynos/google/
H A Dgs101-pinctrl.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * GS101 SoC pin-mux and pin-config device tree source
5 * Copyright 2019-2023 Google LLC
6 * Copyright 2023 Linaro Ltd - <peter.griffin@linaro.org>
9 #include "gs101-pinctrl.h"
12 gpa0: gpa0-gpio-bank {
13 gpio-controller;
14 #gpio-cells = <2>;
15 interrupt-controller;
16 #interrupt-cells = <2>;
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/tesla/
H A Dfsd-pinctrl.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Tesla Full Self-Driving SoC device tree source
5 * Copyright (c) 2017-2021 Samsung Electronics Co., Ltd.
7 * Copyright (c) 2017-2021 Tesla, Inc.
11 #include "fsd-pinctrl.h"
14 gpf0: gpf0-gpio-bank {
15 gpio-controller;
16 #gpio-cells = <2>;
18 interrupt-controller;
19 #interrupt-cells = <2>;
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/mediatek/
H A Dmt8186-evb.dts1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
5 /dts-v1/;
10 chassis-type = "embedded";
11 compatible = "mediatek,mt8186-evb", "mediatek,mt8186";
18 stdout-path = "serial0:921600n8";
30 clock-frequency = <400000>;
31 pinctrl-names = "default";
32 pinctrl-0 = <&i2c0_pins>;
38 clock-frequency = <400000>;
39 i2c-scl-internal-delay-ns = <8000>;
[all …]
H A Dmt8188-geralt.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
5 /dts-v1/;
6 #include <dt-bindings/gpio/gpio.h>
24 backlight_lcd0: backlight-lcd0 {
25 compatible = "pwm-backlight";
26 brightness-levels = <0 1023>;
27 default-brightness-level = <576>;
28 enable-gpios = <&pio 1 GPIO_ACTIVE_HIGH>;
29 num-interpolated-steps = <1023>;
30 power-supply = <&ppvar_sys>;
[all …]
H A Dmt8188-evb.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
5 /dts-v1/;
11 compatible = "mediatek,mt8188-evb", "mediatek,mt8188";
26 stdout-path = "serial0:115200n8";
34 reserved_memory: reserved-memory {
35 #address-cells = <2>;
36 #size-cells = <2>;
40 compatible = "shared-dma-pool";
42 no-map;
52 pinctrl-names = "default";
[all …]
/freebsd/sys/dev/gpio/
H A Dofw_gpiobus.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
33 #include <sys/bus.h>
51 * Utility functions for easier handling of OFW GPIO pins.
71 rv = ofw_bus_parse_xref_list_alloc(cnode, prop_name, "#gpio-cells", in gpio_pin_get_by_ofw_propidx()
83 /* Test if GPIO bus already exist. */ in gpio_pin_get_by_ofw_propidx()
133 rv = ofw_bus_find_string_index(node, "gpio-names", name, &idx); in gpio_pin_get_by_ofw_name()
143 ofw_gpiobus_add_fdt_child(device_t bus, const char *drvname, phandle_t child) in ofw_gpiobus_add_fdt_child() argument
154 childdev = ofw_bus_find_child_device_by_phandle(bus, child); in ofw_gpiobus_add_fdt_child()
159 * Set up the GPIO child and OFW bus layer devinfo and add it to bus. in ofw_gpiobus_add_fdt_child()
[all …]
H A Dgpiobus.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
31 #include <sys/bus.h>
78 * low-level controller driver in struct gpio_pin. Currently, only pins
80 * the FDT properties. In theory, these flags are defined per-platform. In
81 * practice they are always the flags from the dt-bindings/gpio/gpio.h file.
82 * The only one of those flags we currently support is for handling active-low
83 * pins, so we just define that flag here instead of including a GPL'd header.
88 * XXX -> Move me to better place - gpio_subr.c?
104 gpio_data->gpio_pin_num = pin->pin; in gpio_alloc_intr_resource()
[all …]
/freebsd/share/man/man4/
H A Dgpioiic.430 .Nd GPIO I2C bit-banging device driver
35 .Bd -ragged -offset indent
45 .Bd -literal -offset indent
51 driver provides an IIC bit-banging interface using two GPIO pins for the
52 SCL and SDA lines on the bus.
55 simulates an open collector kind of output when managing the pins on the
56 bus, even on systems which don't directly support configuring gpio pins
58 The pins are never driven to the logical value of '1'.
59 They are driven to '0' or switched to input mode (Hi-Z/tri-state), and
61 other device on the bus is driving it to 0.
[all …]
/freebsd/sys/dev/iicbus/
H A Diic_recover_bus.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
32 * Helper code to recover a hung i2c bus by bit-banging a recovery sequence.
34 * An i2c bus can be hung by a slave driving the clock (rare) or data lines low.
35 * The most common cause is a partially-completed transaction such as rebooting
40 * sequence resets the slave and the bus is recovered.
43 * lines can use this common code for bus recovery. On many SOCs that have
44 * embedded i2c controllers, the i2c pins can be temporarily reassigned as gpio
45 * pins to do the bus recovery, then can be assigned back to the i2c hardware.
52 #include <sys/bus.h>
[all …]

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