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Searched +full:pic32mzda +full:- +full:uart (Results 1 – 4 of 4) sorted by relevance

/linux/arch/mips/boot/dts/pic32/
H A Dpic32mzda.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
5 #include <dt-bindings/clock/microchip,pic32-clock.h>
6 #include <dt-bindings/interrupt-controller/irq.h>
9 #address-cells = <1>;
10 #size-cells = <1>;
11 interrupt-parent = <&evic>;
33 #address-cells = <1>;
34 #size-cells = <0>;
43 compatible = "microchip,pic32mzda-infra";
49 #clock-cells = <0>;
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/linux/Documentation/devicetree/bindings/serial/
H A Dmicrochip,pic32mzda-uart.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/serial/microchip,pic32mzda-uart.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Microchip PIC32 UART
10 - Andrei Pistirica <andrei.pistirica@microchip.com>
11 - Purna Chandra Mandal <purna.mandal@microchip.com>
14 - $ref: /schemas/serial/serial.yaml#
18 const: microchip,pic32mzda-uart
25 - description: Fault
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/linux/Documentation/devicetree/bindings/pinctrl/
H A Dmicrochip,pic32-pinctrl.txt3 Please refer to pinctrl-bindings.txt, ../gpio/gpio.txt, and
4 ../interrupt-controller/interrupts.txt for generic information regarding
12 - compatible: "microchip,pic32mada-pinctrl"
13 - reg: Address range of the pinctrl registers.
14 - clocks: Clock specifier (see clock bindings for details)
16 Required properties for pin configuration sub-nodes:
17 - pins: List of pins to which the configuration applies.
19 Optional properties for pin configuration sub-nodes:
20 ----------------------------------------------------
21 - function: Mux function for the specified pins.
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/linux/drivers/tty/serial/
H A Dpic32_uart.c1 // SPDX-License-Identifier: GPL-2.0+
8 * Sorin-Andrei Pistirica <andrei.pistirica@microchip.com>
26 #include <asm/mach-pic32/pic32.h>
28 /* UART name and device definitions */
29 #define PIC32_DEV_NAME "pic32-uart"
43 /* struct pic32_sport - pic32 serial port descriptor
44 * @port: uart port descriptor
82 __raw_writel(val, sport->port.membase + reg); in pic32_uart_writel()
87 return __raw_readl(sport->port.membase + reg); in pic32_uart_readl()
90 /* pic32 uart mode register bits */
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