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/freebsd/sys/contrib/device-tree/Bindings/interrupt-controller/
H A Dmicrochip,pic32mzda-evic.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/microchip,pic32mzda-evic.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Microchip PIC32 EVIC Interrupt Controller
10 - Cristian Birsan <cristian.birsan@microchip.com>
13 The Microchip PIC32 contains an Enhanced Vectored Interrupt Controller (EVIC).
25 - const: microchip,pic32mzda-evic
30 interrupt-controller: true
32 '#interrupt-cells':
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H A Dmicrochip,pic32-evic.txt4 The Microchip PIC32 contains an Enhanced Vectored Interrupt Controller (EVIC).
14 -------------------
16 - compatible: Should be "microchip,pic32mzda-evic"
17 - reg: Specifies physical base address and size of register range.
18 - interrupt-controller: Identifies the node as an interrupt controller.
19 - #interrupt cells: Specifies the number of cells used to encode an interrupt
25 hw_irq - represents the hardware interrupt number as in the data sheet.
26 irq_type - is used to describe the type and polarity of an interrupt. For
32 -------------------
33 - microchip,external-irqs: u32 array of external interrupts with software
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/freebsd/sys/contrib/device-tree/src/mips/pic32/
H A Dpic32mzda.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
5 #include <dt-bindings/clock/microchip,pic32-clock.h>
6 #include <dt-bindings/interrupt-controller/irq.h>
9 #address-cells = <1>;
10 #size-cells = <1>;
11 interrupt-parent = <&evic>;
33 #address-cells = <1>;
34 #size-cells = <0>;
43 compatible = "microchip,pic32mzda-infra";
49 #clock-cells = <0>;
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