| /linux/Documentation/devicetree/bindings/usb/ |
| H A D | amlogic,meson-g12a-usb-ctrl.yaml | 113 - const: usb2-phy0 # USB2 PHY0 if USBHOST_A port is used
115 - const: usb3-phy0 # USB3 PHY if USB3_0 is used
132 - const: usb2-phy0 # USB2 PHY0 if USBHOST_A port is used
152 - const: usb2-phy0 # USB2 PHY0 if USBHOST_A port is used
214 phy-names = "usb2-phy0", "usb2-phy1", "usb3-phy0";
|
| /linux/arch/arm64/boot/dts/broadcom/stingray/ |
| H A D | stingray-usb.dtsi | 29 phy-names = "phy0", "phy1";
39 phy-names = "phy0", "phy1";
63 phy-names = "phy0", "phy1", "phy2";
73 phy-names = "phy0";
|
| /linux/Documentation/devicetree/bindings/clock/ |
| H A D | qcom,sm8450-dispcc.yaml | 31 - description: Byte clock from DSI PHY0
32 - description: Pixel clock from DSI PHY0
35 - description: Link clock from DP PHY0
36 - description: VCO DIV clock from DP PHY0
|
| H A D | qcom,sm6115-dispcc.yaml | 27 - description: Byte clock from DSI PHY0
28 - description: Pixel clock from DSI PHY0
|
| H A D | qcom,gcc-msm8953.yaml | 27 - description: Byte clock from DSI PHY0
28 - description: Pixel clock from DSI PHY0
|
| H A D | qcom,sm4450-dispcc.yaml | 32 - description: Byte clock from DSI PHY0
33 - description: Pixel clock from DSI PHY0
|
| H A D | qcom,gcc-msm8976.yaml | 29 - description: Pixel clock from DSI PHY0
30 - description: Byte clock from DSI PHY0
|
| /linux/Documentation/devicetree/bindings/net/ |
| H A D | qcom-emac.txt | 48 phy-handle = <&phy0>;
52 phy0: ethernet-phy@0 {
97 phy-handle = <&phy0>;
101 phy0: ethernet-phy@4 {
|
| H A D | toshiba,visconti-dwmac.yaml | 73 phy-handle = <&phy0>;
80 phy0: ethernet-phy@1 {
|
| /linux/arch/riscv/boot/dts/microchip/ |
| H A D | mpfs-polarberry.dts | 34 * phy0 is connected to mac0, but the port itself is on the (optional) carrier
39 phy-handle = <&phy0>;
52 phy0: ethernet-phy@4 { label
|
| /linux/arch/arm64/boot/dts/freescale/ |
| H A D | fsl-ls1028a-kontron-sl28-var1.dts | 28 phy0: ethernet-phy@4 { label
51 /* Delete the phy-handle to the old phy0 label */
56 phy-handle = <&phy0>;
|
| /linux/drivers/phy/nuvoton/ |
| H A D | phy-ma35d1-usb2.c | 45 * USB PHY0 is in operation mode already in ma35_usb_phy_power_on()
55 * reset USB PHY0. in ma35_usb_phy_power_on()
56 * wait until USB PHY0 60 MHz UTMI Interface Clock ready in ma35_usb_phy_power_on()
61 /* make USB PHY0 enter operation mode */ in ma35_usb_phy_power_on()
|
| /linux/arch/arm64/boot/dts/marvell/ |
| H A D | armada-8040-mcbin.dts | 20 phy0: ethernet-phy@0 { label
36 phy = <&phy0>;
|
| H A D | cn9130-db-comexpress.dtsi | 49 phy = <&phy0>;
60 phy0: ethernet-phy@0 { label
|
| H A D | cn9131-db-comexpress.dtsi | 53 phy = <&phy0>;
64 phy0: ethernet-phy@0 { label
|
| /linux/arch/arm/boot/dts/rockchip/ |
| H A D | rk3036-evb.dts | 18 phy = <&phy0>;
29 phy0: ethernet-phy@0 { label
|
| /linux/arch/arm64/boot/dts/toshiba/ |
| H A D | tmpv7708-visrobo-vrb.dts | 43 phy-handle = <&phy0>;
50 phy0: ethernet-phy@1 { label
|
| H A D | tmpv7708-rm-mbrc.dts | 43 phy-handle = <&phy0>;
50 phy0: ethernet-phy@1 { label
|
| /linux/arch/arm/boot/dts/st/ |
| H A D | stm32mp151a-prtt1a.dts | 16 phy-handle = <&phy0>;
21 phy0: ethernet-phy@0 { label
|
| H A D | stm32mp151a-prtt1s.dts | 16 phy-handle = <&phy0>;
51 phy0: ethernet-phy@0 { label
|
| /linux/Documentation/devicetree/bindings/phy/ |
| H A D | nvidia,tegra20-usb-phy.yaml | 32 PHY0 and PHY2 share power and ground, PHY0 contains shared registers.
33 PHY0 and PHY2 must specify two register sets, where the first set is
34 PHY own registers and the second set is the PHY0 registers.
|
| /linux/arch/powerpc/boot/dts/ |
| H A D | cm5200.dts | 51 phy-handle = <&phy0>;
55 phy0: ethernet-phy@0 { label
|
| /linux/arch/arm/boot/dts/intel/ixp/ |
| H A D | intel-ixp42x-ixdp425.dts | 47 phy-handle = <&phy0>;
53 phy0: ethernet-phy@0 { label
|
| /linux/arch/arm/boot/dts/ti/omap/ |
| H A D | am335x-moxa-uc-2101.dts | 56 phy0: ethernet-phy@4 { label
62 phy-handle = <&phy0>;
|
| /linux/arch/loongarch/boot/dts/ |
| H A D | loongson-2k2000-ref.dts | 66 phy-handle = <&phy0>;
71 phy0: ethernet-phy@0 { label
|