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/freebsd/sys/contrib/device-tree/Bindings/phy/
H A Dphy-ocelot-serdes.txt1 Microsemi Ocelot SerDes muxing driver
2 -------------------------------------
4 On Microsemi Ocelot, there is a handful of registers in HSIO address
5 space for setting up the SerDes to switch port muxing.
7 A SerDes X can be "muxed" to work with switch port Y or Z for example.
8 One specific SerDes can also be used as a PCIe interface.
10 Hence, a SerDes represents an interface, be it an Ethernet or a PCIe one.
12 There are two kinds of SerDes: SERDES1G supports 10/100Mbps in
13 half/full-duplex and 1000Mbps in full-duplex mode while SERDES6G supports
14 10/100Mbps in half/full-duplex and 1000/2500Mbps in full-duplex mode.
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H A Dmscc,vsc7514-serdes.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/mscc,vsc7514-serdes.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Microsemi Ocelot SerDes muxing
10 - Alexandre Belloni <alexandre.belloni@bootlin.com>
11 - UNGLinuxDriver@microchip.com
14 On Microsemi Ocelot, there is a handful of registers in HSIO address
15 space for setting up the SerDes to switch port muxing.
17 A SerDes X can be "muxed" to work with switch port Y or Z for example.
[all …]
/freebsd/sys/contrib/device-tree/src/mips/mscc/
H A Docelot_pcb120.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
4 /dts-v1/;
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/interrupt-controller/irq.h>
8 #include <dt-bindings/phy/phy-ocelot-serdes.h>
9 #include "ocelot.dtsi"
12 compatible = "mscc,ocelot-pcb120", "mscc,ocelot";
15 stdout-path = "serial0:115200n8";
25 phy_int_pins: phy-int-pins {
30 phy_load_save_pins: phy-load-save-pins {
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H A Docelot.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
5 #address-cells = <1>;
6 #size-cells = <1>;
7 compatible = "mscc,ocelot";
10 #address-cells = <1>;
11 #size-cells = <0>;
25 cpuintc: interrupt-controller {
26 #address-cells = <0>;
27 #interrupt-cells = <1>;
28 interrupt-controller;
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/freebsd/sys/contrib/device-tree/Bindings/net/dsa/
H A Docelot.txt1 Microchip Ocelot switch driver family
5 -----
9 - VSC9959 (Felix)
10 - VSC9953 (Seville)
13 larger ENETC root complex. As a result, the ethernet-switch node is a sub-node
25 For the external switch ports, depending on board configuration, "phy-mode" and
26 "phy-handle" are populated by board specific device tree instances. Ports 4 and
30 the Ocelot hardware core. The CPU port in Ocelot is a set of queues, which are
32 By default, in fsl-ls1028a.dtsi, the NPI port is assigned to the internal
39 Any port can be disabled (and in fsl-ls1028a.dtsi, they are indeed all disabled
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/freebsd/sys/contrib/device-tree/src/arm64/microchip/
H A Dsparx5.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/clock/microchip,sparx5.h>
12 interrupt-parent = <&gic>;
13 #address-cells = <2>;
14 #size-cells = <1>;
23 stdout-path = "serial0:115200n8";
27 #address-cells = <1>;
28 #size-cells = <0>;
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