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/linux/drivers/net/ethernet/pensando/ionic/
H A Dionic_phc.c79 if (!lif->phc || !lif->phc->ptp) in ionic_lif_hwstamp_set_ts_config()
82 mutex_lock(&lif->phc->config_lock); in ionic_lif_hwstamp_set_ts_config()
94 memcpy(config, &lif->phc->ts_config, sizeof(*config)); in ionic_lif_hwstamp_set_ts_config()
95 memset(&lif->phc->ts_config, 0, sizeof(lif->phc->ts_config)); in ionic_lif_hwstamp_set_ts_config()
96 lif->phc->ts_config_tx_mode = 0; in ionic_lif_hwstamp_set_ts_config()
97 lif->phc->ts_config_rx_filt = 0; in ionic_lif_hwstamp_set_ts_config()
137 if (tx_mode != lif->phc->ts_config_tx_mode) { in ionic_lif_hwstamp_set_ts_config()
143 if (rx_filt != lif->phc->ts_config_rx_filt) { in ionic_lif_hwstamp_set_ts_config()
149 if (rx_all != (lif->phc->ts_config.rx_filter == HWTSTAMP_FILTER_ALL)) { in ionic_lif_hwstamp_set_ts_config()
155 memcpy(&lif->phc->ts_config, config, sizeof(*config)); in ionic_lif_hwstamp_set_ts_config()
[all …]
/linux/drivers/ptp/
H A Dptp_mock.c51 struct mock_phc *phc = info_to_phc(info); in mock_phc_adjfine() local
57 spin_lock(&phc->lock); in mock_phc_adjfine()
58 timecounter_read(&phc->tc); in mock_phc_adjfine()
59 phc->cc.mult = MOCK_PHC_CC_MULT + adj; in mock_phc_adjfine()
60 spin_unlock(&phc->lock); in mock_phc_adjfine()
67 struct mock_phc *phc = info_to_phc(info); in mock_phc_adjtime() local
69 spin_lock(&phc->lock); in mock_phc_adjtime()
70 timecounter_adjtime(&phc->tc, delta); in mock_phc_adjtime()
71 spin_unlock(&phc->lock); in mock_phc_adjtime()
79 struct mock_phc *phc = info_to_phc(info); in mock_phc_settime64() local
[all …]
/linux/drivers/net/ethernet/microchip/sparx5/
H A Dsparx5_ptp.c86 struct sparx5_phc *phc; in sparx5_ptp_hwtstamp_set() local
135 phc = &sparx5->phc[SPARX5_PHC_PORT]; in sparx5_ptp_hwtstamp_set()
136 phc->hwtstamp_config = *cfg; in sparx5_ptp_hwtstamp_set()
146 struct sparx5_phc *phc; in sparx5_ptp_hwtstamp_get() local
148 phc = &sparx5->phc[SPARX5_PHC_PORT]; in sparx5_ptp_hwtstamp_get()
149 *cfg = phc->hwtstamp_config; in sparx5_ptp_hwtstamp_get()
398 struct sparx5_phc *phc = container_of(ptp, struct sparx5_phc, info); in sparx5_ptp_adjfine() local
399 struct sparx5 *sparx5 = phc->sparx5; in sparx5_ptp_adjfine()
425 spx5_rmw(PTP_PTP_DOM_CFG_PTP_CLKCFG_DIS_SET(1 << BIT(phc->index)), in sparx5_ptp_adjfine()
430 PTP_CLK_PER_CFG(phc->index, 0)); in sparx5_ptp_adjfine()
[all …]
/linux/drivers/net/ethernet/amazon/ena/
H A Dena_phc.c73 /* Enable/Disable PHC by the kernel, affects on the next init flow */
86 /* Check if PHC is enabled by the kernel */
94 /* PHC is activated if ptp clock is registered in the kernel */
112 /* PHC may already be registered in case of a reset */ in ena_phc_register()
142 /* During reset flow, PHC must stay registered in ena_phc_unregister()
143 * to keep kernel's PHC index in ena_phc_unregister()
154 /* Allocate driver specific PHC info */ in ena_phc_alloc()
178 /* Validate PHC feature is supported in the device */ in ena_phc_init()
180 netdev_dbg(netdev, "PHC feature is not supported by the device\n"); in ena_phc_init()
184 /* Validate PHC feature is enabled by the kernel */ in ena_phc_init()
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H A Dena_com.c44 /* PHC definitions */
1657 struct ena_com_phc_info *phc = &ena_dev->phc; in ena_com_phc_init() local
1659 memset(phc, 0x0, sizeof(*phc)); in ena_com_phc_init()
1661 /* Allocate shared mem used PHC timestamp retrieved from device */ in ena_com_phc_init()
1662 phc->virt_addr = dma_alloc_coherent(ena_dev->dmadev, in ena_com_phc_init()
1663 sizeof(*phc->virt_addr), in ena_com_phc_init()
1664 &phc->phys_addr, in ena_com_phc_init()
1666 if (unlikely(!phc->virt_addr)) in ena_com_phc_init()
1669 spin_lock_init(&phc->lock); in ena_com_phc_init()
1671 phc->virt_addr->req_id = 0; in ena_com_phc_init()
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H A Dena_debugfs.c22 adapter->ena_dev->phc.stats.phc_cnt); in phc_stats_show()
25 adapter->ena_dev->phc.stats.phc_exp); in phc_stats_show()
28 adapter->ena_dev->phc.stats.phc_skp); in phc_stats_show()
31 adapter->ena_dev->phc.stats.phc_err_dv); in phc_stats_show()
34 adapter->ena_dev->phc.stats.phc_err_ts); in phc_stats_show()
H A Dena_com.h269 /* PTP hardware clock (PHC) MMIO read data info */
271 /* Internal PHC statistics */
274 /* PHC shared memory - virtual address */
277 /* System time of last PHC request */
280 /* Spin lock to ensure a single outstanding PHC read */
283 /* PHC doorbell address as an offset to PCIe MMIO REG BAR */
287 * Max time for valid PHC retrieval, passing this threshold will fail
288 * the get time request and block new PHC requests for block_timeout_usec
294 * PHC requests block period, blocking starts once PHC request expired
296 * any PHC requests during block period will be skipped
[all …]
H A Dena_admin_defs.h956 * 8 : phc
1038 /* PHC type as defined in enum ena_admin_get_phc_type,
1046 /* PHC doorbell address as an offset to PCIe MMIO REG BAR,
1051 /* Max time for valid PHC retrieval, passing this threshold will
1052 * fail the get-time request and block PHC requests for
1057 /* PHC requests block period, blocking starts if PHC request expired
1063 /* Shared PHC physical address (ena_admin_phc_resp),
1068 /* Shared PHC Size (ena_admin_phc_resp),
1104 struct ena_admin_feature_phc_desc phc; member
1139 /* PHC configuration */
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/linux/drivers/net/ethernet/intel/iavf/
H A Diavf_ptp.c166 * iavf_send_phc_read - Send request to read PHC time
171 * indirectly read the PHC time.
195 * iavf_read_phc_indirect - Indirectly read the PHC time via virtchnl
200 * Used when the device does not have direct register access to the PHC time.
256 * iavf_ptp_cache_phc_time - Cache PHC time for performing timestamp extension
259 * Periodically cache the PHC time in order to allow for timestamp extension.
290 * event. This task periodically reads the PHC time and stores it, to
411 bool phc = iavf_ptp_cap_supported(adapter, VIRTCHNL_1588_PTP_CAP_READ_PHC); in iavf_ptp_process_caps() local
417 if (adapter->ptp.clock && !phc) in iavf_ptp_process_caps()
419 else if (!adapter->ptp.clock && phc) in iavf_ptp_process_caps()
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/linux/Documentation/ABI/testing/
H A Dsysfs-timecard17 Description: (RO) The list of available time sources that the PHC
58 PHC output PPS is from the PHC clock
62 IRIG output is from the PHC, in IRIG-B format
63 DCF output is from the PHC, in DCF format
76 the PHC. May be changed by writing one of the listed
246 Description: (RW) When retrieving the PHC with the PTP SYS_OFFSET_EXTENDED
247 ioctl, a system timestamp is made before and after the PHC
250 with the PHC time. This estimate may be wrong, as it depends
251 on PCI latencies, and when the PHC time was latched
255 retrieved PHC time.
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/linux/include/linux/
H A Dptp_mock.h17 void mock_phc_destroy(struct mock_phc *phc);
18 int mock_phc_index(struct mock_phc *phc);
27 static inline void mock_phc_destroy(struct mock_phc *phc) in mock_phc_destroy() argument
31 static inline int mock_phc_index(struct mock_phc *phc) in mock_phc_index() argument
/linux/Documentation/networking/device_drivers/ethernet/amazon/
H A Dena.rst59 ena_phc.[ch] PTP hardware clock infrastructure (see `PHC`_ for more info)
227 .. _`PHC`: target in RX copybreak
229 PTP Hardware Clock (PHC)
236 **PHC support**
238 PHC depends on the PTP module, which needs to be either loaded as a module or compiled into the ker…
246 - If no output is provided, the ENA driver cannot be loaded with PHC support.
248 **PHC activation**
269 PHC support and capabilities can be verified using ethtool:
275 **PHC timestamp**
277 To retrieve PHC timestamp, use `ptp-userspace-api`_, usage example using `testptp`_:
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/linux/Documentation/driver-api/
H A Dptp.rst80 This function has a set of requirements from the PHC in order to be
83 * The PHC implements a servo algorithm internally that is used to
85 * When other PTP adjustment functions are called, the PHC servo
89 that 'jumps' the PHC clock time based on the provided offset. It
117 - Up to 4 independent PHC channels
124 … - Lock to GNSS input, automatic switching between GNSS and user-space PHC control (optional)
135 - PHC instances
/linux/drivers/net/ethernet/intel/idpf/
H A Didpf_ptp.c107 /* Read the system timestamp pre PHC read */ in idpf_ptp_read_src_clk_reg_direct()
112 /* Read the system timestamp post PHC read */ in idpf_ptp_read_src_clk_reg_direct()
139 /* Read the system timestamp pre PHC read */ in idpf_ptp_read_src_clk_reg_mailbox()
146 /* Read the system timestamp post PHC read */ in idpf_ptp_read_src_clk_reg_mailbox()
330 * idpf_ptp_update_phctime_rxq_grp - Update the cached PHC time for a given Rx
359 * idpf_ptp_update_cached_phctime - Update the cached PHC time values
379 /* Update the cached PHC time stored in the adapter structure. in idpf_ptp_update_cached_phctime()
438 "Unable to immediately update cached PHC time\n"); in idpf_ptp_settime64()
499 "Unable to immediately update cached PHC time\n"); in idpf_ptp_adjtime()
552 * idpf_ptp_gpio_enable - Enable/disable ancillary features of PHC
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/linux/drivers/net/ethernet/intel/ice/
H A Dice_ptp.c215 /* Read the system timestamp pre PHC read */ in ice_ptp_read_src_clk_reg()
221 /* Read the system timestamp post PHC read */ in ice_ptp_read_src_clk_reg()
229 /* Read the system timestamp post PHC read */ in ice_ptp_read_src_clk_reg()
250 * @cached_phc_time: recently cached copy of PHC time
261 * 1) have a recently cached copy of the PHC time
263 * seconds) before or after the PHC time was captured.
266 * captured after the PHC time. In this case, the full timestamp is just
267 * the cached PHC time plus the delta.
269 * timestamp was captured *before* the PHC time, i.e. because the PHC
273 * This algorithm works even if the PHC time was updated after a Tx timestamp
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/linux/drivers/mfd/
H A Drsmu_core.c27 .name = "8a3400x-phc",
36 .name = "82p33x1x-phc",
45 .name = "8v19n85x-phc",
/linux/drivers/net/ethernet/intel/e1000e/
H A Dptp.c4 /* PTP 1588 Hardware Clock (PHC)
22 * Adjust the frequency of the PHC cycle counter by the indicated delta from
156 * @ts: timespec structure to hold the current PHC time
216 * Enable (or disable) ancillary features of the PHC subsystem.
336 e_info("registered PHC clock\n"); in e1000e_ptp_init()
356 e_info("removed PHC\n"); in e1000e_ptp_remove()
/linux/net/mac802154/
H A Dscan.c575 "No ASSOC REQ ACK received from %8phC\n", &ceaddr); in mac802154_perform_association()
582 "No ASSOC RESP received from %8phC\n", &ceaddr); in mac802154_perform_association()
594 "Negative ASSOC RESP received from %8phC: %s\n", &ceaddr, in mac802154_perform_association()
635 "ASSOC RESP 0x%x received from %8phC, getting short address %04x\n", in mac802154_process_association_resp()
693 "No DISASSOC ACK received from %8phC\n", &teaddr); in mac802154_send_disassociation_notif()
699 dev_dbg(&sdata->dev->dev, "DISASSOC ACK received from %8phC\n", &teaddr); in mac802154_send_disassociation_notif()
748 "No ASSOC RESP ACK received from %8phC\n", &teaddr); in mac802154_send_association_resp_locked()
818 "Refusing ASSOC REQ from child %8phC, %s\n", &ceaddr, in mac802154_process_association_req()
831 "Accepting ASSOC REQ from child %8phC, providing short address 0x%04x\n", in mac802154_process_association_req()
842 "Successful association with new child %8phC\n", &ceaddr); in mac802154_process_association_req()
[all …]
/linux/drivers/net/ethernet/mellanox/mlx4/
H A Den_clock.c93 mlx4_info(mdev, "removed PHC\n"); in mlx4_en_remove_timestamp()
123 * Adjust the frequency of the PHC cycle counter by the indicated scaled_ppm
220 * Enable (or disable) ancillary features of the PHC subsystem.
288 /* Configure the PHC */ in mlx4_en_init_timestamp()
298 mlx4_info(mdev, "registered PHC clock\n"); in mlx4_en_init_timestamp()
/linux/drivers/net/wireless/intel/iwlwifi/mvm/
H A Dptp.c166 IWL_ERR(mvm, "No PHC clock registered\n"); in iwl_mvm_phc_get_crosstimestamp()
286 /* Give a short 'friendly name' to identify the PHC clock */ in iwl_mvm_ptp_init()
297 IWL_ERR(mvm, "Failed to register PHC clock (%ld)\n", in iwl_mvm_ptp_init()
301 IWL_DEBUG_INFO(mvm, "Registered PHC clock: %s, with index: %d\n", in iwl_mvm_ptp_init()
315 IWL_DEBUG_INFO(mvm, "Unregistering PHC clock: %s, with index: %d\n", in iwl_mvm_ptp_remove()
/linux/drivers/net/usb/
H A Dkalmia.c216 "Sending package with length %i and padding %i. Header: %6phC.", in kalmia_tx_fixup()
255 "Received expected unknown frame header: %6phC. Package length: %i\n", in kalmia_rx_fixup()
261 "Received unknown frame header: %6phC. Package length: %i\n", in kalmia_rx_fixup()
269 "Received header: %6phC. Package length: %i\n", in kalmia_rx_fixup()
293 "End header: %6phC. Package length: %i\n", in kalmia_rx_fixup()
/linux/drivers/net/ethernet/intel/i40e/
H A Di40e_ptp.c272 * i40e_ptp_read - Read the PHC time from the device
275 * @sts: structure to hold the system time before and after reading the PHC
300 * i40e_ptp_write - Write the PHC time to the device
338 * i40e_ptp_adjfine - Adjust the PHC frequency
342 * Adjust the frequency of the PHC by the indicated delta from the base
396 * i40e_ptp_adjtime - Adjust the PHC time
398 * @delta: Offset in nanoseconds to adjust the PHC time by
441 * i40e_ptp_gettimex - Get the time of the PHC
444 * @sts: structure to hold the system time before and after reading the PHC
462 * i40e_ptp_settime - Set the time of the PHC
[all …]
/linux/tools/testing/selftests/ptp/
H A Dtestptp.c129 " -k val measure the time offset between system and phc clock\n" in usage()
139 " -o val phase offset (in nanoseconds) to be provided to the PHC servo\n" in usage()
570 puts("system and phc clock time offset request okay"); in main()
582 printf("phc time: %lld.%09u\n", in main()
586 printf("system/phc clock time offset is %" PRId64 " ns\n" in main()
630 printf(" phc time: %lld.%09u\n", in main()
667 puts("system and phc crosstimestamping request okay"); in main()
/linux/include/uapi/linux/
H A Dnet_tstamp.h100 * PHC index. Note this PHC index is not stable as when there
102 * will be the PHC index.
/linux/drivers/net/ethernet/qlogic/qede/
H A Dqede_ptp.c121 /* Enable (or disable) ancillary features of the phc subsystem */
132 DP_ERR(edev, "PHC ancillary features are not supported\n"); in qede_ptp_ancillary_feature_enable()
183 /* Read the PHC. This API is invoked with ptp_lock held. */
195 WARN_ONCE(1, "PHC read err %d\n", rc); in qede_ptp_read_cc()
197 DP_VERBOSE(edev, QED_MSG_DEBUG, "PHC read cycles = %llu\n", phc_cycles); in qede_ptp_read_cc()

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