| /freebsd/sys/contrib/device-tree/Bindings/memory-controllers/ |
| H A D | mc-peripheral-props.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/mc-peripheral-props.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Peripheral-specific properties for a Memory Controller bus.
10 Many Memory Controllers need to add properties to peripheral devices.
13 to be defined in the peripheral node because they are per-peripheral
14 and there can be multiple peripherals attached to a controller. All
20 - Marek Vasut <marex@denx.de>
26 bank-width:
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| /freebsd/sys/contrib/device-tree/Bindings/iommu/ |
| H A D | samsung,sysmmu.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Samsung Exynos IOMMU H/W, System MMU (System Memory Management Unit)
10 - Marek Szyprowski <m.szyprowski@samsung.com>
14 physical memory chunks visible as a contiguous region to DMA-capable peripheral
15 devices like MFC, FIMC, FIMD, GScaler, FIMC-IS and so forth.
17 System MMU is an IOMMU and supports identical translation table format to
20 another capabilities like L2 TLB or block-fetch buffers to minimize translation
23 System MMUs are in many to one relation with peripheral devices, i.e. single
[all …]
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| /freebsd/sys/contrib/device-tree/Bindings/dma/ |
| H A D | atmel-xdma.txt | 1 * Atmel Extensible Direct Memory Access Controller (XDMAC)
5 - compatible: Should be "atmel,sama5d4-dma", "microchip,sam9x60-dma" or
6 "microchip,sama7g5-dma" or
7 "microchip,sam9x7-dma", "atmel,sama5d4-dma".
8 - reg: Should contain DMA registers location and length.
9 - interrupts: Should contain DMA interrupt.
10 - #dm
[all...] |
| H A D | fsl-imx-sdma.txt | 1 * Freescale Smart Direct Memory Access (SDMA) Controller for i.MX
4 - compatible : Should be one of
5 "fsl,imx25-sdma"
6 "fsl,imx31-sdma", "fsl,imx31-to1-sdma", "fsl,imx31-to2-sdma"
7 "fsl,imx35-sdma", "fsl,imx35-to1-sdma", "fsl,imx35-to2-sdma"
8 "fsl,imx51-sdma"
9 "fsl,imx53-sdma"
10 "fsl,imx6q-sdma"
11 "fsl,imx7d-sdma"
12 "fsl,imx6ul-sdma"
[all …]
|
| H A D | st,stm32-dma.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dma/st,stm32-dma.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 The STM32 DMA is a general-purpose direct memory access controller capable of
11 supporting 8 independent DMA channels. Each channel can have up to 8 requests.
12 DMA clients connected to the STM32 DMA controller must use the format
13 described in the dma.txt file, using a four-cell specifier for each
14 channel: a phandle to the DMA controller plus the following four integer cells:
19 -bit 9: Peripheral Increment Address
[all …]
|
| H A D | atmel-dma.txt | 1 * Atmel Direct Memory Access Controller (DMA)
4 - compatible: Should be "atmel,<chip>-dma".
5 - reg: Should contain DMA registers location and length.
6 - interrupts: Should contain DMA interrupt.
7 - #dma-cells: Must be <2>, used to represent the number of integer cells in
13 compatible = "atmel,at91sam9g45-dma";
16 #dma-cells = <2>;
19 DMA clients connected to the Atmel DMA controller must use the format
20 described in the dma.txt file, using a three-cell specifier for each channel:
24 1. A phandle pointing to the DMA controller.
[all …]
|
| H A D | fsl,imx-sdma.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/dma/fsl,imx-sdma.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale Smart Direct Memory Access (SDMA) Controller for i.MX
10 - Joy Zou <joy.zou@nxp.com>
13 - $ref: dma-controller.yaml#
18 - items:
19 - enum:
20 - fsl,imx50-sdma
[all …]
|
| /freebsd/sys/contrib/device-tree/Bindings/usb/ |
| H A D | cdns-usb3.txt | 1 Binding for the Cadence USBSS-DRD controller
4 - reg: Physical base address and size of the controller's register areas.
6 - HOST registers area
7 - DEVICE registers area
8 - OTG/DRD registers area
9 - reg-names - register memory area names:
10 "xhci" - for HOST registers space
11 "dev" - for DEVICE registers space
12 "otg" - for OTG/DRD registers space
13 - compatible: Should contain: "cdns,usb3"
[all …]
|
| /freebsd/sys/contrib/device-tree/Bindings/dma/stm32/ |
| H A D | st,stm32-dma.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dma/stm32/st,stm32-dma.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 The STM32 DMA is a general-purpose direct memory access controller capable of
11 supporting 8 independent DMA channels. Each channel can have up to 8 requests.
12 DMA clients connected to the STM32 DMA controller must use the format
13 described in the dma.txt file, using a four-cell specifier for each
14 channel: a phandle to the DMA controller plus the following four integer cells:
19 -bit 9: Peripheral Increment Address
[all …]
|
| /freebsd/sys/contrib/device-tree/Bindings/spi/ |
| H A D | spi-peripheral-props.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spi/spi-peripheral-props.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Peripheral-specific properties for a SPI bus.
10 Many SPI controllers need to add properties to peripheral devices. They could
11 be common properties like spi-max-frequency, spi-cpha, etc. or they could be
13 need to be defined in the peripheral node because they are per-peripheral and
14 there can be multiple peripherals attached to a controller. All those
19 - Mark Brown <broonie@kernel.org>
[all …]
|
| /freebsd/sys/contrib/device-tree/Bindings/net/can/ |
| H A D | st,stm32-bxcan.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/can/st,stm32-bxcan.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
12 - Dario Binacchi <dario.binacchi@amarulasolutions.com>
15 - $ref: can-controller.yaml#
20 - st,stm32f4-bxcan
22 st,can-primary:
24 Primary mode of the bxCAN peripheral is only relevant if the chip has
27 Not to be used if the peripheral is in single CAN configuration.
[all …]
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| /freebsd/sys/contrib/device-tree/Bindings/dma/ti/ |
| H A D | k3-bcdma.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
5 ---
6 $id: http://devicetree.org/schemas/dma/ti/k3-bcdm
[all...] |
| /freebsd/sys/contrib/device-tree/Bindings/remoteproc/ |
| H A D | qcom,sc8180x-pas.yaml | 1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/qcom,sc8180x-pas.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm SC8180X Peripheral Authentication Service
10 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
13 Qualcomm SC8180X SoC Peripheral Authentication Service loads and boots
19 - qcom,sc8180x-adsp-pas
20 - qcom,sc8180x-cdsp-pas
21 - qcom,sc8180x-mpss-pas
[all …]
|
| H A D | qcom,qcs404-pas.yaml | 1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/qcom,qcs404-pas.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm QCS404 Peripheral Authentication Service
10 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
13 Qualcomm QCS404 SoC Peripheral Authentication Service loads and boots
19 - qcom,qcs404-adsp-pas
20 - qcom,qcs404-cdsp-pas
21 - qcom,qcs404-wcss-pas
[all …]
|
| H A D | qcom,sdx55-pas.yaml | 1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/qcom,sdx55-pas.yaml#
5 $schema: http://devicetree.org/meta-schema
[all...] |
| H A D | qcom,pas-common.yaml | 1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/qcom,pas-common.yaml#
5 $schema: http://devicetree.org/meta-schema
[all...] |
| H A D | qcom,sm6350-pas.yaml | 1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/qcom,sm6350-pas.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm SM6350 Peripheral Authentication Service
10 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
13 Qualcomm SM6350 SoC Peripheral Authentication Service loads and boots
19 - qcom,sm6350-adsp-pas
20 - qcom,sm6350-cdsp-pas
21 - qcom,sm6350-mpss-pas
[all …]
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| H A D | qcom,sm6115-pas.yaml | 1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/qcom,sm6115-pas.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm SM6115 Peripheral Authentication Service
10 - Bhupesh Sharma <bhupesh.sharma@linaro.org>
13 Qualcomm SM6115 SoC Peripheral Authentication Service loads and boots
19 - enum:
20 - qcom,sm6115-adsp-pas
21 - qcom,sm6115-cdsp-pas
[all …]
|
| H A D | qcom,sc8280xp-pas.yaml | 1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/qcom,sc8280xp-pas.yaml#
5 $schema: http://devicetree.org/meta-schema
[all...] |
| /freebsd/sys/contrib/device-tree/Bindings/input/ |
| H A D | ti,nspire-keypad.txt | 1 TI-NSPIRE Keypad
4 - compatible: Compatible property value should be "ti,nspire-keypad".
6 - reg: Physical base address of the peripheral and length of memory mapped
9 - interrupts: The interrupt number for the peripheral.
11 - scan-interval: How often to scan in us. Based on a APB speed of 33MHz, the
14 - row-delay: How long to wait before scanning each row.
16 - clocks: The clock this peripheral is attached to.
18 - linux,keymap: The keymap to use
19 (see Documentation/devicetree/bindings/input/matrix-keymap.txt)
22 - active-low: Specify that the keypad is active low (i.e. logical low signifies
[all …]
|
| /freebsd/share/man/man4/ |
| H A D | ppbus.4 | 14 .\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 .\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
42 system provides a uniform, modular and architecture-independent
43 system for the implementation of drivers to control various parallel devices,
44 and to utilize different parallel port chipsets.
46 In order to write new drivers or port existing drivers, the ppbus system
48 .Bl -bullet -offset indent
50 architecture-independent macros or functions to access parallel ports
52 mechanism to allow various devices to share the same parallel port
57 with kernel-in drivers.
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| /freebsd/sys/contrib/device-tree/Bindings/interrupt-controller/ |
| H A D | marvell,icu.txt | 2 --------------------------------
5 responsible for collecting all wired-interrupt sources in the CP and
6 communicating them to the GIC in the AP, the unit translates interrupt
7 requests on input wires to MSG memory mapped transactions to the GIC.
8 These messages will access a different GIC memory area depending on
13 - compatible: Should be "marvell,cp110-icu"
15 - reg: Should contain ICU registers location and length.
22 - compatible: Should be one of:
23 * "marvell,cp110-icu-nsr"
24 * "marvell,cp110-icu-sr"
[all …]
|
| /freebsd/sys/contrib/device-tree/Bindings/reset/ |
| H A D | nxp,lpc1850-rgu.txt | 4 Please also refer to reset.txt in this directory for common reset
8 - compatible: Should be "nxp,lpc1850-rgu"
9 - reg: register base and length
10 - clocks: phandle and clock specifier to RGU clocks
11 - clock-names: should contain "delay" and "reg"
12 - #reset-cells: should be 1
14 See table below for valid peripheral reset numbers. Numbers not
18 Reset Peripheral
20 12 ARM Cortex-M0 subsystem core (LPC43xx only)
27 21 External memory controller (EMC)
[all …]
|
| /freebsd/sys/contrib/device-tree/Bindings/bus/ |
| H A D | st,stm32mp25-rifsc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/bus/st,stm32mp25-rifsc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Gatien Chevallier <gatien.chevallier@foss.st.com>
14 designed to enforce and manage isolation of STM32 hardware resources like
15 memory and peripherals.
19 - RISC registers associated with RISUP logic (resource isolation device unit
20 for peripherals), assign all non-RIF aware peripherals to zero, one or
22 - RIMC registers: associated with RIMU logic (resource isolation master
[all …]
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| /freebsd/sys/contrib/device-tree/Bindings/serial/ |
| H A D | fsl-imx-uart.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/serial/fsl-im
[all...] |